vtophys.cc revision 56
1/* 2 * Copyright (c) 2003 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29#include <string> 30 31#include "targetarch/pmap.h" 32 33#include "cpu/exec_context.hh" 34#include "mem/functional_mem/physical_memory.hh" 35#include "base/trace.hh" 36#include "targetarch/vtophys.hh" 37 38using namespace std; 39 40inline Addr 41level3_index(Addr vaddr) 42{ return (vaddr >> ALPHA_PGSHIFT) & PTEMASK; } 43 44inline Addr 45level2_index(Addr vaddr) 46{ return (vaddr >> (ALPHA_PGSHIFT + NPTEPG_SHIFT)) & PTEMASK; } 47 48inline Addr 49level1_index(Addr vaddr) 50{ return (vaddr >> (ALPHA_PGSHIFT + 2 * NPTEPG_SHIFT)) & PTEMASK; } 51 52Addr 53kernel_pte_lookup(PhysicalMemory *pmem, Addr ptbr, Addr vaddr) 54{ 55 uint64_t level1_map = ptbr; 56 Addr level1_pte = level1_map + (level1_index(vaddr) << PTESHIFT); 57 58 uint64_t level1 = pmem->phys_read_qword(level1_pte); 59 if (!entry_valid(level1)) { 60 DPRINTF(VtoPhys, "level 1 PTE not valid, va = %#\n", vaddr); 61 return 0; 62 } 63 64 uint64_t level2_map = PMAP_PTE_PA(level1); 65 Addr level2_pte = level2_map + (level2_index(vaddr) << PTESHIFT); 66 uint64_t level2 = pmem->phys_read_qword(level2_pte); 67 if (!entry_valid(level2)) { 68 DPRINTF(VtoPhys, "level 2 PTE not valid, va = %#x\n", vaddr); 69 return 0; 70 } 71 72 uint64_t level3_map = PMAP_PTE_PA(level2); 73 Addr level3_pte = level3_map + (level3_index(vaddr) << PTESHIFT); 74 75 return level3_pte; 76} 77 78Addr 79vtophys(PhysicalMemory *xc, Addr vaddr) 80{ 81 Addr paddr = 0; 82 if (vaddr < ALPHA_K0SEG_BASE) 83 DPRINTF(VtoPhys, "vtophys: invalid vaddr %#x", vaddr); 84 else if (vaddr < ALPHA_K1SEG_BASE) 85 paddr = ALPHA_K0SEG_TO_PHYS(vaddr); 86 else 87 panic("vtophys: ptbr is not set on virtual lookup"); 88 89 DPRINTF(VtoPhys, "vtophys(%#x) -> %#x\n", vaddr, paddr); 90 91 return paddr; 92} 93 94Addr 95vtophys(ExecContext *xc, Addr vaddr) 96{ 97 Addr ptbr = xc->regs.ipr[AlphaISA::IPR_PALtemp20]; 98 Addr paddr = 0; 99 if (vaddr < ALPHA_K0SEG_BASE) { 100 DPRINTF(VtoPhys, "vtophys: invalid vaddr %#x", vaddr); 101 } else if (vaddr < ALPHA_K1SEG_BASE) { 102 paddr = ALPHA_K0SEG_TO_PHYS(vaddr); 103 } else { 104 if (!ptbr) 105 panic("vtophys: ptbr is not set on virtual lookup"); 106 107 Addr pte = kernel_pte_lookup(xc->physmem, ptbr, vaddr); 108 uint64_t entry = xc->physmem->phys_read_qword(pte); 109 if (pte && entry_valid(entry)) 110 paddr = PMAP_PTE_PA(entry) | (vaddr & PGOFSET); 111 } 112 113 DPRINTF(VtoPhys, "vtophys(%#x) -> %#x\n", vaddr, paddr); 114 115 return paddr; 116} 117 118uint8_t * 119vtomem(ExecContext *xc, Addr vaddr, size_t len) 120{ 121 Addr paddr = vtophys(xc, vaddr); 122 return xc->physmem->dma_addr(paddr, len); 123} 124