vtophys.cc revision 5568
12SN/A/* 21762SN/A * Copyright (c) 2002-2005 The Regents of The University of Michigan 32SN/A * All rights reserved. 42SN/A * 52SN/A * Redistribution and use in source and binary forms, with or without 62SN/A * modification, are permitted provided that the following conditions are 72SN/A * met: redistributions of source code must retain the above copyright 82SN/A * notice, this list of conditions and the following disclaimer; 92SN/A * redistributions in binary form must reproduce the above copyright 102SN/A * notice, this list of conditions and the following disclaimer in the 112SN/A * documentation and/or other materials provided with the distribution; 122SN/A * neither the name of the copyright holders nor the names of its 132SN/A * contributors may be used to endorse or promote products derived from 142SN/A * this software without specific prior written permission. 152SN/A * 162SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 172SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 182SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 192SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 202SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 212SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 222SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 232SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 242SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 252SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 262SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 272665Ssaidi@eecs.umich.edu * 282665Ssaidi@eecs.umich.edu * Authors: Nathan Binkert 292665Ssaidi@eecs.umich.edu * Steve Reinhardt 302665Ssaidi@eecs.umich.edu * Ali Saidi 312SN/A */ 322SN/A 332SN/A#include <string> 342SN/A 352521SN/A#include "arch/alpha/ev5.hh" 361110SN/A#include "arch/alpha/vtophys.hh" 372521SN/A#include "base/chunk_generator.hh" 381110SN/A#include "base/trace.hh" 392680Sktlim@umich.edu#include "cpu/thread_context.hh" 402521SN/A#include "mem/vport.hh" 412SN/A 422SN/Ausing namespace std; 432SN/A 445568Snate@binkert.orgnamespace AlphaISA { 455568Snate@binkert.org 465568Snate@binkert.orgPageTableEntry 475568Snate@binkert.orgkernel_pte_lookup(FunctionalPort *mem, Addr ptbr, VAddr vaddr) 482SN/A{ 491111SN/A Addr level1_pte = ptbr + vaddr.level1(); 505568Snate@binkert.org PageTableEntry level1 = mem->read<uint64_t>(level1_pte); 511111SN/A if (!level1.valid()) { 522SN/A DPRINTF(VtoPhys, "level 1 PTE not valid, va = %#\n", vaddr); 532SN/A return 0; 542SN/A } 552SN/A 561111SN/A Addr level2_pte = level1.paddr() + vaddr.level2(); 575568Snate@binkert.org PageTableEntry level2 = mem->read<uint64_t>(level2_pte); 581111SN/A if (!level2.valid()) { 592SN/A DPRINTF(VtoPhys, "level 2 PTE not valid, va = %#x\n", vaddr); 602SN/A return 0; 612SN/A } 622SN/A 631111SN/A Addr level3_pte = level2.paddr() + vaddr.level3(); 645568Snate@binkert.org PageTableEntry level3 = mem->read<uint64_t>(level3_pte); 651111SN/A if (!level3.valid()) { 661111SN/A DPRINTF(VtoPhys, "level 3 PTE not valid, va = %#x\n", vaddr); 671111SN/A return 0; 681111SN/A } 691111SN/A return level3; 702SN/A} 712SN/A 722SN/AAddr 735568Snate@binkert.orgvtophys(Addr vaddr) 742SN/A{ 752SN/A Addr paddr = 0; 765568Snate@binkert.org if (IsUSeg(vaddr)) 772SN/A DPRINTF(VtoPhys, "vtophys: invalid vaddr %#x", vaddr); 785568Snate@binkert.org else if (IsK0Seg(vaddr)) 795568Snate@binkert.org paddr = K0Seg2Phys(vaddr); 802SN/A else 812SN/A panic("vtophys: ptbr is not set on virtual lookup"); 822SN/A 832SN/A DPRINTF(VtoPhys, "vtophys(%#x) -> %#x\n", vaddr, paddr); 842SN/A 852SN/A return paddr; 862SN/A} 872SN/A 882SN/AAddr 895568Snate@binkert.orgvtophys(ThreadContext *tc, Addr addr) 902SN/A{ 915568Snate@binkert.org VAddr vaddr = addr; 925568Snate@binkert.org Addr ptbr = tc->readMiscRegNoEffect(IPR_PALtemp20); 932SN/A Addr paddr = 0; 94924SN/A //@todo Andrew couldn't remember why he commented some of this code 95924SN/A //so I put it back in. Perhaps something to do with gdb debugging? 965568Snate@binkert.org if (PcPAL(vaddr) && (vaddr < PalMax)) { 97924SN/A paddr = vaddr & ~ULL(1); 98924SN/A } else { 995568Snate@binkert.org if (IsK0Seg(vaddr)) { 1005568Snate@binkert.org paddr = K0Seg2Phys(vaddr); 101973SN/A } else if (!ptbr) { 102973SN/A paddr = vaddr; 103547SN/A } else { 1045568Snate@binkert.org PageTableEntry pte = 1052680Sktlim@umich.edu kernel_pte_lookup(tc->getPhysPort(), ptbr, vaddr); 1061111SN/A if (pte.valid()) 1071111SN/A paddr = pte.paddr() | vaddr.offset(); 108547SN/A } 109924SN/A } 110924SN/A 1112SN/A 1122SN/A DPRINTF(VtoPhys, "vtophys(%#x) -> %#x\n", vaddr, paddr); 1132SN/A 1142SN/A return paddr; 1152SN/A} 1162SN/A 1175568Snate@binkert.org} // namespace AlphaISA 1185568Snate@binkert.org 119