types.hh revision 2632:1bb2f91485ea 
1/*
2 * Copyright (c) 2003-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#ifndef __ARCH_ALPHA_TYPES_HH__
30#define __ARCH_ALPHA_TYPES_HH__
31
32#include "sim/host.hh"
33
34namespace AlphaISA
35{
36
37    typedef uint32_t MachInst;
38    typedef uint64_t ExtMachInst;
39    typedef uint8_t  RegIndex;
40
41    typedef uint64_t IntReg;
42
43    // floating point register file entry type
44    typedef double FloatReg;
45    typedef uint64_t FloatRegBits;
46
47    // control register file contents
48    typedef uint64_t MiscReg;
49
50    typedef union {
51        IntReg  intreg;
52        FloatReg   fpreg;
53        MiscReg ctrlreg;
54    } AnyReg;
55
56    enum annotes {
57        ANNOTE_NONE = 0,
58        // An impossible number for instruction annotations
59        ITOUCH_ANNOTE = 0xffffffff,
60    };
61
62} // namespace AlphaISA
63
64#endif
65