12428SN/A/*
22428SN/A * Copyright (c) 2003-2005 The Regents of The University of Michigan
32428SN/A * All rights reserved.
42428SN/A *
52428SN/A * Redistribution and use in source and binary forms, with or without
62428SN/A * modification, are permitted provided that the following conditions are
72428SN/A * met: redistributions of source code must retain the above copyright
82428SN/A * notice, this list of conditions and the following disclaimer;
92428SN/A * redistributions in binary form must reproduce the above copyright
102428SN/A * notice, this list of conditions and the following disclaimer in the
112428SN/A * documentation and/or other materials provided with the distribution;
122428SN/A * neither the name of the copyright holders nor the names of its
132428SN/A * contributors may be used to endorse or promote products derived from
142428SN/A * this software without specific prior written permission.
152428SN/A *
162428SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
172428SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
182428SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
192428SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
202428SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
212428SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
222428SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
232428SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
242428SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
252428SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
262428SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
272665Ssaidi@eecs.umich.edu *
282665Ssaidi@eecs.umich.edu * Authors: Nathan Binkert
292665Ssaidi@eecs.umich.edu *          Steve Reinhardt
302428SN/A */
312428SN/A
322428SN/A#ifndef __ARCH_ALPHA_TYPES_HH__
332428SN/A#define __ARCH_ALPHA_TYPES_HH__
342428SN/A
358229Snate@binkert.org#include "arch/generic/types.hh"
366214Snate@binkert.org#include "base/types.hh"
372428SN/A
385569Snate@binkert.orgnamespace AlphaISA {
395569Snate@binkert.org
405569Snate@binkert.orgtypedef uint32_t MachInst;
415569Snate@binkert.orgtypedef uint64_t ExtMachInst;
425569Snate@binkert.org
437720Sgblack@eecs.umich.edutypedef GenericISA::SimplePCState<MachInst> PCState;
447720Sgblack@eecs.umich.edu
455569Snate@binkert.orgenum annotes
465569Snate@binkert.org{
475569Snate@binkert.org    ANNOTE_NONE = 0,
485569Snate@binkert.org    // An impossible number for instruction annotations
498902Sandreas.hansson@arm.com    ITOUCH_ANNOTE = 0xffffffff
505569Snate@binkert.org};
512428SN/A
5210823SAndreas.Sandberg@ARM.com/**
5310823SAndreas.Sandberg@ARM.com * Alpha-specific memory request flags
5410823SAndreas.Sandberg@ARM.com *
5510823SAndreas.Sandberg@ARM.com * These flags map to the architecture-specific lower 8 bits of the
5610823SAndreas.Sandberg@ARM.com * flags field in Request.
5710823SAndreas.Sandberg@ARM.com */
5810823SAndreas.Sandberg@ARM.comstruct AlphaRequestFlags
5910823SAndreas.Sandberg@ARM.com{
6010823SAndreas.Sandberg@ARM.com    typedef uint8_t ArchFlagsType;
6110823SAndreas.Sandberg@ARM.com
6210823SAndreas.Sandberg@ARM.com    /** The request is an ALPHA VPTE pal access (hw_ld). */
6310823SAndreas.Sandberg@ARM.com    static const ArchFlagsType VPTE    = 0x01;
6410823SAndreas.Sandberg@ARM.com    /** Use the alternate mode bits in ALPHA. */
6510823SAndreas.Sandberg@ARM.com    static const ArchFlagsType ALTMODE = 0x02;
6610823SAndreas.Sandberg@ARM.com};
6710823SAndreas.Sandberg@ARM.com
682428SN/A} // namespace AlphaISA
692428SN/A
705569Snate@binkert.org#endif // __ARCH_ALPHA_TYPES_HH__
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