system.cc revision 2665:a124942bacb8
1/* 2 * Copyright (c) 2002-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * Authors: Ali Saidi 29 */ 30 31#include "arch/alpha/ev5.hh" 32#include "arch/alpha/system.hh" 33#include "arch/vtophys.hh" 34#include "base/remote_gdb.hh" 35#include "base/loader/object_file.hh" 36#include "base/loader/symtab.hh" 37#include "base/trace.hh" 38#include "mem/physical.hh" 39#include "sim/byteswap.hh" 40#include "sim/builder.hh" 41 42 43using namespace LittleEndianGuest; 44 45AlphaSystem::AlphaSystem(Params *p) 46 : System(p) 47{ 48 consoleSymtab = new SymbolTable; 49 palSymtab = new SymbolTable; 50 51 52 /** 53 * Load the pal, and console code into memory 54 */ 55 // Load Console Code 56 console = createObjectFile(params()->console_path); 57 if (console == NULL) 58 fatal("Could not load console file %s", params()->console_path); 59 60 // Load pal file 61 pal = createObjectFile(params()->palcode); 62 if (pal == NULL) 63 fatal("Could not load PALcode file %s", params()->palcode); 64 65 66 // Load program sections into memory 67 pal->loadSections(&functionalPort, AlphaISA::LoadAddrMask); 68 console->loadSections(&functionalPort, AlphaISA::LoadAddrMask); 69 70 // load symbols 71 if (!console->loadGlobalSymbols(consoleSymtab)) 72 panic("could not load console symbols\n"); 73 74 if (!pal->loadGlobalSymbols(palSymtab)) 75 panic("could not load pal symbols\n"); 76 77 if (!pal->loadLocalSymbols(palSymtab)) 78 panic("could not load pal symbols\n"); 79 80 if (!console->loadGlobalSymbols(debugSymbolTable)) 81 panic("could not load console symbols\n"); 82 83 if (!pal->loadGlobalSymbols(debugSymbolTable)) 84 panic("could not load pal symbols\n"); 85 86 if (!pal->loadLocalSymbols(debugSymbolTable)) 87 panic("could not load pal symbols\n"); 88 89 Addr addr = 0; 90#ifndef NDEBUG 91 consolePanicEvent = addConsoleFuncEvent<BreakPCEvent>("panic"); 92#endif 93 94 /** 95 * Copy the osflags (kernel arguments) into the consoles 96 * memory. (Presently Linux does not use the console service 97 * routine to get these command line arguments, but Tru64 and 98 * others do.) 99 */ 100 if (consoleSymtab->findAddress("env_booted_osflags", addr)) { 101 virtPort.writeBlob(addr, (uint8_t*)params()->boot_osflags.c_str(), 102 strlen(params()->boot_osflags.c_str())); 103 } 104 105 /** 106 * Set the hardware reset parameter block system type and revision 107 * information to Tsunami. 108 */ 109 if (consoleSymtab->findAddress("m5_rpb", addr)) { 110 uint64_t data; 111 data = htog(params()->system_type); 112 virtPort.write(addr+0x50, data); 113 data = htog(params()->system_rev); 114 virtPort.write(addr+0x58, data); 115 } else 116 panic("could not find hwrpb\n"); 117 118} 119 120AlphaSystem::~AlphaSystem() 121{ 122 delete consoleSymtab; 123 delete console; 124 delete pal; 125#ifdef DEBUG 126 delete consolePanicEvent; 127#endif 128} 129 130/** 131 * This function fixes up addresses that are used to match PCs for 132 * hooking simulator events on to target function executions. 133 * 134 * Alpha binaries may have multiple global offset table (GOT) 135 * sections. A function that uses the GOT starts with a 136 * two-instruction prolog which sets the global pointer (gp == r29) to 137 * the appropriate GOT section. The proper gp value is calculated 138 * based on the function address, which must be passed by the caller 139 * in the procedure value register (pv aka t12 == r27). This sequence 140 * looks like the following: 141 * 142 * opcode Ra Rb offset 143 * ldah gp,X(pv) 09 29 27 X 144 * lda gp,Y(gp) 08 29 29 Y 145 * 146 * for some constant offsets X and Y. The catch is that the linker 147 * (or maybe even the compiler, I'm not sure) may recognize that the 148 * caller and callee are using the same GOT section, making this 149 * prolog redundant, and modify the call target to skip these 150 * instructions. If we check for execution of the first instruction 151 * of a function (the one the symbol points to) to detect when to skip 152 * it, we'll miss all these modified calls. It might work to 153 * unconditionally check for the third instruction, but not all 154 * functions have this prolog, and there's some chance that those 155 * first two instructions could have undesired consequences. So we do 156 * the Right Thing and pattern-match the first two instructions of the 157 * function to decide where to patch. 158 * 159 * Eventually this code should be moved into an ISA-specific file. 160 */ 161Addr 162AlphaSystem::fixFuncEventAddr(Addr addr) 163{ 164 // mask for just the opcode, Ra, and Rb fields (not the offset) 165 const uint32_t inst_mask = 0xffff0000; 166 // ldah gp,X(pv): opcode 9, Ra = 29, Rb = 27 167 const uint32_t gp_ldah_pattern = (9 << 26) | (29 << 21) | (27 << 16); 168 // lda gp,Y(gp): opcode 8, Ra = 29, rb = 29 169 const uint32_t gp_lda_pattern = (8 << 26) | (29 << 21) | (29 << 16); 170 171 uint32_t i1 = virtPort.read<uint32_t>(addr); 172 uint32_t i2 = virtPort.read<uint32_t>(addr + sizeof(AlphaISA::MachInst)); 173 174 if ((i1 & inst_mask) == gp_ldah_pattern && 175 (i2 & inst_mask) == gp_lda_pattern) { 176 Addr new_addr = addr + 2* sizeof(AlphaISA::MachInst); 177 DPRINTF(Loader, "fixFuncEventAddr: %p -> %p", addr, new_addr); 178 return new_addr; 179 } else { 180 return addr; 181 } 182} 183 184 185void 186AlphaSystem::setAlphaAccess(Addr access) 187{ 188 Addr addr = 0; 189 if (consoleSymtab->findAddress("m5AlphaAccess", addr)) { 190 virtPort.write(addr, htog(EV5::Phys2K0Seg(access))); 191 } else 192 panic("could not find m5AlphaAccess\n"); 193} 194 195bool 196AlphaSystem::breakpoint() 197{ 198 return remoteGDB[0]->trap(ALPHA_KENTRY_INT); 199} 200 201void 202AlphaSystem::serialize(std::ostream &os) 203{ 204 System::serialize(os); 205 consoleSymtab->serialize("console_symtab", os); 206 palSymtab->serialize("pal_symtab", os); 207} 208 209 210void 211AlphaSystem::unserialize(Checkpoint *cp, const std::string §ion) 212{ 213 System::unserialize(cp,section); 214 consoleSymtab->unserialize("console_symtab", cp, section); 215 palSymtab->unserialize("pal_symtab", cp, section); 216} 217 218 219BEGIN_DECLARE_SIM_OBJECT_PARAMS(AlphaSystem) 220 221 Param<Tick> boot_cpu_frequency; 222 SimObjectParam<PhysicalMemory *> physmem; 223 224 Param<std::string> kernel; 225 Param<std::string> console; 226 Param<std::string> pal; 227 228 Param<std::string> boot_osflags; 229 Param<std::string> readfile; 230 Param<unsigned int> init_param; 231 232 Param<uint64_t> system_type; 233 Param<uint64_t> system_rev; 234 235 Param<bool> bin; 236 VectorParam<std::string> binned_fns; 237 Param<bool> bin_int; 238 239END_DECLARE_SIM_OBJECT_PARAMS(AlphaSystem) 240 241BEGIN_INIT_SIM_OBJECT_PARAMS(AlphaSystem) 242 243 INIT_PARAM(boot_cpu_frequency, "Frequency of the boot CPU"), 244 INIT_PARAM(physmem, "phsyical memory"), 245 INIT_PARAM(kernel, "file that contains the kernel code"), 246 INIT_PARAM(console, "file that contains the console code"), 247 INIT_PARAM(pal, "file that contains palcode"), 248 INIT_PARAM_DFLT(boot_osflags, "flags to pass to the kernel during boot", 249 "a"), 250 INIT_PARAM_DFLT(readfile, "file to read startup script from", ""), 251 INIT_PARAM_DFLT(init_param, "numerical value to pass into simulator", 0), 252 INIT_PARAM_DFLT(system_type, "Type of system we are emulating", 34), 253 INIT_PARAM_DFLT(system_rev, "Revision of system we are emulating", 1<<10), 254 INIT_PARAM_DFLT(bin, "is this system to be binned", false), 255 INIT_PARAM(binned_fns, "functions to be broken down and binned"), 256 INIT_PARAM_DFLT(bin_int, "is interrupt code binned seperately?", true) 257 258END_INIT_SIM_OBJECT_PARAMS(AlphaSystem) 259 260CREATE_SIM_OBJECT(AlphaSystem) 261{ 262 AlphaSystem::Params *p = new AlphaSystem::Params; 263 p->name = getInstanceName(); 264 p->boot_cpu_frequency = boot_cpu_frequency; 265 p->physmem = physmem; 266 p->kernel_path = kernel; 267 p->console_path = console; 268 p->palcode = pal; 269 p->boot_osflags = boot_osflags; 270 p->init_param = init_param; 271 p->readfile = readfile; 272 p->system_type = system_type; 273 p->system_rev = system_rev; 274 p->bin = bin; 275 p->binned_fns = binned_fns; 276 p->bin_int = bin_int; 277 return new AlphaSystem(p); 278} 279 280REGISTER_SIM_OBJECT("AlphaSystem", AlphaSystem) 281 282 283