system.cc revision 2632:1bb2f91485ea
1/* 2 * Copyright (c) 2002-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29#include "arch/alpha/ev5.hh" 30#include "arch/alpha/system.hh" 31#include "arch/vtophys.hh" 32#include "base/remote_gdb.hh" 33#include "base/loader/object_file.hh" 34#include "base/loader/symtab.hh" 35#include "base/trace.hh" 36#include "mem/physical.hh" 37#include "sim/byteswap.hh" 38#include "sim/builder.hh" 39 40 41using namespace LittleEndianGuest; 42 43AlphaSystem::AlphaSystem(Params *p) 44 : System(p) 45{ 46 consoleSymtab = new SymbolTable; 47 palSymtab = new SymbolTable; 48 49 50 /** 51 * Load the pal, and console code into memory 52 */ 53 // Load Console Code 54 console = createObjectFile(params()->console_path); 55 if (console == NULL) 56 fatal("Could not load console file %s", params()->console_path); 57 58 // Load pal file 59 pal = createObjectFile(params()->palcode); 60 if (pal == NULL) 61 fatal("Could not load PALcode file %s", params()->palcode); 62 63 64 // Load program sections into memory 65 pal->loadSections(&functionalPort, AlphaISA::LoadAddrMask); 66 console->loadSections(&functionalPort, AlphaISA::LoadAddrMask); 67 68 // load symbols 69 if (!console->loadGlobalSymbols(consoleSymtab)) 70 panic("could not load console symbols\n"); 71 72 if (!pal->loadGlobalSymbols(palSymtab)) 73 panic("could not load pal symbols\n"); 74 75 if (!pal->loadLocalSymbols(palSymtab)) 76 panic("could not load pal symbols\n"); 77 78 if (!console->loadGlobalSymbols(debugSymbolTable)) 79 panic("could not load console symbols\n"); 80 81 if (!pal->loadGlobalSymbols(debugSymbolTable)) 82 panic("could not load pal symbols\n"); 83 84 if (!pal->loadLocalSymbols(debugSymbolTable)) 85 panic("could not load pal symbols\n"); 86 87 Addr addr = 0; 88#ifndef NDEBUG 89 consolePanicEvent = addConsoleFuncEvent<BreakPCEvent>("panic"); 90#endif 91 92 /** 93 * Copy the osflags (kernel arguments) into the consoles 94 * memory. (Presently Linux does not use the console service 95 * routine to get these command line arguments, but Tru64 and 96 * others do.) 97 */ 98 if (consoleSymtab->findAddress("env_booted_osflags", addr)) { 99 virtPort.writeBlob(addr, (uint8_t*)params()->boot_osflags.c_str(), 100 strlen(params()->boot_osflags.c_str())); 101 } 102 103 /** 104 * Set the hardware reset parameter block system type and revision 105 * information to Tsunami. 106 */ 107 if (consoleSymtab->findAddress("m5_rpb", addr)) { 108 uint64_t data; 109 data = htog(params()->system_type); 110 virtPort.write(addr+0x50, data); 111 data = htog(params()->system_rev); 112 virtPort.write(addr+0x58, data); 113 } else 114 panic("could not find hwrpb\n"); 115 116} 117 118AlphaSystem::~AlphaSystem() 119{ 120 delete consoleSymtab; 121 delete console; 122 delete pal; 123#ifdef DEBUG 124 delete consolePanicEvent; 125#endif 126} 127 128/** 129 * This function fixes up addresses that are used to match PCs for 130 * hooking simulator events on to target function executions. 131 * 132 * Alpha binaries may have multiple global offset table (GOT) 133 * sections. A function that uses the GOT starts with a 134 * two-instruction prolog which sets the global pointer (gp == r29) to 135 * the appropriate GOT section. The proper gp value is calculated 136 * based on the function address, which must be passed by the caller 137 * in the procedure value register (pv aka t12 == r27). This sequence 138 * looks like the following: 139 * 140 * opcode Ra Rb offset 141 * ldah gp,X(pv) 09 29 27 X 142 * lda gp,Y(gp) 08 29 29 Y 143 * 144 * for some constant offsets X and Y. The catch is that the linker 145 * (or maybe even the compiler, I'm not sure) may recognize that the 146 * caller and callee are using the same GOT section, making this 147 * prolog redundant, and modify the call target to skip these 148 * instructions. If we check for execution of the first instruction 149 * of a function (the one the symbol points to) to detect when to skip 150 * it, we'll miss all these modified calls. It might work to 151 * unconditionally check for the third instruction, but not all 152 * functions have this prolog, and there's some chance that those 153 * first two instructions could have undesired consequences. So we do 154 * the Right Thing and pattern-match the first two instructions of the 155 * function to decide where to patch. 156 * 157 * Eventually this code should be moved into an ISA-specific file. 158 */ 159Addr 160AlphaSystem::fixFuncEventAddr(Addr addr) 161{ 162 // mask for just the opcode, Ra, and Rb fields (not the offset) 163 const uint32_t inst_mask = 0xffff0000; 164 // ldah gp,X(pv): opcode 9, Ra = 29, Rb = 27 165 const uint32_t gp_ldah_pattern = (9 << 26) | (29 << 21) | (27 << 16); 166 // lda gp,Y(gp): opcode 8, Ra = 29, rb = 29 167 const uint32_t gp_lda_pattern = (8 << 26) | (29 << 21) | (29 << 16); 168 169 uint32_t i1 = virtPort.read<uint32_t>(addr); 170 uint32_t i2 = virtPort.read<uint32_t>(addr + sizeof(AlphaISA::MachInst)); 171 172 if ((i1 & inst_mask) == gp_ldah_pattern && 173 (i2 & inst_mask) == gp_lda_pattern) { 174 Addr new_addr = addr + 2* sizeof(AlphaISA::MachInst); 175 DPRINTF(Loader, "fixFuncEventAddr: %p -> %p", addr, new_addr); 176 return new_addr; 177 } else { 178 return addr; 179 } 180} 181 182 183void 184AlphaSystem::setAlphaAccess(Addr access) 185{ 186 Addr addr = 0; 187 if (consoleSymtab->findAddress("m5AlphaAccess", addr)) { 188 virtPort.write(addr, htog(EV5::Phys2K0Seg(access))); 189 } else 190 panic("could not find m5AlphaAccess\n"); 191} 192 193bool 194AlphaSystem::breakpoint() 195{ 196 return remoteGDB[0]->trap(ALPHA_KENTRY_INT); 197} 198 199void 200AlphaSystem::serialize(std::ostream &os) 201{ 202 System::serialize(os); 203 consoleSymtab->serialize("console_symtab", os); 204 palSymtab->serialize("pal_symtab", os); 205} 206 207 208void 209AlphaSystem::unserialize(Checkpoint *cp, const std::string §ion) 210{ 211 System::unserialize(cp,section); 212 consoleSymtab->unserialize("console_symtab", cp, section); 213 palSymtab->unserialize("pal_symtab", cp, section); 214} 215 216 217BEGIN_DECLARE_SIM_OBJECT_PARAMS(AlphaSystem) 218 219 Param<Tick> boot_cpu_frequency; 220 SimObjectParam<PhysicalMemory *> physmem; 221 222 Param<std::string> kernel; 223 Param<std::string> console; 224 Param<std::string> pal; 225 226 Param<std::string> boot_osflags; 227 Param<std::string> readfile; 228 Param<unsigned int> init_param; 229 230 Param<uint64_t> system_type; 231 Param<uint64_t> system_rev; 232 233 Param<bool> bin; 234 VectorParam<std::string> binned_fns; 235 Param<bool> bin_int; 236 237END_DECLARE_SIM_OBJECT_PARAMS(AlphaSystem) 238 239BEGIN_INIT_SIM_OBJECT_PARAMS(AlphaSystem) 240 241 INIT_PARAM(boot_cpu_frequency, "Frequency of the boot CPU"), 242 INIT_PARAM(physmem, "phsyical memory"), 243 INIT_PARAM(kernel, "file that contains the kernel code"), 244 INIT_PARAM(console, "file that contains the console code"), 245 INIT_PARAM(pal, "file that contains palcode"), 246 INIT_PARAM_DFLT(boot_osflags, "flags to pass to the kernel during boot", 247 "a"), 248 INIT_PARAM_DFLT(readfile, "file to read startup script from", ""), 249 INIT_PARAM_DFLT(init_param, "numerical value to pass into simulator", 0), 250 INIT_PARAM_DFLT(system_type, "Type of system we are emulating", 34), 251 INIT_PARAM_DFLT(system_rev, "Revision of system we are emulating", 1<<10), 252 INIT_PARAM_DFLT(bin, "is this system to be binned", false), 253 INIT_PARAM(binned_fns, "functions to be broken down and binned"), 254 INIT_PARAM_DFLT(bin_int, "is interrupt code binned seperately?", true) 255 256END_INIT_SIM_OBJECT_PARAMS(AlphaSystem) 257 258CREATE_SIM_OBJECT(AlphaSystem) 259{ 260 AlphaSystem::Params *p = new AlphaSystem::Params; 261 p->name = getInstanceName(); 262 p->boot_cpu_frequency = boot_cpu_frequency; 263 p->physmem = physmem; 264 p->kernel_path = kernel; 265 p->console_path = console; 266 p->palcode = pal; 267 p->boot_osflags = boot_osflags; 268 p->init_param = init_param; 269 p->readfile = readfile; 270 p->system_type = system_type; 271 p->system_rev = system_rev; 272 p->bin = bin; 273 p->binned_fns = binned_fns; 274 p->bin_int = bin_int; 275 return new AlphaSystem(p); 276} 277 278REGISTER_SIM_OBJECT("AlphaSystem", AlphaSystem) 279 280 281