system.cc revision 2158
1/* 2 * Copyright (c) 2002-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29#include "arch/alpha/system.hh" 30#include "base/remote_gdb.hh" 31#include "base/loader/object_file.hh" 32#include "base/loader/symtab.hh" 33#include "base/trace.hh" 34#include "mem/functional/memory_control.hh" 35#include "mem/functional/physical.hh" 36#include "sim/byteswap.hh" 37#include "sim/builder.hh" 38#include "targetarch/vtophys.hh" 39 40using namespace LittleEndianGuest; 41 42AlphaSystem::AlphaSystem(Params *p) 43 : System(p) 44{ 45 consoleSymtab = new SymbolTable; 46 palSymtab = new SymbolTable; 47 48 49 /** 50 * Load the pal, and console code into memory 51 */ 52 // Load Console Code 53 console = createObjectFile(params()->console_path); 54 if (console == NULL) 55 fatal("Could not load console file %s", params()->console_path); 56 57 // Load pal file 58 pal = createObjectFile(params()->palcode); 59 if (pal == NULL) 60 fatal("Could not load PALcode file %s", params()->palcode); 61 62 63 // Load program sections into memory 64 pal->loadSections(physmem, true); 65 console->loadSections(physmem, true); 66 67 // load symbols 68 if (!console->loadGlobalSymbols(consoleSymtab)) 69 panic("could not load console symbols\n"); 70 71 if (!pal->loadGlobalSymbols(palSymtab)) 72 panic("could not load pal symbols\n"); 73 74 if (!pal->loadLocalSymbols(palSymtab)) 75 panic("could not load pal symbols\n"); 76 77 if (!console->loadGlobalSymbols(debugSymbolTable)) 78 panic("could not load console symbols\n"); 79 80 if (!pal->loadGlobalSymbols(debugSymbolTable)) 81 panic("could not load pal symbols\n"); 82 83 if (!pal->loadLocalSymbols(debugSymbolTable)) 84 panic("could not load pal symbols\n"); 85 86 Addr addr = 0; 87#ifndef NDEBUG 88 consolePanicEvent = addConsoleFuncEvent<BreakPCEvent>("panic"); 89#endif 90 91 /** 92 * Copy the osflags (kernel arguments) into the consoles 93 * memory. (Presently Linux does not use the console service 94 * routine to get these command line arguments, but Tru64 and 95 * others do.) 96 */ 97 if (consoleSymtab->findAddress("env_booted_osflags", addr)) { 98 Addr paddr = vtophys(physmem, addr); 99 char *osflags = (char *)physmem->dma_addr(paddr, sizeof(uint32_t)); 100 101 if (osflags) 102 strcpy(osflags, params()->boot_osflags.c_str()); 103 } 104 105 /** 106 * Set the hardware reset parameter block system type and revision 107 * information to Tsunami. 108 */ 109 if (consoleSymtab->findAddress("m5_rpb", addr)) { 110 Addr paddr = vtophys(physmem, addr); 111 char *hwrpb = (char *)physmem->dma_addr(paddr, sizeof(uint64_t)); 112 113 if (!hwrpb) 114 panic("could not translate hwrpb addr\n"); 115 116 *(uint64_t*)(hwrpb+0x50) = htog(params()->system_type); 117 *(uint64_t*)(hwrpb+0x58) = htog(params()->system_rev); 118 } else 119 panic("could not find hwrpb\n"); 120 121} 122 123AlphaSystem::~AlphaSystem() 124{ 125 delete consoleSymtab; 126 delete console; 127 delete pal; 128#ifdef DEBUG 129 delete consolePanicEvent; 130#endif 131} 132 133/** 134 * This function fixes up addresses that are used to match PCs for 135 * hooking simulator events on to target function executions. 136 * 137 * Alpha binaries may have multiple global offset table (GOT) 138 * sections. A function that uses the GOT starts with a 139 * two-instruction prolog which sets the global pointer (gp == r29) to 140 * the appropriate GOT section. The proper gp value is calculated 141 * based on the function address, which must be passed by the caller 142 * in the procedure value register (pv aka t12 == r27). This sequence 143 * looks like the following: 144 * 145 * opcode Ra Rb offset 146 * ldah gp,X(pv) 09 29 27 X 147 * lda gp,Y(gp) 08 29 29 Y 148 * 149 * for some constant offsets X and Y. The catch is that the linker 150 * (or maybe even the compiler, I'm not sure) may recognize that the 151 * caller and callee are using the same GOT section, making this 152 * prolog redundant, and modify the call target to skip these 153 * instructions. If we check for execution of the first instruction 154 * of a function (the one the symbol points to) to detect when to skip 155 * it, we'll miss all these modified calls. It might work to 156 * unconditionally check for the third instruction, but not all 157 * functions have this prolog, and there's some chance that those 158 * first two instructions could have undesired consequences. So we do 159 * the Right Thing and pattern-match the first two instructions of the 160 * function to decide where to patch. 161 * 162 * Eventually this code should be moved into an ISA-specific file. 163 */ 164Addr 165AlphaSystem::fixFuncEventAddr(Addr addr) 166{ 167 // mask for just the opcode, Ra, and Rb fields (not the offset) 168 const uint32_t inst_mask = 0xffff0000; 169 // ldah gp,X(pv): opcode 9, Ra = 29, Rb = 27 170 const uint32_t gp_ldah_pattern = (9 << 26) | (29 << 21) | (27 << 16); 171 // lda gp,Y(gp): opcode 8, Ra = 29, rb = 29 172 const uint32_t gp_lda_pattern = (8 << 26) | (29 << 21) | (29 << 16); 173 // instruction size 174 const int sz = sizeof(uint32_t); 175 176 Addr paddr = vtophys(physmem, addr); 177 uint32_t i1 = *(uint32_t *)physmem->dma_addr(paddr, sz); 178 uint32_t i2 = *(uint32_t *)physmem->dma_addr(paddr+sz, sz); 179 180 if ((i1 & inst_mask) == gp_ldah_pattern && 181 (i2 & inst_mask) == gp_lda_pattern) { 182 Addr new_addr = addr + 2*sz; 183 DPRINTF(Loader, "fixFuncEventAddr: %p -> %p", addr, new_addr); 184 return new_addr; 185 } else { 186 return addr; 187 } 188} 189 190 191void 192AlphaSystem::setAlphaAccess(Addr access) 193{ 194 Addr addr = 0; 195 if (consoleSymtab->findAddress("m5AlphaAccess", addr)) { 196 Addr paddr = vtophys(physmem, addr); 197 uint64_t *m5AlphaAccess = 198 (uint64_t *)physmem->dma_addr(paddr, sizeof(uint64_t)); 199 200 if (!m5AlphaAccess) 201 panic("could not translate m5AlphaAccess addr\n"); 202 203 *m5AlphaAccess = htog(EV5::Phys2K0Seg(access)); 204 } else 205 panic("could not find m5AlphaAccess\n"); 206} 207 208bool 209AlphaSystem::breakpoint() 210{ 211 return remoteGDB[0]->trap(ALPHA_KENTRY_INT); 212} 213 214void 215AlphaSystem::serialize(std::ostream &os) 216{ 217 System::serialize(os); 218 consoleSymtab->serialize("console_symtab", os); 219 palSymtab->serialize("pal_symtab", os); 220} 221 222 223void 224AlphaSystem::unserialize(Checkpoint *cp, const std::string §ion) 225{ 226 System::unserialize(cp,section); 227 consoleSymtab->unserialize("console_symtab", cp, section); 228 palSymtab->unserialize("pal_symtab", cp, section); 229} 230 231 232BEGIN_DECLARE_SIM_OBJECT_PARAMS(AlphaSystem) 233 234 Param<Tick> boot_cpu_frequency; 235 SimObjectParam<MemoryController *> memctrl; 236 SimObjectParam<PhysicalMemory *> physmem; 237 238 Param<std::string> kernel; 239 Param<std::string> console; 240 Param<std::string> pal; 241 242 Param<std::string> boot_osflags; 243 Param<std::string> readfile; 244 Param<unsigned int> init_param; 245 246 Param<uint64_t> system_type; 247 Param<uint64_t> system_rev; 248 249 Param<bool> bin; 250 VectorParam<std::string> binned_fns; 251 Param<bool> bin_int; 252 253END_DECLARE_SIM_OBJECT_PARAMS(AlphaSystem) 254 255BEGIN_INIT_SIM_OBJECT_PARAMS(AlphaSystem) 256 257 INIT_PARAM(boot_cpu_frequency, "Frequency of the boot CPU"), 258 INIT_PARAM(memctrl, "memory controller"), 259 INIT_PARAM(physmem, "phsyical memory"), 260 INIT_PARAM(kernel, "file that contains the kernel code"), 261 INIT_PARAM(console, "file that contains the console code"), 262 INIT_PARAM(pal, "file that contains palcode"), 263 INIT_PARAM_DFLT(boot_osflags, "flags to pass to the kernel during boot", 264 "a"), 265 INIT_PARAM_DFLT(readfile, "file to read startup script from", ""), 266 INIT_PARAM_DFLT(init_param, "numerical value to pass into simulator", 0), 267 INIT_PARAM_DFLT(system_type, "Type of system we are emulating", 34), 268 INIT_PARAM_DFLT(system_rev, "Revision of system we are emulating", 1<<10), 269 INIT_PARAM_DFLT(bin, "is this system to be binned", false), 270 INIT_PARAM(binned_fns, "functions to be broken down and binned"), 271 INIT_PARAM_DFLT(bin_int, "is interrupt code binned seperately?", true) 272 273END_INIT_SIM_OBJECT_PARAMS(AlphaSystem) 274 275CREATE_SIM_OBJECT(AlphaSystem) 276{ 277 AlphaSystem::Params *p = new AlphaSystem::Params; 278 p->name = getInstanceName(); 279 p->boot_cpu_frequency = boot_cpu_frequency; 280 p->memctrl = memctrl; 281 p->physmem = physmem; 282 p->kernel_path = kernel; 283 p->console_path = console; 284 p->palcode = pal; 285 p->boot_osflags = boot_osflags; 286 p->init_param = init_param; 287 p->readfile = readfile; 288 p->system_type = system_type; 289 p->system_rev = system_rev; 290 p->bin = bin; 291 p->binned_fns = binned_fns; 292 p->bin_int = bin_int; 293 return new AlphaSystem(p); 294} 295 296REGISTER_SIM_OBJECT("AlphaSystem", AlphaSystem) 297 298 299