system.cc revision 2760
12158SN/A/*
22158SN/A * Copyright (c) 2002-2005 The Regents of The University of Michigan
32158SN/A * All rights reserved.
42158SN/A *
52158SN/A * Redistribution and use in source and binary forms, with or without
62158SN/A * modification, are permitted provided that the following conditions are
72158SN/A * met: redistributions of source code must retain the above copyright
82158SN/A * notice, this list of conditions and the following disclaimer;
92158SN/A * redistributions in binary form must reproduce the above copyright
102158SN/A * notice, this list of conditions and the following disclaimer in the
112158SN/A * documentation and/or other materials provided with the distribution;
122158SN/A * neither the name of the copyright holders nor the names of its
132158SN/A * contributors may be used to endorse or promote products derived from
142158SN/A * this software without specific prior written permission.
152158SN/A *
162158SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
172158SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
182158SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
192158SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
202158SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
212158SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
222158SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
232158SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
242158SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
252158SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
262158SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
272665Ssaidi@eecs.umich.edu *
282665Ssaidi@eecs.umich.edu * Authors: Ali Saidi
292760Sbinkertn@umich.edu *          Nathan Binkert
302158SN/A */
312158SN/A
322432SN/A#include "arch/alpha/ev5.hh"
332158SN/A#include "arch/alpha/system.hh"
342215SN/A#include "arch/vtophys.hh"
352158SN/A#include "base/remote_gdb.hh"
362158SN/A#include "base/loader/object_file.hh"
372158SN/A#include "base/loader/symtab.hh"
382158SN/A#include "base/trace.hh"
392521SN/A#include "mem/physical.hh"
402158SN/A#include "sim/byteswap.hh"
412158SN/A#include "sim/builder.hh"
422158SN/A
432158SN/A
442158SN/Ausing namespace LittleEndianGuest;
452158SN/A
462158SN/AAlphaSystem::AlphaSystem(Params *p)
472158SN/A    : System(p)
482158SN/A{
492158SN/A    consoleSymtab = new SymbolTable;
502158SN/A    palSymtab = new SymbolTable;
512158SN/A
522158SN/A
532158SN/A    /**
542158SN/A     * Load the pal, and console code into memory
552158SN/A     */
562158SN/A    // Load Console Code
572158SN/A    console = createObjectFile(params()->console_path);
582158SN/A    if (console == NULL)
592158SN/A        fatal("Could not load console file %s", params()->console_path);
602158SN/A
612158SN/A    // Load pal file
622158SN/A    pal = createObjectFile(params()->palcode);
632158SN/A    if (pal == NULL)
642158SN/A        fatal("Could not load PALcode file %s", params()->palcode);
652158SN/A
662158SN/A
672158SN/A    // Load program sections into memory
682521SN/A    pal->loadSections(&functionalPort, AlphaISA::LoadAddrMask);
692521SN/A    console->loadSections(&functionalPort, AlphaISA::LoadAddrMask);
702158SN/A
712158SN/A    // load symbols
722158SN/A    if (!console->loadGlobalSymbols(consoleSymtab))
732158SN/A        panic("could not load console symbols\n");
742158SN/A
752158SN/A    if (!pal->loadGlobalSymbols(palSymtab))
762158SN/A        panic("could not load pal symbols\n");
772158SN/A
782158SN/A    if (!pal->loadLocalSymbols(palSymtab))
792158SN/A        panic("could not load pal symbols\n");
802158SN/A
812158SN/A    if (!console->loadGlobalSymbols(debugSymbolTable))
822158SN/A        panic("could not load console symbols\n");
832158SN/A
842158SN/A    if (!pal->loadGlobalSymbols(debugSymbolTable))
852158SN/A        panic("could not load pal symbols\n");
862158SN/A
872158SN/A    if (!pal->loadLocalSymbols(debugSymbolTable))
882158SN/A        panic("could not load pal symbols\n");
892158SN/A
902158SN/A     Addr addr = 0;
912158SN/A#ifndef NDEBUG
922158SN/A    consolePanicEvent = addConsoleFuncEvent<BreakPCEvent>("panic");
932158SN/A#endif
942158SN/A
952158SN/A    /**
962158SN/A     * Copy the osflags (kernel arguments) into the consoles
972158SN/A     * memory. (Presently Linux does not use the console service
982158SN/A     * routine to get these command line arguments, but Tru64 and
992158SN/A     * others do.)
1002158SN/A     */
1012158SN/A    if (consoleSymtab->findAddress("env_booted_osflags", addr)) {
1022521SN/A        virtPort.writeBlob(addr, (uint8_t*)params()->boot_osflags.c_str(),
1032521SN/A                strlen(params()->boot_osflags.c_str()));
1042158SN/A    }
1052158SN/A
1062158SN/A    /**
1072158SN/A     * Set the hardware reset parameter block system type and revision
1082158SN/A     * information to Tsunami.
1092158SN/A     */
1102158SN/A    if (consoleSymtab->findAddress("m5_rpb", addr)) {
1112521SN/A        uint64_t data;
1122521SN/A        data = htog(params()->system_type);
1132549SN/A        virtPort.write(addr+0x50, data);
1142521SN/A        data = htog(params()->system_rev);
1152549SN/A        virtPort.write(addr+0x58, data);
1162158SN/A    } else
1172158SN/A        panic("could not find hwrpb\n");
1182158SN/A
1192158SN/A}
1202158SN/A
1212158SN/AAlphaSystem::~AlphaSystem()
1222158SN/A{
1232158SN/A    delete consoleSymtab;
1242158SN/A    delete console;
1252158SN/A    delete pal;
1262158SN/A#ifdef DEBUG
1272158SN/A    delete consolePanicEvent;
1282158SN/A#endif
1292158SN/A}
1302158SN/A
1312158SN/A/**
1322158SN/A * This function fixes up addresses that are used to match PCs for
1332158SN/A * hooking simulator events on to target function executions.
1342158SN/A *
1352158SN/A * Alpha binaries may have multiple global offset table (GOT)
1362158SN/A * sections.  A function that uses the GOT starts with a
1372158SN/A * two-instruction prolog which sets the global pointer (gp == r29) to
1382158SN/A * the appropriate GOT section.  The proper gp value is calculated
1392158SN/A * based on the function address, which must be passed by the caller
1402158SN/A * in the procedure value register (pv aka t12 == r27).  This sequence
1412158SN/A * looks like the following:
1422158SN/A *
1432158SN/A *			opcode Ra Rb offset
1442158SN/A *	ldah gp,X(pv)     09   29 27   X
1452158SN/A *	lda  gp,Y(gp)     08   29 29   Y
1462158SN/A *
1472158SN/A * for some constant offsets X and Y.  The catch is that the linker
1482158SN/A * (or maybe even the compiler, I'm not sure) may recognize that the
1492158SN/A * caller and callee are using the same GOT section, making this
1502158SN/A * prolog redundant, and modify the call target to skip these
1512158SN/A * instructions.  If we check for execution of the first instruction
1522158SN/A * of a function (the one the symbol points to) to detect when to skip
1532158SN/A * it, we'll miss all these modified calls.  It might work to
1542158SN/A * unconditionally check for the third instruction, but not all
1552158SN/A * functions have this prolog, and there's some chance that those
1562158SN/A * first two instructions could have undesired consequences.  So we do
1572158SN/A * the Right Thing and pattern-match the first two instructions of the
1582158SN/A * function to decide where to patch.
1592158SN/A *
1602158SN/A * Eventually this code should be moved into an ISA-specific file.
1612158SN/A */
1622158SN/AAddr
1632158SN/AAlphaSystem::fixFuncEventAddr(Addr addr)
1642158SN/A{
1652158SN/A    // mask for just the opcode, Ra, and Rb fields (not the offset)
1662158SN/A    const uint32_t inst_mask = 0xffff0000;
1672158SN/A    // ldah gp,X(pv): opcode 9, Ra = 29, Rb = 27
1682158SN/A    const uint32_t gp_ldah_pattern = (9 << 26) | (29 << 21) | (27 << 16);
1692158SN/A    // lda  gp,Y(gp): opcode 8, Ra = 29, rb = 29
1702158SN/A    const uint32_t gp_lda_pattern  = (8 << 26) | (29 << 21) | (29 << 16);
1712158SN/A
1722521SN/A    uint32_t i1 = virtPort.read<uint32_t>(addr);
1732521SN/A    uint32_t i2 = virtPort.read<uint32_t>(addr + sizeof(AlphaISA::MachInst));
1742158SN/A
1752158SN/A    if ((i1 & inst_mask) == gp_ldah_pattern &&
1762158SN/A        (i2 & inst_mask) == gp_lda_pattern) {
1772521SN/A        Addr new_addr = addr + 2* sizeof(AlphaISA::MachInst);
1782158SN/A        DPRINTF(Loader, "fixFuncEventAddr: %p -> %p", addr, new_addr);
1792158SN/A        return new_addr;
1802158SN/A    } else {
1812158SN/A        return addr;
1822158SN/A    }
1832158SN/A}
1842158SN/A
1852158SN/A
1862158SN/Avoid
1872158SN/AAlphaSystem::setAlphaAccess(Addr access)
1882158SN/A{
1892158SN/A    Addr addr = 0;
1902158SN/A    if (consoleSymtab->findAddress("m5AlphaAccess", addr)) {
1912521SN/A        virtPort.write(addr, htog(EV5::Phys2K0Seg(access)));
1922158SN/A    } else
1932158SN/A        panic("could not find m5AlphaAccess\n");
1942158SN/A}
1952158SN/A
1962158SN/Abool
1972158SN/AAlphaSystem::breakpoint()
1982158SN/A{
1992158SN/A    return remoteGDB[0]->trap(ALPHA_KENTRY_INT);
2002158SN/A}
2012158SN/A
2022158SN/Avoid
2032158SN/AAlphaSystem::serialize(std::ostream &os)
2042158SN/A{
2052158SN/A    System::serialize(os);
2062158SN/A    consoleSymtab->serialize("console_symtab", os);
2072158SN/A    palSymtab->serialize("pal_symtab", os);
2082158SN/A}
2092158SN/A
2102158SN/A
2112158SN/Avoid
2122158SN/AAlphaSystem::unserialize(Checkpoint *cp, const std::string &section)
2132158SN/A{
2142158SN/A    System::unserialize(cp,section);
2152158SN/A    consoleSymtab->unserialize("console_symtab", cp, section);
2162158SN/A    palSymtab->unserialize("pal_symtab", cp, section);
2172158SN/A}
2182158SN/A
2192158SN/A
2202158SN/ABEGIN_DECLARE_SIM_OBJECT_PARAMS(AlphaSystem)
2212158SN/A
2222158SN/A    Param<Tick> boot_cpu_frequency;
2232158SN/A    SimObjectParam<PhysicalMemory *> physmem;
2242158SN/A
2252158SN/A    Param<std::string> kernel;
2262158SN/A    Param<std::string> console;
2272158SN/A    Param<std::string> pal;
2282158SN/A
2292158SN/A    Param<std::string> boot_osflags;
2302158SN/A    Param<std::string> readfile;
2312158SN/A    Param<unsigned int> init_param;
2322158SN/A
2332158SN/A    Param<uint64_t> system_type;
2342158SN/A    Param<uint64_t> system_rev;
2352158SN/A
2362158SN/AEND_DECLARE_SIM_OBJECT_PARAMS(AlphaSystem)
2372158SN/A
2382158SN/ABEGIN_INIT_SIM_OBJECT_PARAMS(AlphaSystem)
2392158SN/A
2402158SN/A    INIT_PARAM(boot_cpu_frequency, "Frequency of the boot CPU"),
2412158SN/A    INIT_PARAM(physmem, "phsyical memory"),
2422158SN/A    INIT_PARAM(kernel, "file that contains the kernel code"),
2432158SN/A    INIT_PARAM(console, "file that contains the console code"),
2442158SN/A    INIT_PARAM(pal, "file that contains palcode"),
2452158SN/A    INIT_PARAM_DFLT(boot_osflags, "flags to pass to the kernel during boot",
2462158SN/A                    "a"),
2472158SN/A    INIT_PARAM_DFLT(readfile, "file to read startup script from", ""),
2482158SN/A    INIT_PARAM_DFLT(init_param, "numerical value to pass into simulator", 0),
2492158SN/A    INIT_PARAM_DFLT(system_type, "Type of system we are emulating", 34),
2502343SN/A    INIT_PARAM_DFLT(system_rev, "Revision of system we are emulating", 1<<10)
2512158SN/A
2522158SN/AEND_INIT_SIM_OBJECT_PARAMS(AlphaSystem)
2532158SN/A
2542158SN/ACREATE_SIM_OBJECT(AlphaSystem)
2552158SN/A{
2562158SN/A    AlphaSystem::Params *p = new AlphaSystem::Params;
2572158SN/A    p->name = getInstanceName();
2582158SN/A    p->boot_cpu_frequency = boot_cpu_frequency;
2592158SN/A    p->physmem = physmem;
2602158SN/A    p->kernel_path = kernel;
2612158SN/A    p->console_path = console;
2622158SN/A    p->palcode = pal;
2632158SN/A    p->boot_osflags = boot_osflags;
2642158SN/A    p->init_param = init_param;
2652158SN/A    p->readfile = readfile;
2662158SN/A    p->system_type = system_type;
2672158SN/A    p->system_rev = system_rev;
2682158SN/A    return new AlphaSystem(p);
2692158SN/A}
2702158SN/A
2712158SN/AREGISTER_SIM_OBJECT("AlphaSystem", AlphaSystem)
2722158SN/A
2732158SN/A
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