registers.hh revision 13556
1/* 2 * Copyright (c) 2003-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * Authors: Gabe Black 29 */ 30 31#ifndef __ARCH_ALPHA_REGISTERS_HH__ 32#define __ARCH_ALPHA_REGISTERS_HH__ 33 34#include "arch/alpha/generated/max_inst_regs.hh" 35#include "arch/alpha/ipr.hh" 36#include "arch/generic/types.hh" 37#include "arch/generic/vec_reg.hh" 38#include "base/types.hh" 39 40namespace AlphaISA { 41 42using AlphaISAInst::MaxInstSrcRegs; 43using AlphaISAInst::MaxInstDestRegs; 44 45// Locked read/write flags are can't be detected by the ISA parser 46const int MaxMiscDestRegs = AlphaISAInst::MaxMiscDestRegs + 1; 47 48typedef RegVal IntReg; 49 50// floating point register file entry type 51typedef FloatRegVal FloatReg; 52typedef RegVal FloatRegBits; 53 54// control register file contents 55typedef RegVal MiscReg; 56 57// dummy typedef since we don't have CC regs 58typedef uint8_t CCReg; 59 60// dummy typedefs since we don't have vector regs 61constexpr unsigned NumVecElemPerVecReg = 2; 62using VecElem = uint32_t; 63using VecReg = ::VecRegT<VecElem, NumVecElemPerVecReg, false>; 64using ConstVecReg = ::VecRegT<VecElem, NumVecElemPerVecReg, true>; 65using VecRegContainer = VecReg::Container; 66// This has to be one to prevent warnings that are treated as errors 67constexpr unsigned NumVecRegs = 1; 68 69enum MiscRegIndex 70{ 71 MISCREG_FPCR = NumInternalProcRegs, 72 MISCREG_UNIQ, 73 MISCREG_LOCKFLAG, 74 MISCREG_LOCKADDR, 75 MISCREG_INTR, 76 NUM_MISCREGS 77}; 78 79// semantically meaningful register indices 80const RegIndex ZeroReg = 31; // architecturally meaningful 81// the rest of these depend on the ABI 82const RegIndex StackPointerReg = 30; 83const RegIndex GlobalPointerReg = 29; 84const RegIndex ProcedureValueReg = 27; 85const RegIndex ReturnAddressReg = 26; 86const RegIndex ReturnValueReg = 0; 87const RegIndex FramePointerReg = 15; 88 89const RegIndex SyscallNumReg = 0; 90const RegIndex FirstArgumentReg = 16; 91const RegIndex SyscallPseudoReturnReg = 20; 92const RegIndex SyscallSuccessReg = 19; 93 94const int NumIntArchRegs = 32; 95const int NumPALShadowRegs = 8; 96const int NumFloatArchRegs = 32; 97 98const int NumIntRegs = NumIntArchRegs + NumPALShadowRegs; 99const int NumFloatRegs = NumFloatArchRegs; 100const int NumCCRegs = 0; 101const int NumMiscRegs = NUM_MISCREGS; 102 103const int TotalNumRegs = 104 NumIntRegs + NumFloatRegs + NumMiscRegs; 105 106} // namespace AlphaISA 107 108#endif // __ARCH_ALPHA_REGFILE_HH__ 109