process.cc revision 11389:1e55f16160cb
1/* 2 * Copyright (c) 2003-2004 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * Authors: Gabe Black 29 * Ali Saidi 30 */ 31 32#include "arch/alpha/isa_traits.hh" 33#include "arch/alpha/process.hh" 34#include "base/loader/elf_object.hh" 35#include "base/loader/object_file.hh" 36#include "base/misc.hh" 37#include "cpu/thread_context.hh" 38#include "debug/Loader.hh" 39#include "mem/page_table.hh" 40#include "sim/byteswap.hh" 41#include "sim/process_impl.hh" 42#include "sim/system.hh" 43 44using namespace AlphaISA; 45using namespace std; 46 47AlphaLiveProcess::AlphaLiveProcess(LiveProcessParams *params, 48 ObjectFile *objFile) 49 : LiveProcess(params, objFile) 50{ 51 brk_point = objFile->dataBase() + objFile->dataSize() + objFile->bssSize(); 52 brk_point = roundUp(brk_point, PageBytes); 53 54 // Set up stack. On Alpha, stack goes below text section. This 55 // code should get moved to some architecture-specific spot. 56 stack_base = objFile->textBase() - (409600+4096); 57 58 // Set up region for mmaps. Tru64 seems to start just above 0 and 59 // grow up from there. 60 mmap_end = 0x10000; 61 62 // Set pointer for next thread stack. Reserve 8M for main stack. 63 next_thread_stack_base = stack_base - (8 * 1024 * 1024); 64 65} 66 67void 68AlphaLiveProcess::argsInit(int intSize, int pageSize) 69{ 70 // Patch the ld_bias for dynamic executables. 71 updateBias(); 72 73 objFile->loadSections(initVirtMem); 74 75 typedef AuxVector<uint64_t> auxv_t; 76 std::vector<auxv_t> auxv; 77 78 ElfObject * elfObject = dynamic_cast<ElfObject *>(objFile); 79 if (elfObject) 80 { 81 // modern glibc uses a bunch of auxiliary vectors to set up 82 // TLS as well as do a bunch of other stuff 83 // these vectors go on the bottom of the stack, below argc/argv/envp 84 // pointers but above actual arg strings 85 // I don't have all the ones glibc looks at here, but so far it doesn't 86 // seem to be a problem. 87 // check out _dl_aux_init() in glibc/elf/dl-support.c for details 88 // --Lisa 89 auxv.push_back(auxv_t(M5_AT_PAGESZ, AlphaISA::PageBytes)); 90 auxv.push_back(auxv_t(M5_AT_CLKTCK, 100)); 91 auxv.push_back(auxv_t(M5_AT_PHDR, elfObject->programHeaderTable())); 92 DPRINTF(Loader, "auxv at PHDR %08p\n", elfObject->programHeaderTable()); 93 auxv.push_back(auxv_t(M5_AT_PHNUM, elfObject->programHeaderCount())); 94 // This is the base address of the ELF interpreter; it should be 95 // zero for static executables or contain the base address for 96 // dynamic executables. 97 auxv.push_back(auxv_t(M5_AT_BASE, getBias())); 98 auxv.push_back(auxv_t(M5_AT_ENTRY, objFile->entryPoint())); 99 auxv.push_back(auxv_t(M5_AT_UID, uid())); 100 auxv.push_back(auxv_t(M5_AT_EUID, euid())); 101 auxv.push_back(auxv_t(M5_AT_GID, gid())); 102 auxv.push_back(auxv_t(M5_AT_EGID, egid())); 103 104 } 105 106 // Calculate how much space we need for arg & env & auxv arrays. 107 int argv_array_size = intSize * (argv.size() + 1); 108 int envp_array_size = intSize * (envp.size() + 1); 109 int auxv_array_size = intSize * 2 * (auxv.size() + 1); 110 111 int arg_data_size = 0; 112 for (vector<string>::size_type i = 0; i < argv.size(); ++i) { 113 arg_data_size += argv[i].size() + 1; 114 } 115 int env_data_size = 0; 116 for (vector<string>::size_type i = 0; i < envp.size(); ++i) { 117 env_data_size += envp[i].size() + 1; 118 } 119 120 int space_needed = 121 argv_array_size + 122 envp_array_size + 123 auxv_array_size + 124 arg_data_size + 125 env_data_size; 126 127 if (space_needed < 32*1024) 128 space_needed = 32*1024; 129 130 // set bottom of stack 131 stack_min = stack_base - space_needed; 132 // align it 133 stack_min = roundDown(stack_min, pageSize); 134 stack_size = stack_base - stack_min; 135 // map memory 136 allocateMem(stack_min, roundUp(stack_size, pageSize)); 137 138 // map out initial stack contents 139 Addr argv_array_base = stack_min + intSize; // room for argc 140 Addr envp_array_base = argv_array_base + argv_array_size; 141 Addr auxv_array_base = envp_array_base + envp_array_size; 142 Addr arg_data_base = auxv_array_base + auxv_array_size; 143 Addr env_data_base = arg_data_base + arg_data_size; 144 145 // write contents to stack 146 uint64_t argc = argv.size(); 147 if (intSize == 8) 148 argc = htog((uint64_t)argc); 149 else if (intSize == 4) 150 argc = htog((uint32_t)argc); 151 else 152 panic("Unknown int size"); 153 154 initVirtMem.writeBlob(stack_min, (uint8_t*)&argc, intSize); 155 156 copyStringArray(argv, argv_array_base, arg_data_base, initVirtMem); 157 copyStringArray(envp, envp_array_base, env_data_base, initVirtMem); 158 159 //Copy the aux stuff 160 for (vector<auxv_t>::size_type x = 0; x < auxv.size(); x++) { 161 initVirtMem.writeBlob(auxv_array_base + x * 2 * intSize, 162 (uint8_t*)&(auxv[x].a_type), intSize); 163 initVirtMem.writeBlob(auxv_array_base + (x * 2 + 1) * intSize, 164 (uint8_t*)&(auxv[x].a_val), intSize); 165 } 166 167 ThreadContext *tc = system->getThreadContext(contextIds[0]); 168 169 setSyscallArg(tc, 0, argc); 170 setSyscallArg(tc, 1, argv_array_base); 171 tc->setIntReg(StackPointerReg, stack_min); 172 173 tc->pcState(getStartPC()); 174} 175 176void 177AlphaLiveProcess::setupASNReg() 178{ 179 ThreadContext *tc = system->getThreadContext(contextIds[0]); 180 tc->setMiscRegNoEffect(IPR_DTB_ASN, M5_pid << 57); 181} 182 183 184void 185AlphaLiveProcess::loadState(CheckpointIn &cp) 186{ 187 LiveProcess::loadState(cp); 188 // need to set up ASN after unserialization since M5_pid value may 189 // come from checkpoint 190 setupASNReg(); 191} 192 193 194void 195AlphaLiveProcess::initState() 196{ 197 // need to set up ASN before further initialization since init 198 // will involve writing to virtual memory addresses 199 setupASNReg(); 200 201 LiveProcess::initState(); 202 203 argsInit(MachineBytes, PageBytes); 204 205 ThreadContext *tc = system->getThreadContext(contextIds[0]); 206 tc->setIntReg(GlobalPointerReg, objFile->globalPointer()); 207 //Operate in user mode 208 tc->setMiscRegNoEffect(IPR_ICM, mode_user << 3); 209 tc->setMiscRegNoEffect(IPR_DTB_CM, mode_user << 3); 210 //No super page mapping 211 tc->setMiscRegNoEffect(IPR_MCSR, 0); 212} 213 214AlphaISA::IntReg 215AlphaLiveProcess::getSyscallArg(ThreadContext *tc, int &i) 216{ 217 assert(i < 6); 218 return tc->readIntReg(FirstArgumentReg + i++); 219} 220 221void 222AlphaLiveProcess::setSyscallArg(ThreadContext *tc, 223 int i, AlphaISA::IntReg val) 224{ 225 assert(i < 6); 226 tc->setIntReg(FirstArgumentReg + i, val); 227} 228 229void 230AlphaLiveProcess::setSyscallReturn(ThreadContext *tc, SyscallReturn sysret) 231{ 232 // check for error condition. Alpha syscall convention is to 233 // indicate success/failure in reg a3 (r19) and put the 234 // return value itself in the standard return value reg (v0). 235 if (sysret.successful()) { 236 // no error 237 tc->setIntReg(SyscallSuccessReg, 0); 238 tc->setIntReg(ReturnValueReg, sysret.returnValue()); 239 } else { 240 // got an error, return details 241 tc->setIntReg(SyscallSuccessReg, (IntReg)-1); 242 tc->setIntReg(ReturnValueReg, sysret.errnoValue()); 243 } 244} 245