process.cc revision 11320
111308Santhony.gutierrez@amd.com/* 211308Santhony.gutierrez@amd.com * Copyright (c) 2003-2004 The Regents of The University of Michigan 311308Santhony.gutierrez@amd.com * All rights reserved. 411308Santhony.gutierrez@amd.com * 511308Santhony.gutierrez@amd.com * Redistribution and use in source and binary forms, with or without 611308Santhony.gutierrez@amd.com * modification, are permitted provided that the following conditions are 711308Santhony.gutierrez@amd.com * met: redistributions of source code must retain the above copyright 811308Santhony.gutierrez@amd.com * notice, this list of conditions and the following disclaimer; 911308Santhony.gutierrez@amd.com * redistributions in binary form must reproduce the above copyright 1011308Santhony.gutierrez@amd.com * notice, this list of conditions and the following disclaimer in the 1111308Santhony.gutierrez@amd.com * documentation and/or other materials provided with the distribution; 1211308Santhony.gutierrez@amd.com * neither the name of the copyright holders nor the names of its 1311308Santhony.gutierrez@amd.com * contributors may be used to endorse or promote products derived from 1411308Santhony.gutierrez@amd.com * this software without specific prior written permission. 1511308Santhony.gutierrez@amd.com * 1611308Santhony.gutierrez@amd.com * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 1712697Santhony.gutierrez@amd.com * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 1812697Santhony.gutierrez@amd.com * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 1912697Santhony.gutierrez@amd.com * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 2011308Santhony.gutierrez@amd.com * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 2111308Santhony.gutierrez@amd.com * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 2211308Santhony.gutierrez@amd.com * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 2311308Santhony.gutierrez@amd.com * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 2411308Santhony.gutierrez@amd.com * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 2511308Santhony.gutierrez@amd.com * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 2611308Santhony.gutierrez@amd.com * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 2711308Santhony.gutierrez@amd.com * 2811308Santhony.gutierrez@amd.com * Authors: Gabe Black 2911308Santhony.gutierrez@amd.com * Ali Saidi 3011308Santhony.gutierrez@amd.com */ 3111308Santhony.gutierrez@amd.com 3211308Santhony.gutierrez@amd.com#include "arch/alpha/isa_traits.hh" 3312697Santhony.gutierrez@amd.com#include "arch/alpha/process.hh" 3411308Santhony.gutierrez@amd.com#include "base/loader/elf_object.hh" 3511308Santhony.gutierrez@amd.com#include "base/loader/object_file.hh" 3611308Santhony.gutierrez@amd.com#include "base/misc.hh" 3711308Santhony.gutierrez@amd.com#include "cpu/thread_context.hh" 3811308Santhony.gutierrez@amd.com#include "debug/Loader.hh" 3911308Santhony.gutierrez@amd.com#include "mem/page_table.hh" 4011308Santhony.gutierrez@amd.com#include "sim/byteswap.hh" 4111308Santhony.gutierrez@amd.com#include "sim/process_impl.hh" 4211308Santhony.gutierrez@amd.com#include "sim/system.hh" 4311308Santhony.gutierrez@amd.com 4411308Santhony.gutierrez@amd.comusing namespace AlphaISA; 4511308Santhony.gutierrez@amd.comusing namespace std; 4611308Santhony.gutierrez@amd.com 4711308Santhony.gutierrez@amd.comAlphaLiveProcess::AlphaLiveProcess(LiveProcessParams *params, 4811308Santhony.gutierrez@amd.com ObjectFile *objFile) 4912334Sgabeblack@google.com : LiveProcess(params, objFile) 5011308Santhony.gutierrez@amd.com{ 5111308Santhony.gutierrez@amd.com brk_point = objFile->dataBase() + objFile->dataSize() + objFile->bssSize(); 5211308Santhony.gutierrez@amd.com brk_point = roundUp(brk_point, PageBytes); 5311308Santhony.gutierrez@amd.com 5411308Santhony.gutierrez@amd.com // Set up stack. On Alpha, stack goes below text section. This 5513892Sgabeblack@google.com // code should get moved to some architecture-specific spot. 5611308Santhony.gutierrez@amd.com stack_base = objFile->textBase() - (409600+4096); 5711308Santhony.gutierrez@amd.com 5811308Santhony.gutierrez@amd.com // Set up region for mmaps. Tru64 seems to start just above 0 and 5911308Santhony.gutierrez@amd.com // grow up from there. 6011308Santhony.gutierrez@amd.com mmap_start = mmap_end = 0x10000; 6111308Santhony.gutierrez@amd.com 6213892Sgabeblack@google.com // Set pointer for next thread stack. Reserve 8M for main stack. 6311308Santhony.gutierrez@amd.com next_thread_stack_base = stack_base - (8 * 1024 * 1024); 6411308Santhony.gutierrez@amd.com 6511308Santhony.gutierrez@amd.com} 6611308Santhony.gutierrez@amd.com 6711308Santhony.gutierrez@amd.comvoid 6813892Sgabeblack@google.comAlphaLiveProcess::argsInit(int intSize, int pageSize) 6911308Santhony.gutierrez@amd.com{ 7011308Santhony.gutierrez@amd.com objFile->loadSections(initVirtMem); 7111308Santhony.gutierrez@amd.com 7211308Santhony.gutierrez@amd.com typedef AuxVector<uint64_t> auxv_t; 7311308Santhony.gutierrez@amd.com std::vector<auxv_t> auxv; 7411308Santhony.gutierrez@amd.com 7511308Santhony.gutierrez@amd.com ElfObject * elfObject = dynamic_cast<ElfObject *>(objFile); 7611308Santhony.gutierrez@amd.com if(elfObject) 7711308Santhony.gutierrez@amd.com { 7811308Santhony.gutierrez@amd.com // modern glibc uses a bunch of auxiliary vectors to set up 7911308Santhony.gutierrez@amd.com // TLS as well as do a bunch of other stuff 8011308Santhony.gutierrez@amd.com // these vectors go on the bottom of the stack, below argc/argv/envp 8111308Santhony.gutierrez@amd.com // pointers but above actual arg strings 8211308Santhony.gutierrez@amd.com // I don't have all the ones glibc looks at here, but so far it doesn't 8311308Santhony.gutierrez@amd.com // seem to be a problem. 8411308Santhony.gutierrez@amd.com // check out _dl_aux_init() in glibc/elf/dl-support.c for details 8511308Santhony.gutierrez@amd.com // --Lisa 8611308Santhony.gutierrez@amd.com auxv.push_back(auxv_t(M5_AT_PAGESZ, AlphaISA::PageBytes)); 8711308Santhony.gutierrez@amd.com auxv.push_back(auxv_t(M5_AT_CLKTCK, 100)); 8811308Santhony.gutierrez@amd.com auxv.push_back(auxv_t(M5_AT_PHDR, elfObject->programHeaderTable())); 8911308Santhony.gutierrez@amd.com DPRINTF(Loader, "auxv at PHDR %08p\n", elfObject->programHeaderTable()); 9011308Santhony.gutierrez@amd.com auxv.push_back(auxv_t(M5_AT_PHNUM, elfObject->programHeaderCount())); 9111308Santhony.gutierrez@amd.com auxv.push_back(auxv_t(M5_AT_ENTRY, objFile->entryPoint())); 9211308Santhony.gutierrez@amd.com auxv.push_back(auxv_t(M5_AT_UID, uid())); 9311308Santhony.gutierrez@amd.com auxv.push_back(auxv_t(M5_AT_EUID, euid())); 9411308Santhony.gutierrez@amd.com auxv.push_back(auxv_t(M5_AT_GID, gid())); 9511308Santhony.gutierrez@amd.com auxv.push_back(auxv_t(M5_AT_EGID, egid())); 9611308Santhony.gutierrez@amd.com 9711308Santhony.gutierrez@amd.com } 9811308Santhony.gutierrez@amd.com 9911308Santhony.gutierrez@amd.com // Calculate how much space we need for arg & env & auxv arrays. 10011308Santhony.gutierrez@amd.com int argv_array_size = intSize * (argv.size() + 1); 10111308Santhony.gutierrez@amd.com int envp_array_size = intSize * (envp.size() + 1); 10211308Santhony.gutierrez@amd.com int auxv_array_size = intSize * 2 * (auxv.size() + 1); 10311308Santhony.gutierrez@amd.com 10411308Santhony.gutierrez@amd.com int arg_data_size = 0; 10511308Santhony.gutierrez@amd.com for (vector<string>::size_type i = 0; i < argv.size(); ++i) { 10611308Santhony.gutierrez@amd.com arg_data_size += argv[i].size() + 1; 10711308Santhony.gutierrez@amd.com } 10811308Santhony.gutierrez@amd.com int env_data_size = 0; 10911308Santhony.gutierrez@amd.com for (vector<string>::size_type i = 0; i < envp.size(); ++i) { 11011308Santhony.gutierrez@amd.com env_data_size += envp[i].size() + 1; 11111308Santhony.gutierrez@amd.com } 11211308Santhony.gutierrez@amd.com 11311308Santhony.gutierrez@amd.com int space_needed = 11411308Santhony.gutierrez@amd.com argv_array_size + 11511308Santhony.gutierrez@amd.com envp_array_size + 11611308Santhony.gutierrez@amd.com auxv_array_size + 11711308Santhony.gutierrez@amd.com arg_data_size + 11811308Santhony.gutierrez@amd.com env_data_size; 11911308Santhony.gutierrez@amd.com 12011308Santhony.gutierrez@amd.com if (space_needed < 32*1024) 12111308Santhony.gutierrez@amd.com space_needed = 32*1024; 12211308Santhony.gutierrez@amd.com 12311308Santhony.gutierrez@amd.com // set bottom of stack 12411308Santhony.gutierrez@amd.com stack_min = stack_base - space_needed; 12511308Santhony.gutierrez@amd.com // align it 12611308Santhony.gutierrez@amd.com stack_min = roundDown(stack_min, pageSize); 12711308Santhony.gutierrez@amd.com stack_size = stack_base - stack_min; 12811308Santhony.gutierrez@amd.com // map memory 12911308Santhony.gutierrez@amd.com allocateMem(stack_min, roundUp(stack_size, pageSize)); 13011308Santhony.gutierrez@amd.com 13111308Santhony.gutierrez@amd.com // map out initial stack contents 13211308Santhony.gutierrez@amd.com Addr argv_array_base = stack_min + intSize; // room for argc 13311308Santhony.gutierrez@amd.com Addr envp_array_base = argv_array_base + argv_array_size; 13411308Santhony.gutierrez@amd.com Addr auxv_array_base = envp_array_base + envp_array_size; 13511308Santhony.gutierrez@amd.com Addr arg_data_base = auxv_array_base + auxv_array_size; 13611308Santhony.gutierrez@amd.com Addr env_data_base = arg_data_base + arg_data_size; 13711308Santhony.gutierrez@amd.com 13811308Santhony.gutierrez@amd.com // write contents to stack 13911308Santhony.gutierrez@amd.com uint64_t argc = argv.size(); 14011308Santhony.gutierrez@amd.com if (intSize == 8) 14111308Santhony.gutierrez@amd.com argc = htog((uint64_t)argc); 14211308Santhony.gutierrez@amd.com else if (intSize == 4) 14311308Santhony.gutierrez@amd.com argc = htog((uint32_t)argc); 14411308Santhony.gutierrez@amd.com else 14511308Santhony.gutierrez@amd.com panic("Unknown int size"); 14614292Sjqu32@wisc.edu 14711308Santhony.gutierrez@amd.com initVirtMem.writeBlob(stack_min, (uint8_t*)&argc, intSize); 14811308Santhony.gutierrez@amd.com 14911308Santhony.gutierrez@amd.com copyStringArray(argv, argv_array_base, arg_data_base, initVirtMem); 15011308Santhony.gutierrez@amd.com copyStringArray(envp, envp_array_base, env_data_base, initVirtMem); 15111308Santhony.gutierrez@amd.com 15211308Santhony.gutierrez@amd.com //Copy the aux stuff 15311308Santhony.gutierrez@amd.com for (vector<auxv_t>::size_type x = 0; x < auxv.size(); x++) { 15411308Santhony.gutierrez@amd.com initVirtMem.writeBlob(auxv_array_base + x * 2 * intSize, 15511308Santhony.gutierrez@amd.com (uint8_t*)&(auxv[x].a_type), intSize); 15611308Santhony.gutierrez@amd.com initVirtMem.writeBlob(auxv_array_base + (x * 2 + 1) * intSize, 15711308Santhony.gutierrez@amd.com (uint8_t*)&(auxv[x].a_val), intSize); 15811308Santhony.gutierrez@amd.com } 15911308Santhony.gutierrez@amd.com 16011308Santhony.gutierrez@amd.com ThreadContext *tc = system->getThreadContext(contextIds[0]); 16111308Santhony.gutierrez@amd.com 16211308Santhony.gutierrez@amd.com setSyscallArg(tc, 0, argc); 16311308Santhony.gutierrez@amd.com setSyscallArg(tc, 1, argv_array_base); 16411308Santhony.gutierrez@amd.com tc->setIntReg(StackPointerReg, stack_min); 16511308Santhony.gutierrez@amd.com 16611308Santhony.gutierrez@amd.com tc->pcState(objFile->entryPoint()); 16711308Santhony.gutierrez@amd.com} 16811308Santhony.gutierrez@amd.com 16911308Santhony.gutierrez@amd.comvoid 17011308Santhony.gutierrez@amd.comAlphaLiveProcess::setupASNReg() 17111308Santhony.gutierrez@amd.com{ 17211308Santhony.gutierrez@amd.com ThreadContext *tc = system->getThreadContext(contextIds[0]); 17311308Santhony.gutierrez@amd.com tc->setMiscRegNoEffect(IPR_DTB_ASN, M5_pid << 57); 17411308Santhony.gutierrez@amd.com} 17511308Santhony.gutierrez@amd.com 17611308Santhony.gutierrez@amd.com 17711308Santhony.gutierrez@amd.comvoid 17811308Santhony.gutierrez@amd.comAlphaLiveProcess::loadState(CheckpointIn &cp) 17911308Santhony.gutierrez@amd.com{ 18011308Santhony.gutierrez@amd.com LiveProcess::loadState(cp); 18111308Santhony.gutierrez@amd.com // need to set up ASN after unserialization since M5_pid value may 18211308Santhony.gutierrez@amd.com // come from checkpoint 18311308Santhony.gutierrez@amd.com setupASNReg(); 18411308Santhony.gutierrez@amd.com} 18511308Santhony.gutierrez@amd.com 18611308Santhony.gutierrez@amd.com 18711308Santhony.gutierrez@amd.comvoid 18811308Santhony.gutierrez@amd.comAlphaLiveProcess::initState() 18911308Santhony.gutierrez@amd.com{ 19011308Santhony.gutierrez@amd.com // need to set up ASN before further initialization since init 19111308Santhony.gutierrez@amd.com // will involve writing to virtual memory addresses 19211308Santhony.gutierrez@amd.com setupASNReg(); 19311308Santhony.gutierrez@amd.com 19411308Santhony.gutierrez@amd.com LiveProcess::initState(); 19511308Santhony.gutierrez@amd.com 19611308Santhony.gutierrez@amd.com argsInit(MachineBytes, PageBytes); 19711308Santhony.gutierrez@amd.com 19811308Santhony.gutierrez@amd.com ThreadContext *tc = system->getThreadContext(contextIds[0]); 19911308Santhony.gutierrez@amd.com tc->setIntReg(GlobalPointerReg, objFile->globalPointer()); 20011308Santhony.gutierrez@amd.com //Operate in user mode 20111308Santhony.gutierrez@amd.com tc->setMiscRegNoEffect(IPR_ICM, mode_user << 3); 20211308Santhony.gutierrez@amd.com tc->setMiscRegNoEffect(IPR_DTB_CM, mode_user << 3); 20311308Santhony.gutierrez@amd.com //No super page mapping 20411308Santhony.gutierrez@amd.com tc->setMiscRegNoEffect(IPR_MCSR, 0); 20511308Santhony.gutierrez@amd.com} 20611308Santhony.gutierrez@amd.com 20711308Santhony.gutierrez@amd.comAlphaISA::IntReg 20811308Santhony.gutierrez@amd.comAlphaLiveProcess::getSyscallArg(ThreadContext *tc, int &i) 20911308Santhony.gutierrez@amd.com{ 21011308Santhony.gutierrez@amd.com assert(i < 6); 21111308Santhony.gutierrez@amd.com return tc->readIntReg(FirstArgumentReg + i++); 21211308Santhony.gutierrez@amd.com} 21311308Santhony.gutierrez@amd.com 21413784Sgabeblack@google.comvoid 21513784Sgabeblack@google.comAlphaLiveProcess::setSyscallArg(ThreadContext *tc, 21611308Santhony.gutierrez@amd.com int i, AlphaISA::IntReg val) 21712126Sspwilson2@wisc.edu{ 21812126Sspwilson2@wisc.edu assert(i < 6); 21912126Sspwilson2@wisc.edu tc->setIntReg(FirstArgumentReg + i, val); 22011308Santhony.gutierrez@amd.com} 22112126Sspwilson2@wisc.edu 22212126Sspwilson2@wisc.eduvoid 22312126Sspwilson2@wisc.eduAlphaLiveProcess::setSyscallReturn(ThreadContext *tc, SyscallReturn sysret) 22412126Sspwilson2@wisc.edu{ 22511308Santhony.gutierrez@amd.com // check for error condition. Alpha syscall convention is to 22611308Santhony.gutierrez@amd.com // indicate success/failure in reg a3 (r19) and put the 22711308Santhony.gutierrez@amd.com // return value itself in the standard return value reg (v0). 22811308Santhony.gutierrez@amd.com if (sysret.successful()) { 22911308Santhony.gutierrez@amd.com // no error 23011308Santhony.gutierrez@amd.com tc->setIntReg(SyscallSuccessReg, 0); 23111308Santhony.gutierrez@amd.com tc->setIntReg(ReturnValueReg, sysret.returnValue()); 232 } else { 233 // got an error, return details 234 tc->setIntReg(SyscallSuccessReg, (IntReg)-1); 235 tc->setIntReg(ReturnValueReg, sysret.errnoValue()); 236 } 237} 238