system.hh revision 5569
1451SN/A/* 22212SN/A * Copyright (c) 2004-2006 The Regents of The University of Michigan 3451SN/A * All rights reserved. 4451SN/A * 5451SN/A * Redistribution and use in source and binary forms, with or without 6451SN/A * modification, are permitted provided that the following conditions are 7451SN/A * met: redistributions of source code must retain the above copyright 8451SN/A * notice, this list of conditions and the following disclaimer; 9451SN/A * redistributions in binary form must reproduce the above copyright 10451SN/A * notice, this list of conditions and the following disclaimer in the 11451SN/A * documentation and/or other materials provided with the distribution; 12451SN/A * neither the name of the copyright holders nor the names of its 13451SN/A * contributors may be used to endorse or promote products derived from 14451SN/A * this software without specific prior written permission. 15451SN/A * 16451SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17451SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18451SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19451SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20451SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21451SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22451SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23451SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24451SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25451SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26451SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 272665Ssaidi@eecs.umich.edu * 282665Ssaidi@eecs.umich.edu * Authors: Ali Saidi 292665Ssaidi@eecs.umich.edu * Lisa Hsu 302665Ssaidi@eecs.umich.edu * Nathan Binkert 31451SN/A */ 32451SN/A 332212SN/A#ifndef __ARCH_ALPHA_LINUX_SYSTEM_HH__ 342212SN/A#define __ARCH_ALPHA_LINUX_SYSTEM_HH__ 35451SN/A 362680Sktlim@umich.educlass ThreadContext; 371070SN/A 381070SN/Aclass BreakPCEvent; 391070SN/Aclass IdleStartEvent; 402212SN/A 413565Sgblack@eecs.umich.edu#include "arch/alpha/idle_event.hh" 422212SN/A#include "arch/alpha/system.hh" 432212SN/A#include "kern/linux/events.hh" 444762Snate@binkert.org#include "params/LinuxAlphaSystem.hh" 452212SN/A 462212SN/Ausing namespace AlphaISA; 472212SN/Ausing namespace Linux; 48451SN/A 49885SN/A/** 502343SN/A * This class contains linux specific system code (Loading, Events). 51885SN/A * It points to objects that are the system binaries to load and patches them 52885SN/A * appropriately to work in simulator. 53885SN/A */ 542212SN/Aclass LinuxAlphaSystem : public AlphaSystem 55451SN/A{ 56451SN/A private: 575569Snate@binkert.org struct SkipDelayLoopEvent : public SkipFuncEvent 581885SN/A { 591885SN/A SkipDelayLoopEvent(PCEventQueue *q, const std::string &desc, Addr addr) 601885SN/A : SkipFuncEvent(q, desc, addr) {} 612680Sktlim@umich.edu virtual void process(ThreadContext *tc); 621885SN/A }; 631885SN/A 645569Snate@binkert.org struct PrintThreadInfo : public PCEvent 651885SN/A { 661885SN/A PrintThreadInfo(PCEventQueue *q, const std::string &desc, Addr addr) 671885SN/A : PCEvent(q, desc, addr) {} 682680Sktlim@umich.edu virtual void process(ThreadContext *tc); 691885SN/A }; 701885SN/A 711855SN/A /** 721855SN/A * Addresses defining where the kernel bootloader places various 731855SN/A * elements. Details found in include/asm-alpha/system.h 741855SN/A */ 751855SN/A Addr KernelStart; // Lookup the symbol swapper_pg_dir 761855SN/A 771855SN/A public: 781855SN/A Addr InitStack() const { return KernelStart + 0x02000; } 791855SN/A Addr EmptyPGT() const { return KernelStart + 0x04000; } 801855SN/A Addr EmptyPGE() const { return KernelStart + 0x08000; } 811855SN/A Addr ZeroPGE() const { return KernelStart + 0x0A000; } 821855SN/A Addr StartAddr() const { return KernelStart + 0x10000; } 831855SN/A 841855SN/A Addr Param() const { return ZeroPGE() + 0x0; } 851855SN/A Addr CommandLine() const { return Param() + 0x0; } 861855SN/A Addr InitrdStart() const { return Param() + 0x100; } 871855SN/A Addr InitrdSize() const { return Param() + 0x108; } 881855SN/A static const int CommandLineSize = 256; 891855SN/A 901855SN/A private: 911492SN/A#ifndef NDEBUG 92887SN/A /** Event to halt the simulator if the kernel calls panic() */ 93451SN/A BreakPCEvent *kernelPanicEvent; 941492SN/A 951492SN/A /** Event to halt the simulator if the kernel calls die_if_kernel */ 961492SN/A BreakPCEvent *kernelDieEvent; 971070SN/A#endif 98887SN/A 991070SN/A /** 1001070SN/A * Event to skip determine_cpu_caches() because we don't support 1011070SN/A * the IPRs that the code can access to figure out cache sizes 102887SN/A */ 103885SN/A SkipFuncEvent *skipCacheProbeEvent; 104887SN/A 105887SN/A /** PC based event to skip the ide_delay_50ms() call */ 106885SN/A SkipFuncEvent *skipIdeDelay50msEvent; 107887SN/A 1081070SN/A /** 1091070SN/A * PC based event to skip the dprink() call and emulate its 1101070SN/A * functionality 1111070SN/A */ 1121039SN/A DebugPrintkEvent *debugPrintkEvent; 1131039SN/A 1141070SN/A /** 1151070SN/A * Skip calculate_delay_loop() rather than waiting for this to be 116887SN/A * calculated 117887SN/A */ 1181885SN/A SkipDelayLoopEvent *skipDelayLoopEvent; 119841SN/A 1201082SN/A /** 1211082SN/A * Event to print information about thread switches if the trace flag 1221082SN/A * Thread is set 1231082SN/A */ 1241067SN/A PrintThreadInfo *printThreadEvent; 1251067SN/A 1261070SN/A /** Grab the PCBB of the idle process when it starts */ 1271070SN/A IdleStartEvent *idleStartEvent; 128451SN/A 129451SN/A public: 1304762Snate@binkert.org typedef LinuxAlphaSystemParams Params; 1312212SN/A LinuxAlphaSystem(Params *p); 1322212SN/A ~LinuxAlphaSystem(); 133451SN/A 1342680Sktlim@umich.edu void setDelayLoop(ThreadContext *tc); 135451SN/A}; 136451SN/A 1372212SN/A#endif // __ARCH_ALPHA_LINUX_SYSTEM_HH__ 138