system.cc revision 8852
1451SN/A/* 21762SN/A * Copyright (c) 2004-2005 The Regents of The University of Michigan 3451SN/A * All rights reserved. 4451SN/A * 5451SN/A * Redistribution and use in source and binary forms, with or without 6451SN/A * modification, are permitted provided that the following conditions are 7451SN/A * met: redistributions of source code must retain the above copyright 8451SN/A * notice, this list of conditions and the following disclaimer; 9451SN/A * redistributions in binary form must reproduce the above copyright 10451SN/A * notice, this list of conditions and the following disclaimer in the 11451SN/A * documentation and/or other materials provided with the distribution; 12451SN/A * neither the name of the copyright holders nor the names of its 13451SN/A * contributors may be used to endorse or promote products derived from 14451SN/A * this software without specific prior written permission. 15451SN/A * 16451SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17451SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18451SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19451SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20451SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21451SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22451SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23451SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24451SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25451SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26451SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 272665Ssaidi@eecs.umich.edu * 282665Ssaidi@eecs.umich.edu * Authors: Ali Saidi 292665Ssaidi@eecs.umich.edu * Lisa Hsu 302665Ssaidi@eecs.umich.edu * Nathan Binkert 312665Ssaidi@eecs.umich.edu * Steve Reinhardt 32451SN/A */ 33451SN/A 34885SN/A/** 35885SN/A * @file 361040SN/A * This code loads the linux kernel, console, pal and patches certain 371040SN/A * functions. The symbol tables are loaded so that traces can show 381040SN/A * the executing function and we can skip functions. Various delay 391040SN/A * loops are skipped and their final values manually computed to speed 401040SN/A * up boot time. 41885SN/A */ 42885SN/A 432212SN/A#include "arch/alpha/linux/system.hh" 442212SN/A#include "arch/alpha/linux/threadinfo.hh" 458229Snate@binkert.org#include "arch/alpha/idle_event.hh" 462158SN/A#include "arch/alpha/system.hh" 478229Snate@binkert.org#include "arch/vtophys.hh" 481180SN/A#include "base/loader/symtab.hh" 498229Snate@binkert.org#include "cpu/base.hh" 502680Sktlim@umich.edu#include "cpu/thread_context.hh" 518232Snate@binkert.org#include "debug/Thread.hh" 528229Snate@binkert.org#include "kern/linux/events.hh" 531885SN/A#include "kern/linux/printk.hh" 542521SN/A#include "mem/physical.hh" 552521SN/A#include "mem/port.hh" 564826Ssaidi@eecs.umich.edu#include "sim/arguments.hh" 572036SN/A#include "sim/byteswap.hh" 58451SN/A 59451SN/Ausing namespace std; 602212SN/Ausing namespace AlphaISA; 612212SN/Ausing namespace Linux; 62451SN/A 632212SN/ALinuxAlphaSystem::LinuxAlphaSystem(Params *p) 642158SN/A : AlphaSystem(p) 65451SN/A{ 668706Sandreas.hansson@arm.com} 678706Sandreas.hansson@arm.com 688706Sandreas.hansson@arm.comvoid 698706Sandreas.hansson@arm.comLinuxAlphaSystem::initState() 708706Sandreas.hansson@arm.com{ 718706Sandreas.hansson@arm.com // Moved from the constructor to here since it relies on the 728706Sandreas.hansson@arm.com // address map being resolved in the interconnect 738706Sandreas.hansson@arm.com 748706Sandreas.hansson@arm.com // Call the initialisation of the super class 758706Sandreas.hansson@arm.com AlphaSystem::initState(); 768706Sandreas.hansson@arm.com 77451SN/A Addr addr = 0; 781855SN/A 791855SN/A /** 801855SN/A * The symbol swapper_pg_dir marks the beginning of the kernel and 811855SN/A * the location of bootloader passed arguments 821855SN/A */ 831855SN/A if (!kernelSymtab->findAddress("swapper_pg_dir", KernelStart)) { 841855SN/A panic("Could not determine start location of kernel"); 851855SN/A } 861855SN/A 871855SN/A /** 881855SN/A * Since we aren't using a bootloader, we have to copy the 891855SN/A * kernel arguments directly into the kernel's memory. 901855SN/A */ 918852Sandreas.hansson@arm.com virtProxy.writeBlob(CommandLine(), 928852Sandreas.hansson@arm.com (uint8_t*)params()->boot_osflags.c_str(), 938852Sandreas.hansson@arm.com params()->boot_osflags.length()+1); 94836SN/A 95885SN/A /** 961070SN/A * find the address of the est_cycle_freq variable and insert it 971070SN/A * so we don't through the lengthly process of trying to 981070SN/A * calculated it by using the PIT, RTC, etc. 99885SN/A */ 1002521SN/A if (kernelSymtab->findAddress("est_cycle_freq", addr)) 1018852Sandreas.hansson@arm.com virtProxy.write(addr, (uint64_t)(SimClock::Frequency / 1028852Sandreas.hansson@arm.com params()->boot_cpu_frequency)); 103451SN/A 104836SN/A 105885SN/A /** 106943SN/A * EV5 only supports 127 ASNs so we are going to tell the kernel that the 107943SN/A * paritiuclar EV6 we have only supports 127 asns. 108943SN/A * @todo At some point we should change ev5.hh and the palcode to support 109943SN/A * 255 ASNs. 110943SN/A */ 1112521SN/A if (kernelSymtab->findAddress("dp264_mv", addr)) 1128852Sandreas.hansson@arm.com virtProxy.write(addr + 0x18, LittleEndianGuest::htog((uint32_t)127)); 1132521SN/A else 1141070SN/A panic("could not find dp264_mv\n"); 115943SN/A 1161492SN/A#ifndef NDEBUG 1171885SN/A kernelPanicEvent = addKernelFuncEvent<BreakPCEvent>("panic"); 1181885SN/A if (!kernelPanicEvent) 119451SN/A panic("could not find kernel symbol \'panic\'"); 1201885SN/A 1211646SN/A#if 0 1221885SN/A kernelDieEvent = addKernelFuncEvent<BreakPCEvent>("die_if_kernel"); 1231885SN/A if (!kernelDieEvent) 1241492SN/A panic("could not find kernel symbol \'die_if_kernel\'"); 1251646SN/A#endif 1261492SN/A 127860SN/A#endif 128451SN/A 129885SN/A /** 1301895SN/A * Any time ide_delay_50ms, calibarte_delay or 1311070SN/A * determine_cpu_caches is called just skip the 1321070SN/A * function. Currently determine_cpu_caches only is used put 1331070SN/A * information in proc, however if that changes in the future we 1341070SN/A * will have to fill in the cache size variables appropriately. 135885SN/A */ 136848SN/A 1371885SN/A skipIdeDelay50msEvent = 1381885SN/A addKernelFuncEvent<SkipFuncEvent>("ide_delay_50ms"); 1391885SN/A skipDelayLoopEvent = 1401885SN/A addKernelFuncEvent<SkipDelayLoopEvent>("calibrate_delay"); 1411885SN/A skipCacheProbeEvent = 1421885SN/A addKernelFuncEvent<SkipFuncEvent>("determine_cpu_caches"); 1431885SN/A debugPrintkEvent = addKernelFuncEvent<DebugPrintkEvent>("dprintk"); 1441885SN/A idleStartEvent = addKernelFuncEvent<IdleStartEvent>("cpu_idle"); 1451885SN/A 1464741Sstever@eecs.umich.edu // Disable for now as it runs into panic() calls in VPTr methods 1474741Sstever@eecs.umich.edu // (see sim/vptr.hh). Once those bugs are fixed, we can 1484741Sstever@eecs.umich.edu // re-enable, but we should find a better way to turn it on than 1494741Sstever@eecs.umich.edu // using DTRACE(Thread), since looking at a trace flag at tick 0 1504741Sstever@eecs.umich.edu // leads to non-intuitive behavior with --trace-start. 1514741Sstever@eecs.umich.edu if (false && kernelSymtab->findAddress("alpha_switch_to", addr)) { 1521885SN/A printThreadEvent = new PrintThreadInfo(&pcEventQueue, "threadinfo", 1531885SN/A addr + sizeof(MachInst) * 6); 1541885SN/A } else { 1551885SN/A printThreadEvent = NULL; 1561657SN/A } 157451SN/A} 158451SN/A 1592212SN/ALinuxAlphaSystem::~LinuxAlphaSystem() 160451SN/A{ 1611492SN/A#ifndef NDEBUG 162451SN/A delete kernelPanicEvent; 1631070SN/A#endif 164869SN/A delete skipIdeDelay50msEvent; 165869SN/A delete skipDelayLoopEvent; 166869SN/A delete skipCacheProbeEvent; 1671070SN/A delete debugPrintkEvent; 1681070SN/A delete idleStartEvent; 1691082SN/A delete printThreadEvent; 170451SN/A} 171451SN/A 172803SN/Avoid 1732680Sktlim@umich.eduLinuxAlphaSystem::setDelayLoop(ThreadContext *tc) 174803SN/A{ 175803SN/A Addr addr = 0; 176803SN/A if (kernelSymtab->findAddress("loops_per_jiffy", addr)) { 1772680Sktlim@umich.edu Tick cpuFreq = tc->getCpuPtr()->frequency(); 1788741Sgblack@eecs.umich.edu assert(intrFreq); 1798852Sandreas.hansson@arm.com FSTranslatingPortProxy &vp = tc->getVirtProxy(); 1808852Sandreas.hansson@arm.com vp.writeHtoG(addr, (uint32_t)((cpuFreq / intrFreq) * 0.9988)); 181803SN/A } 182803SN/A} 183803SN/A 1841885SN/Avoid 1852680Sktlim@umich.eduLinuxAlphaSystem::SkipDelayLoopEvent::process(ThreadContext *tc) 1861885SN/A{ 1872680Sktlim@umich.edu SkipFuncEvent::process(tc); 1881885SN/A // calculate and set loops_per_jiffy 1892680Sktlim@umich.edu ((LinuxAlphaSystem *)tc->getSystemPtr())->setDelayLoop(tc); 1901885SN/A} 1911885SN/A 1921885SN/Avoid 1932680Sktlim@umich.eduLinuxAlphaSystem::PrintThreadInfo::process(ThreadContext *tc) 1941885SN/A{ 1952680Sktlim@umich.edu Linux::ThreadInfo ti(tc); 1961885SN/A 1971885SN/A DPRINTF(Thread, "Currently Executing Thread %s, pid %d, started at: %d\n", 1981885SN/A ti.curTaskName(), ti.curTaskPID(), ti.curTaskStart()); 1991885SN/A} 2001885SN/A 2014762Snate@binkert.orgLinuxAlphaSystem * 2024762Snate@binkert.orgLinuxAlphaSystemParams::create() 203451SN/A{ 2044762Snate@binkert.org return new LinuxAlphaSystem(this); 205451SN/A} 206