system.cc revision 8706
1451SN/A/*
21762SN/A * Copyright (c) 2004-2005 The Regents of The University of Michigan
3451SN/A * All rights reserved.
4451SN/A *
5451SN/A * Redistribution and use in source and binary forms, with or without
6451SN/A * modification, are permitted provided that the following conditions are
7451SN/A * met: redistributions of source code must retain the above copyright
8451SN/A * notice, this list of conditions and the following disclaimer;
9451SN/A * redistributions in binary form must reproduce the above copyright
10451SN/A * notice, this list of conditions and the following disclaimer in the
11451SN/A * documentation and/or other materials provided with the distribution;
12451SN/A * neither the name of the copyright holders nor the names of its
13451SN/A * contributors may be used to endorse or promote products derived from
14451SN/A * this software without specific prior written permission.
15451SN/A *
16451SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17451SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18451SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19451SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20451SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21451SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22451SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23451SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24451SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25451SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26451SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
272665Ssaidi@eecs.umich.edu *
282665Ssaidi@eecs.umich.edu * Authors: Ali Saidi
292665Ssaidi@eecs.umich.edu *          Lisa Hsu
302665Ssaidi@eecs.umich.edu *          Nathan Binkert
312665Ssaidi@eecs.umich.edu *          Steve Reinhardt
32451SN/A */
33451SN/A
34885SN/A/**
35885SN/A * @file
361040SN/A * This code loads the linux kernel, console, pal and patches certain
371040SN/A * functions.  The symbol tables are loaded so that traces can show
381040SN/A * the executing function and we can skip functions. Various delay
391040SN/A * loops are skipped and their final values manually computed to speed
401040SN/A * up boot time.
41885SN/A */
42885SN/A
432212SN/A#include "arch/alpha/linux/system.hh"
442212SN/A#include "arch/alpha/linux/threadinfo.hh"
458229Snate@binkert.org#include "arch/alpha/idle_event.hh"
462158SN/A#include "arch/alpha/system.hh"
478229Snate@binkert.org#include "arch/vtophys.hh"
481180SN/A#include "base/loader/symtab.hh"
498229Snate@binkert.org#include "cpu/base.hh"
502680Sktlim@umich.edu#include "cpu/thread_context.hh"
518232Snate@binkert.org#include "debug/Thread.hh"
522212SN/A#include "dev/platform.hh"
538229Snate@binkert.org#include "kern/linux/events.hh"
541885SN/A#include "kern/linux/printk.hh"
552521SN/A#include "mem/physical.hh"
562521SN/A#include "mem/port.hh"
574826Ssaidi@eecs.umich.edu#include "sim/arguments.hh"
582036SN/A#include "sim/byteswap.hh"
59451SN/A
60451SN/Ausing namespace std;
612212SN/Ausing namespace AlphaISA;
622212SN/Ausing namespace Linux;
63451SN/A
642212SN/ALinuxAlphaSystem::LinuxAlphaSystem(Params *p)
652158SN/A    : AlphaSystem(p)
66451SN/A{
678706Sandreas.hansson@arm.com}
688706Sandreas.hansson@arm.com
698706Sandreas.hansson@arm.comvoid
708706Sandreas.hansson@arm.comLinuxAlphaSystem::initState()
718706Sandreas.hansson@arm.com{
728706Sandreas.hansson@arm.com    // Moved from the constructor to here since it relies on the
738706Sandreas.hansson@arm.com    // address map being resolved in the interconnect
748706Sandreas.hansson@arm.com
758706Sandreas.hansson@arm.com    // Call the initialisation of the super class
768706Sandreas.hansson@arm.com    AlphaSystem::initState();
778706Sandreas.hansson@arm.com
78451SN/A    Addr addr = 0;
791855SN/A
801855SN/A    /**
811855SN/A     * The symbol swapper_pg_dir marks the beginning of the kernel and
821855SN/A     * the location of bootloader passed arguments
831855SN/A     */
841855SN/A    if (!kernelSymtab->findAddress("swapper_pg_dir", KernelStart)) {
851855SN/A        panic("Could not determine start location of kernel");
861855SN/A    }
871855SN/A
881855SN/A    /**
891855SN/A     * Since we aren't using a bootloader, we have to copy the
901855SN/A     * kernel arguments directly into the kernel's memory.
911855SN/A     */
928706Sandreas.hansson@arm.com    virtProxy->writeBlob(CommandLine(),
938706Sandreas.hansson@arm.com                         (uint8_t*)params()->boot_osflags.c_str(),
948706Sandreas.hansson@arm.com                         params()->boot_osflags.length()+1);
95836SN/A
96885SN/A    /**
971070SN/A     * find the address of the est_cycle_freq variable and insert it
981070SN/A     * so we don't through the lengthly process of trying to
991070SN/A     * calculated it by using the PIT, RTC, etc.
100885SN/A     */
1012521SN/A    if (kernelSymtab->findAddress("est_cycle_freq", addr))
1028706Sandreas.hansson@arm.com        virtProxy->write(addr, (uint64_t)(SimClock::Frequency /
1038706Sandreas.hansson@arm.com                                          params()->boot_cpu_frequency));
104451SN/A
105836SN/A
106885SN/A    /**
107943SN/A     * EV5 only supports 127 ASNs so we are going to tell the kernel that the
108943SN/A     * paritiuclar EV6 we have only supports 127 asns.
109943SN/A     * @todo At some point we should change ev5.hh and the palcode to support
110943SN/A     * 255 ASNs.
111943SN/A     */
1122521SN/A    if (kernelSymtab->findAddress("dp264_mv", addr))
1138706Sandreas.hansson@arm.com        virtProxy->write(addr + 0x18, LittleEndianGuest::htog((uint32_t)127));
1142521SN/A    else
1151070SN/A        panic("could not find dp264_mv\n");
116943SN/A
1171492SN/A#ifndef NDEBUG
1181885SN/A    kernelPanicEvent = addKernelFuncEvent<BreakPCEvent>("panic");
1191885SN/A    if (!kernelPanicEvent)
120451SN/A        panic("could not find kernel symbol \'panic\'");
1211885SN/A
1221646SN/A#if 0
1231885SN/A    kernelDieEvent = addKernelFuncEvent<BreakPCEvent>("die_if_kernel");
1241885SN/A    if (!kernelDieEvent)
1251492SN/A        panic("could not find kernel symbol \'die_if_kernel\'");
1261646SN/A#endif
1271492SN/A
128860SN/A#endif
129451SN/A
130885SN/A    /**
1311895SN/A     * Any time ide_delay_50ms, calibarte_delay or
1321070SN/A     * determine_cpu_caches is called just skip the
1331070SN/A     * function. Currently determine_cpu_caches only is used put
1341070SN/A     * information in proc, however if that changes in the future we
1351070SN/A     * will have to fill in the cache size variables appropriately.
136885SN/A     */
137848SN/A
1381885SN/A    skipIdeDelay50msEvent =
1391885SN/A        addKernelFuncEvent<SkipFuncEvent>("ide_delay_50ms");
1401885SN/A    skipDelayLoopEvent =
1411885SN/A        addKernelFuncEvent<SkipDelayLoopEvent>("calibrate_delay");
1421885SN/A    skipCacheProbeEvent =
1431885SN/A        addKernelFuncEvent<SkipFuncEvent>("determine_cpu_caches");
1441885SN/A    debugPrintkEvent = addKernelFuncEvent<DebugPrintkEvent>("dprintk");
1451885SN/A    idleStartEvent = addKernelFuncEvent<IdleStartEvent>("cpu_idle");
1461885SN/A
1474741Sstever@eecs.umich.edu    // Disable for now as it runs into panic() calls in VPTr methods
1484741Sstever@eecs.umich.edu    // (see sim/vptr.hh).  Once those bugs are fixed, we can
1494741Sstever@eecs.umich.edu    // re-enable, but we should find a better way to turn it on than
1504741Sstever@eecs.umich.edu    // using DTRACE(Thread), since looking at a trace flag at tick 0
1514741Sstever@eecs.umich.edu    // leads to non-intuitive behavior with --trace-start.
1524741Sstever@eecs.umich.edu    if (false && kernelSymtab->findAddress("alpha_switch_to", addr)) {
1531885SN/A        printThreadEvent = new PrintThreadInfo(&pcEventQueue, "threadinfo",
1541885SN/A                                               addr + sizeof(MachInst) * 6);
1551885SN/A    } else {
1561885SN/A        printThreadEvent = NULL;
1571657SN/A    }
158451SN/A}
159451SN/A
1602212SN/ALinuxAlphaSystem::~LinuxAlphaSystem()
161451SN/A{
1621492SN/A#ifndef NDEBUG
163451SN/A    delete kernelPanicEvent;
1641070SN/A#endif
165869SN/A    delete skipIdeDelay50msEvent;
166869SN/A    delete skipDelayLoopEvent;
167869SN/A    delete skipCacheProbeEvent;
1681070SN/A    delete debugPrintkEvent;
1691070SN/A    delete idleStartEvent;
1701082SN/A    delete printThreadEvent;
171451SN/A}
172451SN/A
173803SN/Avoid
1742680Sktlim@umich.eduLinuxAlphaSystem::setDelayLoop(ThreadContext *tc)
175803SN/A{
176803SN/A    Addr addr = 0;
177803SN/A    if (kernelSymtab->findAddress("loops_per_jiffy", addr)) {
1782680Sktlim@umich.edu        Tick cpuFreq = tc->getCpuPtr()->frequency();
1791634SN/A        Tick intrFreq = platform->intrFrequency();
1808706Sandreas.hansson@arm.com        FSTranslatingPortProxy* vp;
1812684Ssaidi@eecs.umich.edu
1828706Sandreas.hansson@arm.com        vp = tc->getVirtProxy();
1832684Ssaidi@eecs.umich.edu        vp->writeHtoG(addr, (uint32_t)((cpuFreq / intrFreq) * 0.9988));
184803SN/A    }
185803SN/A}
186803SN/A
1871885SN/Avoid
1882680Sktlim@umich.eduLinuxAlphaSystem::SkipDelayLoopEvent::process(ThreadContext *tc)
1891885SN/A{
1902680Sktlim@umich.edu    SkipFuncEvent::process(tc);
1911885SN/A    // calculate and set loops_per_jiffy
1922680Sktlim@umich.edu    ((LinuxAlphaSystem *)tc->getSystemPtr())->setDelayLoop(tc);
1931885SN/A}
1941885SN/A
1951885SN/Avoid
1962680Sktlim@umich.eduLinuxAlphaSystem::PrintThreadInfo::process(ThreadContext *tc)
1971885SN/A{
1982680Sktlim@umich.edu    Linux::ThreadInfo ti(tc);
1991885SN/A
2001885SN/A    DPRINTF(Thread, "Currently Executing Thread %s, pid %d, started at: %d\n",
2011885SN/A            ti.curTaskName(), ti.curTaskPID(), ti.curTaskStart());
2021885SN/A}
2031885SN/A
2044762Snate@binkert.orgLinuxAlphaSystem *
2054762Snate@binkert.orgLinuxAlphaSystemParams::create()
206451SN/A{
2074762Snate@binkert.org    return new LinuxAlphaSystem(this);
208451SN/A}
209