linux.hh revision 11320
19793Sakash.bagdia@arm.com/* 27586SAli.Saidi@arm.com * Copyright (c) 2003-2005 The Regents of The University of Michigan 37586SAli.Saidi@arm.com * All rights reserved. 47586SAli.Saidi@arm.com * 57586SAli.Saidi@arm.com * Redistribution and use in source and binary forms, with or without 67586SAli.Saidi@arm.com * modification, are permitted provided that the following conditions are 77586SAli.Saidi@arm.com * met: redistributions of source code must retain the above copyright 87586SAli.Saidi@arm.com * notice, this list of conditions and the following disclaimer; 97586SAli.Saidi@arm.com * redistributions in binary form must reproduce the above copyright 107586SAli.Saidi@arm.com * notice, this list of conditions and the following disclaimer in the 117586SAli.Saidi@arm.com * documentation and/or other materials provided with the distribution; 127586SAli.Saidi@arm.com * neither the name of the copyright holders nor the names of its 1310118Snilay@cs.wisc.edu * contributors may be used to endorse or promote products derived from 1410118Snilay@cs.wisc.edu * this software without specific prior written permission. 153970Sgblack@eecs.umich.edu * 163005Sstever@eecs.umich.edu * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 173005Sstever@eecs.umich.edu * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 183005Sstever@eecs.umich.edu * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 193005Sstever@eecs.umich.edu * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 203005Sstever@eecs.umich.edu * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 213005Sstever@eecs.umich.edu * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 223005Sstever@eecs.umich.edu * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 233005Sstever@eecs.umich.edu * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 243005Sstever@eecs.umich.edu * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 253005Sstever@eecs.umich.edu * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 263005Sstever@eecs.umich.edu * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 273005Sstever@eecs.umich.edu * 283005Sstever@eecs.umich.edu * Authors: Korey Sewell 293005Sstever@eecs.umich.edu */ 303005Sstever@eecs.umich.edu 313005Sstever@eecs.umich.edu#ifndef __ALPHA_ALPHA_LINUX_LINUX_HH__ 323005Sstever@eecs.umich.edu#define __ALPHA_ALPHA_LINUX_LINUX_HH__ 333005Sstever@eecs.umich.edu 343005Sstever@eecs.umich.edu#include "kern/linux/linux.hh" 353005Sstever@eecs.umich.edu 363005Sstever@eecs.umich.edu/* AlphaLinux class contains static constants/definitions/misc. 373005Sstever@eecs.umich.edu * structures which are specific to the Linux OS AND the Alpha 383005Sstever@eecs.umich.edu * architecture 393005Sstever@eecs.umich.edu */ 403005Sstever@eecs.umich.educlass AlphaLinux : public Linux 413005Sstever@eecs.umich.edu{ 4210118Snilay@cs.wisc.edu public: 433005Sstever@eecs.umich.edu 446654Snate@binkert.org /// This table maps the target open() flags to the corresponding 456654Snate@binkert.org /// host open() flags. 462889SN/A static OpenFlagTransTable openFlagTable[]; 472710SN/A 486654Snate@binkert.org /// Number of entries in openFlagTable[]. 496654Snate@binkert.org static const int NUM_OPEN_FLAGS; 506654Snate@binkert.org 515457Ssaidi@eecs.umich.edu //@{ 526654Snate@binkert.org /// open(2) flag values. 5310118Snilay@cs.wisc.edu static const int TGT_O_RDONLY = 00000000; //!< O_RDONLY 5410118Snilay@cs.wisc.edu static const int TGT_O_WRONLY = 00000001; //!< O_WRONLY 5510118Snilay@cs.wisc.edu static const int TGT_O_RDWR = 00000002; //!< O_RDWR 566654Snate@binkert.org static const int TGT_O_NONBLOCK = 00000004; //!< O_NONBLOCK 572934SN/A static const int TGT_O_APPEND = 00000010; //!< O_APPEND 582549SN/A static const int TGT_O_CREAT = 00001000; //!< O_CREAT 592995SN/A static const int TGT_O_TRUNC = 00002000; //!< O_TRUNC 603395Shsul@eecs.umich.edu static const int TGT_O_EXCL = 00004000; //!< O_EXCL 616981SLisa.Hsu@amd.com static const int TGT_O_NOCTTY = 00010000; //!< O_NOCTTY 629836Sandreas.hansson@arm.com static const int TGT_O_SYNC = 00040000; //!< O_SYNC 633448Shsul@eecs.umich.edu static const int TGT_O_DRD = 00100000; //!< O_DRD 648920Snilay@cs.wisc.edu static const int TGT_O_DIRECTIO = 00200000; //!< O_DIRECTIO 653444Sktlim@umich.edu static const int TGT_O_CACHE = 00400000; //!< O_CACHE 662889SN/A static const int TGT_O_DSYNC = 02000000; //!< O_DSYNC 678920Snilay@cs.wisc.edu static const int TGT_O_RSYNC = 04000000; //!< O_RSYNC 688920Snilay@cs.wisc.edu //@} 693322Shsul@eecs.umich.edu 7010118Snilay@cs.wisc.edu /// For mmap(). 7110118Snilay@cs.wisc.edu static const unsigned TGT_MAP_ANONYMOUS = 0x10; 7210118Snilay@cs.wisc.edu static const unsigned TGT_MAP_FIXED = 0x100; 7310118Snilay@cs.wisc.edu 742710SN/A //@{ 752710SN/A /// For getsysinfo(). 762710SN/A static const unsigned GSI_PLATFORM_NAME = 103; //!< platform name as string 772710SN/A static const unsigned GSI_CPU_INFO = 59; //!< CPU information 782710SN/A static const unsigned GSI_PROC_TYPE = 60; //!< get proc_type 792710SN/A static const unsigned GSI_MAX_CPU = 30; //!< max # CPUs on machine 803322Shsul@eecs.umich.edu static const unsigned GSI_CPUS_IN_BOX = 55; //!< number of CPUs in system 813304Sstever@eecs.umich.edu static const unsigned GSI_PHYSMEM = 19; //!< Physical memory in KB 823322Shsul@eecs.umich.edu static const unsigned GSI_CLK_TCK = 42; //!< clock freq in Hz 833322Shsul@eecs.umich.edu static const unsigned GSI_IEEE_FP_CONTROL = 45; 843304Sstever@eecs.umich.edu //@} 859653SAndreas.Sandberg@ARM.com 869653SAndreas.Sandberg@ARM.com //@{ 879653SAndreas.Sandberg@ARM.com /// For setsysinfo(). 889653SAndreas.Sandberg@ARM.com static const unsigned SSI_IEEE_FP_CONTROL = 14; //!< ieee_set_fp_control() 899653SAndreas.Sandberg@ARM.com //@} 909653SAndreas.Sandberg@ARM.com 919653SAndreas.Sandberg@ARM.com //@{ 923481Shsul@eecs.umich.edu /// ioctl() command codes. 933481Shsul@eecs.umich.edu static const unsigned TGT_TIOCGETP = 0x40067408; 942566SN/A static const unsigned TGT_TIOCSETP = 0x80067409; 959665Sandreas.hansson@arm.com static const unsigned TGT_TIOCSETN = 0x8006740a; 969665Sandreas.hansson@arm.com static const unsigned TGT_TIOCSETC = 0x80067411; 979665Sandreas.hansson@arm.com static const unsigned TGT_TIOCGETC = 0x40067412; 989665Sandreas.hansson@arm.com static const unsigned TGT_FIONREAD = 0x4004667f; 999665Sandreas.hansson@arm.com static const unsigned TGT_TCGETS = 0x402c7413; 1002995SN/A static const unsigned TGT_TCGETA = 0x40127417; 1013304Sstever@eecs.umich.edu static const unsigned TGT_TCSETAW = 0x80147419; // 2.6.15 kernel 1023304Sstever@eecs.umich.edu //@} 1033304Sstever@eecs.umich.edu 1042995SN/A static bool 1052995SN/A isTtyReq(unsigned req) 1062995SN/A { 1072917SN/A switch (req) { 1082995SN/A case TGT_TIOCGETP: 10910041Snilay@cs.wisc.edu case TGT_TIOCSETP: 11010041Snilay@cs.wisc.edu case TGT_TIOCSETN: 1112995SN/A case TGT_TIOCSETC: 1128956Sjayneel@cs.wisc.edu case TGT_TIOCGETC: 1133304Sstever@eecs.umich.edu case TGT_TCGETS: 1146135Sgblack@eecs.umich.edu case TGT_TCGETA: 1156135Sgblack@eecs.umich.edu case TGT_TCSETAW: 1166654Snate@binkert.org return true; 11710118Snilay@cs.wisc.edu default: 1186654Snate@binkert.org return false; 1199826Sandreas.hansson@arm.com } 1206654Snate@binkert.org } 1219826Sandreas.hansson@arm.com 1226654Snate@binkert.org /// For table(). 12310118Snilay@cs.wisc.edu static const int TBL_SYSINFO = 12; 12410118Snilay@cs.wisc.edu 1257586SAli.Saidi@arm.com /// Resource constants for getrlimit() (overide some generics). 1269826Sandreas.hansson@arm.com static const unsigned TGT_RLIMIT_NPROC = 8; 1279826Sandreas.hansson@arm.com static const unsigned TGT_RLIMIT_AS = 7; 1289665Sandreas.hansson@arm.com static const unsigned TGT_RLIMIT_NOFILE = 6; 1299935Sdam.sunwoo@arm.com static const unsigned TGT_RLIMIT_MEMLOCK = 9; 1309935Sdam.sunwoo@arm.com 1313819Shsul@eecs.umich.edu typedef struct { 1329059Snilay@cs.wisc.edu int64_t uptime; /* Seconds since boot */ 1333819Shsul@eecs.umich.edu uint64_t loads[3]; /* 1, 5, and 15 minute load averages */ 13410118Snilay@cs.wisc.edu uint64_t totalram; /* Total usable main memory size */ 13510118Snilay@cs.wisc.edu uint64_t freeram; /* Available memory size */ 13610118Snilay@cs.wisc.edu uint64_t sharedram; /* Amount of shared memory */ 1379827Sakash.bagdia@arm.com uint64_t bufferram; /* Memory used by buffers */ 1389827Sakash.bagdia@arm.com uint64_t totalswap; /* Total swap space size */ 1399827Sakash.bagdia@arm.com uint64_t freeswap; /* swap space still available */ 1409793Sakash.bagdia@arm.com uint16_t procs; /* Number of current processes */ 1419827Sakash.bagdia@arm.com uint64_t totalhigh; /* Total high memory size */ 1429827Sakash.bagdia@arm.com uint64_t freehigh; /* Available high memory size */ 1439827Sakash.bagdia@arm.com uint64_t mem_unit; /* Memory unit size in bytes */ 1449827Sakash.bagdia@arm.com } tgt_sysinfo; 1459827Sakash.bagdia@arm.com 1469793Sakash.bagdia@arm.com // For futex system call 1479793Sakash.bagdia@arm.com static const unsigned TGT_EAGAIN = 35; 1489827Sakash.bagdia@arm.com static const unsigned TGT_EWOULDBLOCK = TGT_EAGAIN; 1499827Sakash.bagdia@arm.com}; 1509827Sakash.bagdia@arm.com 1519790Sakash.bagdia@arm.com#endif // __ALPHA_ALPHA_LINUX_LINUX_HH__ 1523873Sbinkertn@umich.edu