linux.hh revision 11320
17199Sgblack@eecs.umich.edu/*
27199Sgblack@eecs.umich.edu * Copyright (c) 2003-2005 The Regents of The University of Michigan
310037SARM gem5 Developers * All rights reserved.
47199Sgblack@eecs.umich.edu *
57199Sgblack@eecs.umich.edu * Redistribution and use in source and binary forms, with or without
67199Sgblack@eecs.umich.edu * modification, are permitted provided that the following conditions are
77199Sgblack@eecs.umich.edu * met: redistributions of source code must retain the above copyright
87199Sgblack@eecs.umich.edu * notice, this list of conditions and the following disclaimer;
97199Sgblack@eecs.umich.edu * redistributions in binary form must reproduce the above copyright
107199Sgblack@eecs.umich.edu * notice, this list of conditions and the following disclaimer in the
117199Sgblack@eecs.umich.edu * documentation and/or other materials provided with the distribution;
127199Sgblack@eecs.umich.edu * neither the name of the copyright holders nor the names of its
137199Sgblack@eecs.umich.edu * contributors may be used to endorse or promote products derived from
147199Sgblack@eecs.umich.edu * this software without specific prior written permission.
157199Sgblack@eecs.umich.edu *
167199Sgblack@eecs.umich.edu * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
177199Sgblack@eecs.umich.edu * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
187199Sgblack@eecs.umich.edu * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
197199Sgblack@eecs.umich.edu * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
207199Sgblack@eecs.umich.edu * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
217199Sgblack@eecs.umich.edu * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
227199Sgblack@eecs.umich.edu * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
237199Sgblack@eecs.umich.edu * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
247199Sgblack@eecs.umich.edu * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
257199Sgblack@eecs.umich.edu * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
267199Sgblack@eecs.umich.edu * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
277199Sgblack@eecs.umich.edu *
287199Sgblack@eecs.umich.edu * Authors: Korey Sewell
297199Sgblack@eecs.umich.edu */
307199Sgblack@eecs.umich.edu
317199Sgblack@eecs.umich.edu#ifndef __ALPHA_ALPHA_LINUX_LINUX_HH__
327199Sgblack@eecs.umich.edu#define __ALPHA_ALPHA_LINUX_LINUX_HH__
337199Sgblack@eecs.umich.edu
347199Sgblack@eecs.umich.edu#include "kern/linux/linux.hh"
357199Sgblack@eecs.umich.edu
367199Sgblack@eecs.umich.edu/* AlphaLinux class contains static constants/definitions/misc.
377199Sgblack@eecs.umich.edu * structures which are specific to the Linux OS AND the Alpha
387199Sgblack@eecs.umich.edu * architecture
397199Sgblack@eecs.umich.edu */
407199Sgblack@eecs.umich.educlass AlphaLinux : public Linux
417199Sgblack@eecs.umich.edu{
427199Sgblack@eecs.umich.edu  public:
4310474Sandreas.hansson@arm.com
4410037SARM gem5 Developers    /// This table maps the target open() flags to the corresponding
4510037SARM gem5 Developers    /// host open() flags.
4610037SARM gem5 Developers    static OpenFlagTransTable openFlagTable[];
4710037SARM gem5 Developers
4810037SARM gem5 Developers    /// Number of entries in openFlagTable[].
4910037SARM gem5 Developers    static const int NUM_OPEN_FLAGS;
5010037SARM gem5 Developers
5110037SARM gem5 Developers    //@{
5210037SARM gem5 Developers    /// open(2) flag values.
5310037SARM gem5 Developers    static const int TGT_O_RDONLY       = 00000000;     //!< O_RDONLY
5410037SARM gem5 Developers    static const int TGT_O_WRONLY       = 00000001;     //!< O_WRONLY
5510037SARM gem5 Developers    static const int TGT_O_RDWR         = 00000002;     //!< O_RDWR
5610037SARM gem5 Developers    static const int TGT_O_NONBLOCK     = 00000004;     //!< O_NONBLOCK
5710037SARM gem5 Developers    static const int TGT_O_APPEND       = 00000010;     //!< O_APPEND
5810037SARM gem5 Developers    static const int TGT_O_CREAT        = 00001000;     //!< O_CREAT
5910037SARM gem5 Developers    static const int TGT_O_TRUNC        = 00002000;     //!< O_TRUNC
6010037SARM gem5 Developers    static const int TGT_O_EXCL         = 00004000;     //!< O_EXCL
6110037SARM gem5 Developers    static const int TGT_O_NOCTTY       = 00010000;     //!< O_NOCTTY
6210474Sandreas.hansson@arm.com    static const int TGT_O_SYNC         = 00040000;     //!< O_SYNC
6310474Sandreas.hansson@arm.com    static const int TGT_O_DRD          = 00100000;     //!< O_DRD
6410037SARM gem5 Developers    static const int TGT_O_DIRECTIO     = 00200000;     //!< O_DIRECTIO
6510037SARM gem5 Developers    static const int TGT_O_CACHE        = 00400000;     //!< O_CACHE
6610037SARM gem5 Developers    static const int TGT_O_DSYNC        = 02000000;     //!< O_DSYNC
6710037SARM gem5 Developers    static const int TGT_O_RSYNC        = 04000000;     //!< O_RSYNC
6810474Sandreas.hansson@arm.com    //@}
6910037SARM gem5 Developers
7010037SARM gem5 Developers    /// For mmap().
718782Sgblack@eecs.umich.edu    static const unsigned TGT_MAP_ANONYMOUS = 0x10;
7210037SARM gem5 Developers    static const unsigned TGT_MAP_FIXED     = 0x100;
738782Sgblack@eecs.umich.edu
747199Sgblack@eecs.umich.edu    //@{
757199Sgblack@eecs.umich.edu    /// For getsysinfo().
7610037SARM gem5 Developers    static const unsigned GSI_PLATFORM_NAME = 103; //!< platform name as string
7710037SARM gem5 Developers    static const unsigned GSI_CPU_INFO      = 59; //!< CPU information
788628SAli.Saidi@ARM.com    static const unsigned GSI_PROC_TYPE     = 60; //!< get proc_type
7910037SARM gem5 Developers    static const unsigned GSI_MAX_CPU       = 30; //!< max # CPUs on machine
8010037SARM gem5 Developers    static const unsigned GSI_CPUS_IN_BOX   = 55; //!< number of CPUs in system
8110037SARM gem5 Developers    static const unsigned GSI_PHYSMEM       = 19; //!< Physical memory in KB
8210037SARM gem5 Developers    static const unsigned GSI_CLK_TCK       = 42; //!< clock freq in Hz
8310037SARM gem5 Developers    static const unsigned GSI_IEEE_FP_CONTROL = 45;
8410037SARM gem5 Developers    //@}
8510037SARM gem5 Developers
8610037SARM gem5 Developers    //@{
8710037SARM gem5 Developers    /// For setsysinfo().
8810037SARM gem5 Developers    static const unsigned SSI_IEEE_FP_CONTROL = 14; //!< ieee_set_fp_control()
8910037SARM gem5 Developers    //@}
9010037SARM gem5 Developers
9110037SARM gem5 Developers    //@{
9210037SARM gem5 Developers    /// ioctl() command codes.
9310037SARM gem5 Developers    static const unsigned TGT_TIOCGETP   = 0x40067408;
9410474Sandreas.hansson@arm.com    static const unsigned TGT_TIOCSETP   = 0x80067409;
9510037SARM gem5 Developers    static const unsigned TGT_TIOCSETN   = 0x8006740a;
9610037SARM gem5 Developers    static const unsigned TGT_TIOCSETC   = 0x80067411;
9710037SARM gem5 Developers    static const unsigned TGT_TIOCGETC   = 0x40067412;
9810037SARM gem5 Developers    static const unsigned TGT_FIONREAD   = 0x4004667f;
9910037SARM gem5 Developers    static const unsigned TGT_TCGETS     = 0x402c7413;
10010037SARM gem5 Developers    static const unsigned TGT_TCGETA     = 0x40127417;
10110037SARM gem5 Developers    static const unsigned TGT_TCSETAW    = 0x80147419; // 2.6.15 kernel
10210037SARM gem5 Developers    //@}
10310037SARM gem5 Developers
10410037SARM gem5 Developers    static bool
10510037SARM gem5 Developers    isTtyReq(unsigned req)
10610037SARM gem5 Developers    {
10710037SARM gem5 Developers        switch (req) {
10810037SARM gem5 Developers          case TGT_TIOCGETP:
10910037SARM gem5 Developers          case TGT_TIOCSETP:
11010037SARM gem5 Developers          case TGT_TIOCSETN:
11110037SARM gem5 Developers          case TGT_TIOCSETC:
11210037SARM gem5 Developers          case TGT_TIOCGETC:
11310037SARM gem5 Developers          case TGT_TCGETS:
11410037SARM gem5 Developers          case TGT_TCGETA:
11510037SARM gem5 Developers          case TGT_TCSETAW:
11610037SARM gem5 Developers            return true;
11710037SARM gem5 Developers          default:
11810037SARM gem5 Developers            return false;
11910037SARM gem5 Developers        }
12010037SARM gem5 Developers    }
12110037SARM gem5 Developers
12210037SARM gem5 Developers    /// For table().
12310037SARM gem5 Developers    static const int TBL_SYSINFO = 12;
12410037SARM gem5 Developers
12510037SARM gem5 Developers    /// Resource constants for getrlimit() (overide some generics).
12610037SARM gem5 Developers    static const unsigned TGT_RLIMIT_NPROC = 8;
12710037SARM gem5 Developers    static const unsigned TGT_RLIMIT_AS = 7;
12810037SARM gem5 Developers    static const unsigned TGT_RLIMIT_NOFILE = 6;
12910037SARM gem5 Developers    static const unsigned TGT_RLIMIT_MEMLOCK = 9;
13010037SARM gem5 Developers
13110037SARM gem5 Developers    typedef struct {
13210037SARM gem5 Developers       int64_t  uptime;    /* Seconds since boot */
13310037SARM gem5 Developers       uint64_t loads[3];  /* 1, 5, and 15 minute load averages */
13410037SARM gem5 Developers       uint64_t totalram;  /* Total usable main memory size */
13510037SARM gem5 Developers       uint64_t freeram;   /* Available memory size */
13610037SARM gem5 Developers       uint64_t sharedram; /* Amount of shared memory */
13710037SARM gem5 Developers       uint64_t bufferram; /* Memory used by buffers */
13810037SARM gem5 Developers       uint64_t totalswap; /* Total swap space size */
1397199Sgblack@eecs.umich.edu       uint64_t freeswap;  /* swap space still available */
1407199Sgblack@eecs.umich.edu       uint16_t procs;     /* Number of current processes */
1417202Sgblack@eecs.umich.edu       uint64_t totalhigh; /* Total high memory size */
1427202Sgblack@eecs.umich.edu       uint64_t freehigh;  /* Available high memory size */
1437202Sgblack@eecs.umich.edu       uint64_t mem_unit;  /* Memory unit size in bytes */
1447202Sgblack@eecs.umich.edu    } tgt_sysinfo;
1457202Sgblack@eecs.umich.edu
1468301SAli.Saidi@ARM.com    // For futex system call
1478303SAli.Saidi@ARM.com    static const unsigned TGT_EAGAIN      = 35;
1488303SAli.Saidi@ARM.com    static const unsigned TGT_EWOULDBLOCK = TGT_EAGAIN;
1498303SAli.Saidi@ARM.com};
1508303SAli.Saidi@ARM.com
1518303SAli.Saidi@ARM.com#endif // __ALPHA_ALPHA_LINUX_LINUX_HH__
1528303SAli.Saidi@ARM.com