kernel_stats.hh revision 12181
19447SAndreas.Sandberg@ARM.com/* 29447SAndreas.Sandberg@ARM.com * Copyright (c) 2004-2005 The Regents of The University of Michigan 39447SAndreas.Sandberg@ARM.com * All rights reserved. 49447SAndreas.Sandberg@ARM.com * 59447SAndreas.Sandberg@ARM.com * Redistribution and use in source and binary forms, with or without 69447SAndreas.Sandberg@ARM.com * modification, are permitted provided that the following conditions are 79447SAndreas.Sandberg@ARM.com * met: redistributions of source code must retain the above copyright 89447SAndreas.Sandberg@ARM.com * notice, this list of conditions and the following disclaimer; 99447SAndreas.Sandberg@ARM.com * redistributions in binary form must reproduce the above copyright 109447SAndreas.Sandberg@ARM.com * notice, this list of conditions and the following disclaimer in the 119447SAndreas.Sandberg@ARM.com * documentation and/or other materials provided with the distribution; 129447SAndreas.Sandberg@ARM.com * neither the name of the copyright holders nor the names of its 139447SAndreas.Sandberg@ARM.com * contributors may be used to endorse or promote products derived from 149447SAndreas.Sandberg@ARM.com * this software without specific prior written permission. 159447SAndreas.Sandberg@ARM.com * 169447SAndreas.Sandberg@ARM.com * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 179447SAndreas.Sandberg@ARM.com * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 189447SAndreas.Sandberg@ARM.com * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 199447SAndreas.Sandberg@ARM.com * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 209447SAndreas.Sandberg@ARM.com * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 219447SAndreas.Sandberg@ARM.com * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 229447SAndreas.Sandberg@ARM.com * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 239447SAndreas.Sandberg@ARM.com * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 249447SAndreas.Sandberg@ARM.com * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 259447SAndreas.Sandberg@ARM.com * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 269447SAndreas.Sandberg@ARM.com * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 279447SAndreas.Sandberg@ARM.com * 289447SAndreas.Sandberg@ARM.com * Authors: Lisa Hsu 299447SAndreas.Sandberg@ARM.com * Nathan Binkert 309447SAndreas.Sandberg@ARM.com */ 319447SAndreas.Sandberg@ARM.com 329447SAndreas.Sandberg@ARM.com#ifndef __ARCH_ALPHA_KERNEL_STATS_HH__ 339447SAndreas.Sandberg@ARM.com#define __ARCH_ALPHA_KERNEL_STATS_HH__ 349447SAndreas.Sandberg@ARM.com 359447SAndreas.Sandberg@ARM.com#include <map> 369447SAndreas.Sandberg@ARM.com#include <stack> 379447SAndreas.Sandberg@ARM.com#include <string> 389447SAndreas.Sandberg@ARM.com#include <vector> 3911802Sandreas.sandberg@arm.com 409447SAndreas.Sandberg@ARM.com#include "cpu/static_inst.hh" 4111682Sandreas.hansson@arm.com#include "kern/kernel_stats.hh" 4211682Sandreas.hansson@arm.com 439447SAndreas.Sandberg@ARM.comclass ThreadContext; 449447SAndreas.Sandberg@ARM.com 459447SAndreas.Sandberg@ARM.comnamespace AlphaISA { 469447SAndreas.Sandberg@ARM.comnamespace Kernel { 479447SAndreas.Sandberg@ARM.com 489447SAndreas.Sandberg@ARM.comenum cpu_mode { kernel, user, idle, cpu_mode_num }; 499447SAndreas.Sandberg@ARM.comextern const char *modestr[]; 509447SAndreas.Sandberg@ARM.com 519447SAndreas.Sandberg@ARM.comclass Statistics : public ::Kernel::Statistics 529447SAndreas.Sandberg@ARM.com{ 539447SAndreas.Sandberg@ARM.com protected: 549447SAndreas.Sandberg@ARM.com Addr idleProcess; 559447SAndreas.Sandberg@ARM.com cpu_mode themode; 569447SAndreas.Sandberg@ARM.com Tick lastModeTick; 579447SAndreas.Sandberg@ARM.com 589447SAndreas.Sandberg@ARM.com void changeMode(cpu_mode newmode, ThreadContext *tc); 599447SAndreas.Sandberg@ARM.com 609447SAndreas.Sandberg@ARM.com private: 619447SAndreas.Sandberg@ARM.com Stats::Vector _callpal; 629447SAndreas.Sandberg@ARM.com// Stats::Vector _faults; 639447SAndreas.Sandberg@ARM.com 649447SAndreas.Sandberg@ARM.com Stats::Vector _mode; 659447SAndreas.Sandberg@ARM.com Stats::Vector _modeGood; 669447SAndreas.Sandberg@ARM.com Stats::Formula _modeFraction; 679447SAndreas.Sandberg@ARM.com Stats::Vector _modeTicks; 689447SAndreas.Sandberg@ARM.com 699447SAndreas.Sandberg@ARM.com Stats::Scalar _swap_context; 709447SAndreas.Sandberg@ARM.com 719447SAndreas.Sandberg@ARM.com public: 729447SAndreas.Sandberg@ARM.com Statistics(); 739447SAndreas.Sandberg@ARM.com 749980Ssteve.reinhardt@amd.com void regStats(const std::string &name); 759447SAndreas.Sandberg@ARM.com 769447SAndreas.Sandberg@ARM.com public: 779447SAndreas.Sandberg@ARM.com void mode(cpu_mode newmode, ThreadContext *tc); 789447SAndreas.Sandberg@ARM.com void context(Addr oldpcbb, Addr newpcbb, ThreadContext *tc); 799447SAndreas.Sandberg@ARM.com void callpal(int code, ThreadContext *tc); 809447SAndreas.Sandberg@ARM.com void hwrei() { _hwrei++; } 819447SAndreas.Sandberg@ARM.com 829447SAndreas.Sandberg@ARM.com void setIdleProcess(Addr idle, ThreadContext *tc); 839447SAndreas.Sandberg@ARM.com 849447SAndreas.Sandberg@ARM.com public: 859447SAndreas.Sandberg@ARM.com void serialize(CheckpointOut &cp) const override; 869447SAndreas.Sandberg@ARM.com void unserialize(CheckpointIn &cp) override; 879447SAndreas.Sandberg@ARM.com}; 889447SAndreas.Sandberg@ARM.com 899447SAndreas.Sandberg@ARM.com} // namespace Kernel 909447SAndreas.Sandberg@ARM.com} // namespace AlphaISA 919447SAndreas.Sandberg@ARM.com 929447SAndreas.Sandberg@ARM.com#endif // __ARCH_ALPHA_KERNEL_STATS_HH__ 939447SAndreas.Sandberg@ARM.com