pal.isa revision 3953:300d526414e6
16019Shines@cs.fsu.edu// -*- mode:c++ -*- 26019Shines@cs.fsu.edu 36019Shines@cs.fsu.edu// Copyright (c) 2003-2005 The Regents of The University of Michigan 46019Shines@cs.fsu.edu// All rights reserved. 56019Shines@cs.fsu.edu// 66019Shines@cs.fsu.edu// Redistribution and use in source and binary forms, with or without 76019Shines@cs.fsu.edu// modification, are permitted provided that the following conditions are 86019Shines@cs.fsu.edu// met: redistributions of source code must retain the above copyright 96019Shines@cs.fsu.edu// notice, this list of conditions and the following disclaimer; 106019Shines@cs.fsu.edu// redistributions in binary form must reproduce the above copyright 116019Shines@cs.fsu.edu// notice, this list of conditions and the following disclaimer in the 126019Shines@cs.fsu.edu// documentation and/or other materials provided with the distribution; 136019Shines@cs.fsu.edu// neither the name of the copyright holders nor the names of its 146019Shines@cs.fsu.edu// contributors may be used to endorse or promote products derived from 156019Shines@cs.fsu.edu// this software without specific prior written permission. 166019Shines@cs.fsu.edu// 176019Shines@cs.fsu.edu// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 186019Shines@cs.fsu.edu// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 196019Shines@cs.fsu.edu// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 206019Shines@cs.fsu.edu// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 216019Shines@cs.fsu.edu// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 226019Shines@cs.fsu.edu// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 236019Shines@cs.fsu.edu// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 246019Shines@cs.fsu.edu// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 256019Shines@cs.fsu.edu// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 266019Shines@cs.fsu.edu// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 276019Shines@cs.fsu.edu// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 286019Shines@cs.fsu.edu// 296019Shines@cs.fsu.edu// Authors: Steve Reinhardt 306019Shines@cs.fsu.edu 316019Shines@cs.fsu.edu//////////////////////////////////////////////////////////////////// 326019Shines@cs.fsu.edu// 336019Shines@cs.fsu.edu// PAL calls & PAL-specific instructions 346019Shines@cs.fsu.edu// 356019Shines@cs.fsu.edu 366019Shines@cs.fsu.eduoutput header {{ 376019Shines@cs.fsu.edu /** 386019Shines@cs.fsu.edu * Base class for emulated call_pal calls (used only in 396019Shines@cs.fsu.edu * non-full-system mode). 406019Shines@cs.fsu.edu */ 416019Shines@cs.fsu.edu class EmulatedCallPal : public AlphaStaticInst 426019Shines@cs.fsu.edu { 436019Shines@cs.fsu.edu protected: 446019Shines@cs.fsu.edu 456019Shines@cs.fsu.edu /// Constructor. 466019Shines@cs.fsu.edu EmulatedCallPal(const char *mnem, ExtMachInst _machInst, 476019Shines@cs.fsu.edu OpClass __opClass) 486019Shines@cs.fsu.edu : AlphaStaticInst(mnem, _machInst, __opClass) 496019Shines@cs.fsu.edu { 506019Shines@cs.fsu.edu } 516019Shines@cs.fsu.edu 526019Shines@cs.fsu.edu std::string 536019Shines@cs.fsu.edu generateDisassembly(Addr pc, const SymbolTable *symtab) const; 546019Shines@cs.fsu.edu }; 556019Shines@cs.fsu.edu}}; 566019Shines@cs.fsu.edu 576019Shines@cs.fsu.eduoutput decoder {{ 586019Shines@cs.fsu.edu std::string 596019Shines@cs.fsu.edu EmulatedCallPal::generateDisassembly(Addr pc, 606019Shines@cs.fsu.edu const SymbolTable *symtab) const 616019Shines@cs.fsu.edu { 626019Shines@cs.fsu.edu#ifdef SS_COMPATIBLE_DISASSEMBLY 636019Shines@cs.fsu.edu return csprintf("%s %s", "call_pal", mnemonic); 646019Shines@cs.fsu.edu#else 656019Shines@cs.fsu.edu return csprintf("%-10s %s", "call_pal", mnemonic); 666019Shines@cs.fsu.edu#endif 676019Shines@cs.fsu.edu } 686019Shines@cs.fsu.edu}}; 696019Shines@cs.fsu.edu 706019Shines@cs.fsu.edudef format EmulatedCallPal(code, *flags) {{ 716019Shines@cs.fsu.edu iop = InstObjParams(name, Name, 'EmulatedCallPal', code, flags) 726019Shines@cs.fsu.edu header_output = BasicDeclare.subst(iop) 736019Shines@cs.fsu.edu decoder_output = BasicConstructor.subst(iop) 746019Shines@cs.fsu.edu decode_block = BasicDecode.subst(iop) 756019Shines@cs.fsu.edu exec_output = BasicExecute.subst(iop) 766019Shines@cs.fsu.edu}}; 776019Shines@cs.fsu.edu 786019Shines@cs.fsu.eduoutput header {{ 796019Shines@cs.fsu.edu /** 806019Shines@cs.fsu.edu * Base class for full-system-mode call_pal instructions. 816019Shines@cs.fsu.edu * Probably could turn this into a leaf class and get rid of the 826019Shines@cs.fsu.edu * parser template. 836019Shines@cs.fsu.edu */ 846019Shines@cs.fsu.edu class CallPalBase : public AlphaStaticInst 856019Shines@cs.fsu.edu { 866019Shines@cs.fsu.edu protected: 876019Shines@cs.fsu.edu int palFunc; ///< Function code part of instruction 886019Shines@cs.fsu.edu int palOffset; ///< Target PC, offset from IPR_PAL_BASE 896019Shines@cs.fsu.edu bool palValid; ///< is the function code valid? 906019Shines@cs.fsu.edu bool palPriv; ///< is this call privileged? 916019Shines@cs.fsu.edu 926019Shines@cs.fsu.edu /// Constructor. 936019Shines@cs.fsu.edu CallPalBase(const char *mnem, ExtMachInst _machInst, 946019Shines@cs.fsu.edu OpClass __opClass); 956019Shines@cs.fsu.edu 966019Shines@cs.fsu.edu std::string 976019Shines@cs.fsu.edu generateDisassembly(Addr pc, const SymbolTable *symtab) const; 986019Shines@cs.fsu.edu }; 996019Shines@cs.fsu.edu}}; 1006019Shines@cs.fsu.edu 1016019Shines@cs.fsu.eduoutput decoder {{ 1026019Shines@cs.fsu.edu inline 1036019Shines@cs.fsu.edu CallPalBase::CallPalBase(const char *mnem, ExtMachInst _machInst, 1046019Shines@cs.fsu.edu OpClass __opClass) 1056019Shines@cs.fsu.edu : AlphaStaticInst(mnem, _machInst, __opClass), 1066019Shines@cs.fsu.edu palFunc(PALFUNC) 1076019Shines@cs.fsu.edu { 1086019Shines@cs.fsu.edu // From the 21164 HRM (paraphrased): 1096019Shines@cs.fsu.edu // Bit 7 of the function code (mask 0x80) indicates 1106019Shines@cs.fsu.edu // whether the call is privileged (bit 7 == 0) or 1116019Shines@cs.fsu.edu // unprivileged (bit 7 == 1). The privileged call table 1126019Shines@cs.fsu.edu // starts at 0x2000, the unprivielged call table starts at 1136019Shines@cs.fsu.edu // 0x3000. Bits 5-0 (mask 0x3f) are used to calculate the 1146019Shines@cs.fsu.edu // offset. 1156019Shines@cs.fsu.edu const int palPrivMask = 0x80; 1166019Shines@cs.fsu.edu const int palOffsetMask = 0x3f; 1176019Shines@cs.fsu.edu 1186019Shines@cs.fsu.edu // Pal call is invalid unless all other bits are 0 1196019Shines@cs.fsu.edu palValid = ((machInst & ~(palPrivMask | palOffsetMask)) == 0); 1206019Shines@cs.fsu.edu palPriv = ((machInst & palPrivMask) == 0); 1216019Shines@cs.fsu.edu int shortPalFunc = (machInst & palOffsetMask); 1226019Shines@cs.fsu.edu // Add 1 to base to set pal-mode bit 1236019Shines@cs.fsu.edu palOffset = (palPriv ? 0x2001 : 0x3001) + (shortPalFunc << 6); 1246019Shines@cs.fsu.edu } 1256019Shines@cs.fsu.edu 1266019Shines@cs.fsu.edu std::string 1276019Shines@cs.fsu.edu CallPalBase::generateDisassembly(Addr pc, const SymbolTable *symtab) const 1286019Shines@cs.fsu.edu { 1296019Shines@cs.fsu.edu return csprintf("%-10s %#x", "call_pal", palFunc); 1306019Shines@cs.fsu.edu } 1316019Shines@cs.fsu.edu}}; 1326019Shines@cs.fsu.edu 1336019Shines@cs.fsu.edudef format CallPal(code, *flags) {{ 1346019Shines@cs.fsu.edu iop = InstObjParams(name, Name, 'CallPalBase', code, flags) 1356019Shines@cs.fsu.edu header_output = BasicDeclare.subst(iop) 1366019Shines@cs.fsu.edu decoder_output = BasicConstructor.subst(iop) 1376019Shines@cs.fsu.edu decode_block = BasicDecode.subst(iop) 1386019Shines@cs.fsu.edu exec_output = BasicExecute.subst(iop) 1396019Shines@cs.fsu.edu}}; 1406019Shines@cs.fsu.edu 1416019Shines@cs.fsu.edu//////////////////////////////////////////////////////////////////// 1426019Shines@cs.fsu.edu// 1436019Shines@cs.fsu.edu// hw_ld, hw_st 1446019Shines@cs.fsu.edu// 1456019Shines@cs.fsu.edu 1466019Shines@cs.fsu.eduoutput header {{ 1476019Shines@cs.fsu.edu /** 1486019Shines@cs.fsu.edu * Base class for hw_ld and hw_st. 1496019Shines@cs.fsu.edu */ 1506019Shines@cs.fsu.edu class HwLoadStore : public Memory 1516019Shines@cs.fsu.edu { 1526019Shines@cs.fsu.edu protected: 1536019Shines@cs.fsu.edu 1546019Shines@cs.fsu.edu /// Displacement for EA calculation (signed). 1556019Shines@cs.fsu.edu int16_t disp; 1566019Shines@cs.fsu.edu 1576019Shines@cs.fsu.edu /// Constructor 1586019Shines@cs.fsu.edu HwLoadStore(const char *mnem, ExtMachInst _machInst, OpClass __opClass, 1596019Shines@cs.fsu.edu StaticInstPtr _eaCompPtr = nullStaticInstPtr, 1606019Shines@cs.fsu.edu StaticInstPtr _memAccPtr = nullStaticInstPtr); 1616019Shines@cs.fsu.edu 1626019Shines@cs.fsu.edu std::string 1636019Shines@cs.fsu.edu generateDisassembly(Addr pc, const SymbolTable *symtab) const; 1646019Shines@cs.fsu.edu }; 1656019Shines@cs.fsu.edu}}; 1666019Shines@cs.fsu.edu 1676019Shines@cs.fsu.edu 1686019Shines@cs.fsu.eduoutput decoder {{ 1696019Shines@cs.fsu.edu inline 1706019Shines@cs.fsu.edu HwLoadStore::HwLoadStore(const char *mnem, ExtMachInst _machInst, 1716019Shines@cs.fsu.edu OpClass __opClass, 1726019Shines@cs.fsu.edu StaticInstPtr _eaCompPtr, 1736019Shines@cs.fsu.edu StaticInstPtr _memAccPtr) 1746019Shines@cs.fsu.edu : Memory(mnem, _machInst, __opClass, _eaCompPtr, _memAccPtr), 1756019Shines@cs.fsu.edu disp(HW_LDST_DISP) 1766019Shines@cs.fsu.edu { 1776019Shines@cs.fsu.edu memAccessFlags = 0; 1786019Shines@cs.fsu.edu if (HW_LDST_PHYS) memAccessFlags |= PHYSICAL; 1796019Shines@cs.fsu.edu if (HW_LDST_ALT) memAccessFlags |= ALTMODE; 1806019Shines@cs.fsu.edu if (HW_LDST_VPTE) memAccessFlags |= VPTE; 1816019Shines@cs.fsu.edu if (HW_LDST_LOCK) memAccessFlags |= LOCKED; 1826019Shines@cs.fsu.edu } 1836019Shines@cs.fsu.edu 1846019Shines@cs.fsu.edu std::string 1856019Shines@cs.fsu.edu HwLoadStore::generateDisassembly(Addr pc, const SymbolTable *symtab) const 1866019Shines@cs.fsu.edu { 1876019Shines@cs.fsu.edu#ifdef SS_COMPATIBLE_DISASSEMBLY 1886019Shines@cs.fsu.edu return csprintf("%-10s r%d,%d(r%d)", mnemonic, RA, disp, RB); 1896019Shines@cs.fsu.edu#else 1906019Shines@cs.fsu.edu // HW_LDST_LOCK and HW_LDST_COND are the same bit. 1916019Shines@cs.fsu.edu const char *lock_str = 1926019Shines@cs.fsu.edu (HW_LDST_LOCK) ? (flags[IsLoad] ? ",LOCK" : ",COND") : ""; 1936019Shines@cs.fsu.edu 1946019Shines@cs.fsu.edu return csprintf("%-10s r%d,%d(r%d)%s%s%s%s%s", 1956019Shines@cs.fsu.edu mnemonic, RA, disp, RB, 1966019Shines@cs.fsu.edu HW_LDST_PHYS ? ",PHYS" : "", 1976019Shines@cs.fsu.edu HW_LDST_ALT ? ",ALT" : "", 1986019Shines@cs.fsu.edu HW_LDST_QUAD ? ",QUAD" : "", 1996019Shines@cs.fsu.edu HW_LDST_VPTE ? ",VPTE" : "", 2006019Shines@cs.fsu.edu lock_str); 2016019Shines@cs.fsu.edu#endif 2026019Shines@cs.fsu.edu } 2036019Shines@cs.fsu.edu}}; 2046019Shines@cs.fsu.edu 2056019Shines@cs.fsu.edudef format HwLoad(ea_code, memacc_code, class_ext, *flags) {{ 2066019Shines@cs.fsu.edu (header_output, decoder_output, decode_block, exec_output) = \ 2076019Shines@cs.fsu.edu LoadStoreBase(name, Name + class_ext, ea_code, memacc_code, 2086019Shines@cs.fsu.edu mem_flags = [], inst_flags = flags, 2096019Shines@cs.fsu.edu base_class = 'HwLoadStore', exec_template_base = 'Load') 2106019Shines@cs.fsu.edu}}; 2116019Shines@cs.fsu.edu 2126019Shines@cs.fsu.edu 2136019Shines@cs.fsu.edudef format HwStore(ea_code, memacc_code, class_ext, *flags) {{ 2146019Shines@cs.fsu.edu (header_output, decoder_output, decode_block, exec_output) = \ 2156019Shines@cs.fsu.edu LoadStoreBase(name, Name + class_ext, ea_code, memacc_code, 2166019Shines@cs.fsu.edu mem_flags = [], inst_flags = flags, 2176019Shines@cs.fsu.edu base_class = 'HwLoadStore', exec_template_base = 'Store') 2186019Shines@cs.fsu.edu}}; 2196019Shines@cs.fsu.edu 2206019Shines@cs.fsu.edu 2216019Shines@cs.fsu.edudef format HwStoreCond(ea_code, memacc_code, postacc_code, class_ext, 2226019Shines@cs.fsu.edu *flags) {{ 2236019Shines@cs.fsu.edu (header_output, decoder_output, decode_block, exec_output) = \ 2246019Shines@cs.fsu.edu LoadStoreBase(name, Name + class_ext, ea_code, memacc_code, 2256019Shines@cs.fsu.edu postacc_code, mem_flags = [], inst_flags = flags, 2266019Shines@cs.fsu.edu base_class = 'HwLoadStore') 2276019Shines@cs.fsu.edu}}; 2286019Shines@cs.fsu.edu 2296019Shines@cs.fsu.edu 2306019Shines@cs.fsu.eduoutput header {{ 2316019Shines@cs.fsu.edu /** 2326019Shines@cs.fsu.edu * Base class for hw_mfpr and hw_mtpr. 2336019Shines@cs.fsu.edu */ 2346019Shines@cs.fsu.edu class HwMoveIPR : public AlphaStaticInst 2356019Shines@cs.fsu.edu { 2366019Shines@cs.fsu.edu protected: 2376019Shines@cs.fsu.edu /// Index of internal processor register. 2386019Shines@cs.fsu.edu int ipr_index; 2396019Shines@cs.fsu.edu 2406019Shines@cs.fsu.edu /// Constructor 2416019Shines@cs.fsu.edu HwMoveIPR(const char *mnem, ExtMachInst _machInst, OpClass __opClass) 2426019Shines@cs.fsu.edu : AlphaStaticInst(mnem, _machInst, __opClass), 2436019Shines@cs.fsu.edu ipr_index(HW_IPR_IDX) 2446019Shines@cs.fsu.edu { 2456019Shines@cs.fsu.edu } 2466019Shines@cs.fsu.edu 2476019Shines@cs.fsu.edu std::string 2486019Shines@cs.fsu.edu generateDisassembly(Addr pc, const SymbolTable *symtab) const; 2496019Shines@cs.fsu.edu }; 2506019Shines@cs.fsu.edu}}; 2516019Shines@cs.fsu.edu 2526019Shines@cs.fsu.eduoutput decoder {{ 2536019Shines@cs.fsu.edu std::string 2546019Shines@cs.fsu.edu HwMoveIPR::generateDisassembly(Addr pc, const SymbolTable *symtab) const 2556019Shines@cs.fsu.edu { 2566019Shines@cs.fsu.edu if (_numSrcRegs > 0) { 2576019Shines@cs.fsu.edu // must be mtpr 2586019Shines@cs.fsu.edu return csprintf("%-10s r%d,IPR(%#x)", 2596019Shines@cs.fsu.edu mnemonic, RA, ipr_index); 2606019Shines@cs.fsu.edu } 2616019Shines@cs.fsu.edu else { 2626019Shines@cs.fsu.edu // must be mfpr 2636019Shines@cs.fsu.edu return csprintf("%-10s IPR(%#x),r%d", 2646019Shines@cs.fsu.edu mnemonic, ipr_index, RA); 2656019Shines@cs.fsu.edu } 2666019Shines@cs.fsu.edu } 2676019Shines@cs.fsu.edu}}; 2686019Shines@cs.fsu.edu 2696019Shines@cs.fsu.edudef format HwMoveIPR(code, *flags) {{ 2706019Shines@cs.fsu.edu all_flags = ['IprAccessOp'] 2716019Shines@cs.fsu.edu all_flags += flags 2726019Shines@cs.fsu.edu iop = InstObjParams(name, Name, 'HwMoveIPR', code, all_flags) 2736019Shines@cs.fsu.edu header_output = BasicDeclare.subst(iop) 2746019Shines@cs.fsu.edu decoder_output = BasicConstructor.subst(iop) 2756019Shines@cs.fsu.edu decode_block = BasicDecode.subst(iop) 2766019Shines@cs.fsu.edu exec_output = BasicExecute.subst(iop) 2776019Shines@cs.fsu.edu}}; 2786019Shines@cs.fsu.edu 2796019Shines@cs.fsu.edu 2806019Shines@cs.fsu.edu