isa.hh revision 11168
16313Sgblack@eecs.umich.edu/* 26313Sgblack@eecs.umich.edu * Copyright (c) 2009 The Regents of The University of Michigan 36313Sgblack@eecs.umich.edu * All rights reserved. 46313Sgblack@eecs.umich.edu * 56313Sgblack@eecs.umich.edu * Redistribution and use in source and binary forms, with or without 66313Sgblack@eecs.umich.edu * modification, are permitted provided that the following conditions are 76313Sgblack@eecs.umich.edu * met: redistributions of source code must retain the above copyright 86313Sgblack@eecs.umich.edu * notice, this list of conditions and the following disclaimer; 96313Sgblack@eecs.umich.edu * redistributions in binary form must reproduce the above copyright 106313Sgblack@eecs.umich.edu * notice, this list of conditions and the following disclaimer in the 116313Sgblack@eecs.umich.edu * documentation and/or other materials provided with the distribution; 126313Sgblack@eecs.umich.edu * neither the name of the copyright holders nor the names of its 136313Sgblack@eecs.umich.edu * contributors may be used to endorse or promote products derived from 146313Sgblack@eecs.umich.edu * this software without specific prior written permission. 156313Sgblack@eecs.umich.edu * 166313Sgblack@eecs.umich.edu * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 176313Sgblack@eecs.umich.edu * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 186313Sgblack@eecs.umich.edu * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 196313Sgblack@eecs.umich.edu * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 206313Sgblack@eecs.umich.edu * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 216313Sgblack@eecs.umich.edu * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 226313Sgblack@eecs.umich.edu * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 236313Sgblack@eecs.umich.edu * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 246313Sgblack@eecs.umich.edu * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 256313Sgblack@eecs.umich.edu * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 266313Sgblack@eecs.umich.edu * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 276313Sgblack@eecs.umich.edu * 286313Sgblack@eecs.umich.edu * Authors: Gabe Black 296313Sgblack@eecs.umich.edu */ 306313Sgblack@eecs.umich.edu 316313Sgblack@eecs.umich.edu#ifndef __ARCH_ALPHA_ISA_HH__ 326313Sgblack@eecs.umich.edu#define __ARCH_ALPHA_ISA_HH__ 336313Sgblack@eecs.umich.edu 348229Snate@binkert.org#include <cstring> 358229Snate@binkert.org#include <iostream> 366330Sgblack@eecs.umich.edu#include <string> 376330Sgblack@eecs.umich.edu 386330Sgblack@eecs.umich.edu#include "arch/alpha/registers.hh" 396313Sgblack@eecs.umich.edu#include "arch/alpha/types.hh" 406330Sgblack@eecs.umich.edu#include "base/types.hh" 419384SAndreas.Sandberg@arm.com#include "sim/sim_object.hh" 4210033SAli.Saidi@ARM.com#include "sim/system.hh" 436313Sgblack@eecs.umich.edu 449384SAndreas.Sandberg@arm.comstruct AlphaISAParams; 456330Sgblack@eecs.umich.educlass BaseCPU; 466313Sgblack@eecs.umich.educlass Checkpoint; 476313Sgblack@eecs.umich.educlass EventManager; 486330Sgblack@eecs.umich.educlass ThreadContext; 496313Sgblack@eecs.umich.edu 506313Sgblack@eecs.umich.edunamespace AlphaISA 516313Sgblack@eecs.umich.edu{ 529384SAndreas.Sandberg@arm.com class ISA : public SimObject 536313Sgblack@eecs.umich.edu { 546330Sgblack@eecs.umich.edu public: 556330Sgblack@eecs.umich.edu typedef uint64_t InternalProcReg; 569384SAndreas.Sandberg@arm.com typedef AlphaISAParams Params; 576330Sgblack@eecs.umich.edu 586313Sgblack@eecs.umich.edu protected: 5910033SAli.Saidi@ARM.com // Parent system 6010033SAli.Saidi@ARM.com System *system; 6110033SAli.Saidi@ARM.com 626330Sgblack@eecs.umich.edu uint64_t fpcr; // floating point condition codes 636330Sgblack@eecs.umich.edu uint64_t uniq; // process-unique register 646330Sgblack@eecs.umich.edu bool lock_flag; // lock flag for LL/SC 656330Sgblack@eecs.umich.edu Addr lock_addr; // lock address for LL/SC 666330Sgblack@eecs.umich.edu int intr_flag; 676330Sgblack@eecs.umich.edu 686330Sgblack@eecs.umich.edu InternalProcReg ipr[NumInternalProcRegs]; // Internal processor regs 696330Sgblack@eecs.umich.edu 706330Sgblack@eecs.umich.edu protected: 716330Sgblack@eecs.umich.edu InternalProcReg readIpr(int idx, ThreadContext *tc); 726330Sgblack@eecs.umich.edu void setIpr(int idx, InternalProcReg val, ThreadContext *tc); 736313Sgblack@eecs.umich.edu 746313Sgblack@eecs.umich.edu public: 756313Sgblack@eecs.umich.edu 7610698Sandreas.hansson@arm.com MiscReg readMiscRegNoEffect(int misc_reg, ThreadID tid = 0) const; 776330Sgblack@eecs.umich.edu MiscReg readMiscReg(int misc_reg, ThreadContext *tc, ThreadID tid = 0); 786330Sgblack@eecs.umich.edu 796330Sgblack@eecs.umich.edu void setMiscRegNoEffect(int misc_reg, const MiscReg &val, 806330Sgblack@eecs.umich.edu ThreadID tid = 0); 816330Sgblack@eecs.umich.edu void setMiscReg(int misc_reg, const MiscReg &val, ThreadContext *tc, 826330Sgblack@eecs.umich.edu ThreadID tid = 0); 836330Sgblack@eecs.umich.edu 846330Sgblack@eecs.umich.edu void 856330Sgblack@eecs.umich.edu clear() 866313Sgblack@eecs.umich.edu { 876330Sgblack@eecs.umich.edu fpcr = 0; 886330Sgblack@eecs.umich.edu uniq = 0; 896330Sgblack@eecs.umich.edu lock_flag = 0; 906330Sgblack@eecs.umich.edu lock_addr = 0; 916330Sgblack@eecs.umich.edu intr_flag = 0; 927702Sgblack@eecs.umich.edu memset(ipr, 0, sizeof(ipr)); 936313Sgblack@eecs.umich.edu } 946313Sgblack@eecs.umich.edu 9511168Sandreas.hansson@arm.com void serialize(CheckpointOut &cp) const override; 9611168Sandreas.hansson@arm.com void unserialize(CheckpointIn &cp) override; 976330Sgblack@eecs.umich.edu 986313Sgblack@eecs.umich.edu int 9910035Sandreas.hansson@arm.com flattenIntIndex(int reg) const 1006313Sgblack@eecs.umich.edu { 1016313Sgblack@eecs.umich.edu return reg; 1026313Sgblack@eecs.umich.edu } 1036313Sgblack@eecs.umich.edu 1046313Sgblack@eecs.umich.edu int 10510035Sandreas.hansson@arm.com flattenFloatIndex(int reg) const 1066313Sgblack@eecs.umich.edu { 1076313Sgblack@eecs.umich.edu return reg; 1086313Sgblack@eecs.umich.edu } 1096313Sgblack@eecs.umich.edu 1109920Syasuko.eckert@amd.com // dummy 1119920Syasuko.eckert@amd.com int 11210035Sandreas.hansson@arm.com flattenCCIndex(int reg) const 1139920Syasuko.eckert@amd.com { 1149920Syasuko.eckert@amd.com return reg; 1159920Syasuko.eckert@amd.com } 1169920Syasuko.eckert@amd.com 11710033SAli.Saidi@ARM.com int 11810035Sandreas.hansson@arm.com flattenMiscIndex(int reg) const 11910033SAli.Saidi@ARM.com { 12010033SAli.Saidi@ARM.com return reg; 12110033SAli.Saidi@ARM.com } 12210033SAli.Saidi@ARM.com 1239384SAndreas.Sandberg@arm.com const Params *params() const; 1249384SAndreas.Sandberg@arm.com 1259384SAndreas.Sandberg@arm.com ISA(Params *p); 1269461Snilay@cs.wisc.edu 1279461Snilay@cs.wisc.edu void startup(ThreadContext *tc) {} 1289553Sandreas.hansson@arm.com 1299553Sandreas.hansson@arm.com /// Explicitly import the otherwise hidden startup 1309553Sandreas.hansson@arm.com using SimObject::startup; 1316313Sgblack@eecs.umich.edu }; 1326313Sgblack@eecs.umich.edu} 1336313Sgblack@eecs.umich.edu 1346313Sgblack@eecs.umich.edu#endif 135