system.cc revision 7064:586b0e3a12b3
110396Sakash.bagdia@arm.com/* 210396Sakash.bagdia@arm.com * Copyright (c) 2004-2005 The Regents of The University of Michigan 310396Sakash.bagdia@arm.com * All rights reserved. 410396Sakash.bagdia@arm.com * 510396Sakash.bagdia@arm.com * Redistribution and use in source and binary forms, with or without 610396Sakash.bagdia@arm.com * modification, are permitted provided that the following conditions are 710396Sakash.bagdia@arm.com * met: redistributions of source code must retain the above copyright 810396Sakash.bagdia@arm.com * notice, this list of conditions and the following disclaimer; 910396Sakash.bagdia@arm.com * redistributions in binary form must reproduce the above copyright 1010396Sakash.bagdia@arm.com * notice, this list of conditions and the following disclaimer in the 1110396Sakash.bagdia@arm.com * documentation and/or other materials provided with the distribution; 1210396Sakash.bagdia@arm.com * neither the name of the copyright holders nor the names of its 1310396Sakash.bagdia@arm.com * contributors may be used to endorse or promote products derived from 1410396Sakash.bagdia@arm.com * this software without specific prior written permission. 1510396Sakash.bagdia@arm.com * 1610396Sakash.bagdia@arm.com * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 1710396Sakash.bagdia@arm.com * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 1810396Sakash.bagdia@arm.com * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 1910396Sakash.bagdia@arm.com * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 2010396Sakash.bagdia@arm.com * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 2110396Sakash.bagdia@arm.com * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 2210396Sakash.bagdia@arm.com * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 2310396Sakash.bagdia@arm.com * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 2410396Sakash.bagdia@arm.com * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 2510396Sakash.bagdia@arm.com * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 2610396Sakash.bagdia@arm.com * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 2710396Sakash.bagdia@arm.com * 2810396Sakash.bagdia@arm.com * Authors: Ben Nash 2910396Sakash.bagdia@arm.com */ 3010396Sakash.bagdia@arm.com 3110396Sakash.bagdia@arm.com/** 3210396Sakash.bagdia@arm.com * @file 3310396Sakash.bagdia@arm.com * Modifications for the FreeBSD kernel. 3410396Sakash.bagdia@arm.com * Based on kern/linux/linux_system.cc. 3510396Sakash.bagdia@arm.com * 3610396Sakash.bagdia@arm.com */ 3710396Sakash.bagdia@arm.com 3810396Sakash.bagdia@arm.com#include "arch/alpha/freebsd/system.hh" 3910396Sakash.bagdia@arm.com#include "arch/alpha/system.hh" 4010396Sakash.bagdia@arm.com#include "arch/isa_traits.hh" 4110396Sakash.bagdia@arm.com#include "arch/vtophys.hh" 4210396Sakash.bagdia@arm.com#include "base/loader/symtab.hh" 4310396Sakash.bagdia@arm.com#include "cpu/thread_context.hh" 4410396Sakash.bagdia@arm.com#include "mem/physical.hh" 4510396Sakash.bagdia@arm.com#include "mem/port.hh" 4610396Sakash.bagdia@arm.com#include "sim/byteswap.hh" 4710396Sakash.bagdia@arm.com 48#define TIMER_FREQUENCY 1193180 49 50using namespace std; 51using namespace AlphaISA; 52 53FreebsdAlphaSystem::FreebsdAlphaSystem(Params *p) 54 : AlphaSystem(p) 55{ 56 /** 57 * Any time DELAY is called just skip the function. 58 * Shouldn't we actually emulate the delay? 59 */ 60 skipDelayEvent = addKernelFuncEvent<SkipFuncEvent>("DELAY"); 61 skipCalibrateClocks = 62 addKernelFuncEvent<SkipCalibrateClocksEvent>("calibrate_clocks"); 63} 64 65FreebsdAlphaSystem::~FreebsdAlphaSystem() 66{ 67 delete skipDelayEvent; 68 delete skipCalibrateClocks; 69} 70 71void 72FreebsdAlphaSystem::doCalibrateClocks(ThreadContext *tc) 73{ 74 Addr ppc_vaddr = 0; 75 Addr timer_vaddr = 0; 76 77 ppc_vaddr = (Addr)tc->readIntReg(17); 78 timer_vaddr = (Addr)tc->readIntReg(18); 79 80 virtPort.write(ppc_vaddr, (uint32_t)SimClock::Frequency); 81 virtPort.write(timer_vaddr, (uint32_t)TIMER_FREQUENCY); 82} 83 84void 85FreebsdAlphaSystem::SkipCalibrateClocksEvent::process(ThreadContext *tc) 86{ 87 SkipFuncEvent::process(tc); 88 ((FreebsdAlphaSystem *)tc->getSystemPtr())->doCalibrateClocks(tc); 89} 90 91FreebsdAlphaSystem * 92FreebsdAlphaSystemParams::create() 93{ 94 return new FreebsdAlphaSystem(this); 95} 96