faults.hh revision 4997
16166Ssteve.reinhardt@amd.com/* 26928SBrad.Beckmann@amd.com * Copyright (c) 2003-2005 The Regents of The University of Michigan 36166Ssteve.reinhardt@amd.com * All rights reserved. 46166Ssteve.reinhardt@amd.com * 56166Ssteve.reinhardt@amd.com * Redistribution and use in source and binary forms, with or without 66166Ssteve.reinhardt@amd.com * modification, are permitted provided that the following conditions are 76166Ssteve.reinhardt@amd.com * met: redistributions of source code must retain the above copyright 86166Ssteve.reinhardt@amd.com * notice, this list of conditions and the following disclaimer; 96166Ssteve.reinhardt@amd.com * redistributions in binary form must reproduce the above copyright 106166Ssteve.reinhardt@amd.com * notice, this list of conditions and the following disclaimer in the 116166Ssteve.reinhardt@amd.com * documentation and/or other materials provided with the distribution; 126166Ssteve.reinhardt@amd.com * neither the name of the copyright holders nor the names of its 136166Ssteve.reinhardt@amd.com * contributors may be used to endorse or promote products derived from 146166Ssteve.reinhardt@amd.com * this software without specific prior written permission. 156166Ssteve.reinhardt@amd.com * 166166Ssteve.reinhardt@amd.com * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 176166Ssteve.reinhardt@amd.com * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 186166Ssteve.reinhardt@amd.com * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 196166Ssteve.reinhardt@amd.com * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 206166Ssteve.reinhardt@amd.com * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 216166Ssteve.reinhardt@amd.com * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 226166Ssteve.reinhardt@amd.com * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 236166Ssteve.reinhardt@amd.com * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 246166Ssteve.reinhardt@amd.com * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 256166Ssteve.reinhardt@amd.com * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 266166Ssteve.reinhardt@amd.com * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 276166Ssteve.reinhardt@amd.com * 286166Ssteve.reinhardt@amd.com * Authors: Gabe Black 296166Ssteve.reinhardt@amd.com * Kevin Lim 306166Ssteve.reinhardt@amd.com */ 316166Ssteve.reinhardt@amd.com 326919SBrad.Beckmann@amd.com#ifndef __ALPHA_FAULTS_HH__ 336919SBrad.Beckmann@amd.com#define __ALPHA_FAULTS_HH__ 346919SBrad.Beckmann@amd.com 356166Ssteve.reinhardt@amd.com#include "config/full_system.hh" 366919SBrad.Beckmann@amd.com#include "sim/faults.hh" 376919SBrad.Beckmann@amd.com 386919SBrad.Beckmann@amd.com#include "arch/alpha/pagetable.hh" 396919SBrad.Beckmann@amd.com 406919SBrad.Beckmann@amd.com// The design of the "name" and "vect" functions is in sim/faults.hh 416919SBrad.Beckmann@amd.com 429113SBrad.Beckmann@amd.comnamespace AlphaISA 436919SBrad.Beckmann@amd.com{ 446919SBrad.Beckmann@amd.com 458920Snilay@cs.wisc.edutypedef const Addr FaultVect; 466919SBrad.Beckmann@amd.com 476919SBrad.Beckmann@amd.comclass AlphaFault : public FaultBase 488920Snilay@cs.wisc.edu{ 496919SBrad.Beckmann@amd.com protected: 507570SBrad.Beckmann@amd.com virtual bool skipFaultingInstruction() {return false;} 517570SBrad.Beckmann@amd.com virtual bool setRestartAddress() {return true;} 526919SBrad.Beckmann@amd.com public: 536919SBrad.Beckmann@amd.com#if FULL_SYSTEM 546166Ssteve.reinhardt@amd.com void invoke(ThreadContext * tc); 557570SBrad.Beckmann@amd.com#endif 567570SBrad.Beckmann@amd.com virtual FaultVect vect() = 0; 577570SBrad.Beckmann@amd.com virtual FaultStat & countStat() = 0; 587570SBrad.Beckmann@amd.com}; 597570SBrad.Beckmann@amd.com 607570SBrad.Beckmann@amd.comclass MachineCheckFault : public AlphaFault 617570SBrad.Beckmann@amd.com{ 627570SBrad.Beckmann@amd.com private: 637570SBrad.Beckmann@amd.com static FaultName _name; 647570SBrad.Beckmann@amd.com static FaultVect _vect; 657570SBrad.Beckmann@amd.com static FaultStat _count; 667570SBrad.Beckmann@amd.com public: 679841Snilay@cs.wisc.edu FaultName name() const {return _name;} 687570SBrad.Beckmann@amd.com FaultVect vect() {return _vect;} 696166Ssteve.reinhardt@amd.com FaultStat & countStat() {return _count;} 706166Ssteve.reinhardt@amd.com bool isMachineCheckFault() const {return true;} 716928SBrad.Beckmann@amd.com}; 726928SBrad.Beckmann@amd.com 739793Sakash.bagdia@arm.comclass AlignmentFault : public AlphaFault 748436SBrad.Beckmann@amd.com{ 756928SBrad.Beckmann@amd.com private: 766166Ssteve.reinhardt@amd.com static FaultName _name; 776919SBrad.Beckmann@amd.com static FaultVect _vect; 786919SBrad.Beckmann@amd.com static FaultStat _count; 796919SBrad.Beckmann@amd.com public: 806919SBrad.Beckmann@amd.com FaultName name() const {return _name;} 816919SBrad.Beckmann@amd.com FaultVect vect() {return _vect;} 828931Sandreas.hansson@arm.com FaultStat & countStat() {return _count;} 839577Snilay@cs.wisc.edu bool isAlignmentFault() const {return true;} 8410405Sandreas.hansson@arm.com}; 859827Sakash.bagdia@arm.com 869827Sakash.bagdia@arm.comstatic inline Fault genMachineCheckFault() 879827Sakash.bagdia@arm.com{ 889827Sakash.bagdia@arm.com return new MachineCheckFault; 899793Sakash.bagdia@arm.com} 909793Sakash.bagdia@arm.com 919793Sakash.bagdia@arm.comstatic inline Fault genAlignmentFault() 929827Sakash.bagdia@arm.com{ 939827Sakash.bagdia@arm.com return new AlignmentFault; 949793Sakash.bagdia@arm.com} 959793Sakash.bagdia@arm.com 969793Sakash.bagdia@arm.comclass ResetFault : public AlphaFault 979793Sakash.bagdia@arm.com{ 986289Snate@binkert.org private: 999826Sandreas.hansson@arm.com static FaultName _name; 1009826Sandreas.hansson@arm.com static FaultVect _vect; 1018436SBrad.Beckmann@amd.com static FaultStat _count; 1026166Ssteve.reinhardt@amd.com public: 1039793Sakash.bagdia@arm.com FaultName name() const {return _name;} 1049827Sakash.bagdia@arm.com FaultVect vect() {return _vect;} 1059827Sakash.bagdia@arm.com FaultStat & countStat() {return _count;} 1069793Sakash.bagdia@arm.com}; 10710120Snilay@cs.wisc.edu 1086166Ssteve.reinhardt@amd.comclass ArithmeticFault : public AlphaFault 10910120Snilay@cs.wisc.edu{ 1106919SBrad.Beckmann@amd.com protected: 1116919SBrad.Beckmann@amd.com bool skipFaultingInstruction() {return true;} 1126919SBrad.Beckmann@amd.com private: 1136919SBrad.Beckmann@amd.com static FaultName _name; 1148839Sandreas.hansson@arm.com static FaultVect _vect; 1159120Sandreas.hansson@arm.com static FaultStat _count; 1167938SBrad.Beckmann@amd.com public: 1177938SBrad.Beckmann@amd.com FaultName name() const {return _name;} 1187938SBrad.Beckmann@amd.com FaultVect vect() {return _vect;} 1197938SBrad.Beckmann@amd.com FaultStat & countStat() {return _count;} 1207938SBrad.Beckmann@amd.com#if FULL_SYSTEM 1217938SBrad.Beckmann@amd.com void invoke(ThreadContext * tc); 1226166Ssteve.reinhardt@amd.com#endif 1239120Sandreas.hansson@arm.com}; 1249120Sandreas.hansson@arm.com 1259120Sandreas.hansson@arm.comclass InterruptFault : public AlphaFault 1266166Ssteve.reinhardt@amd.com{ 1276166Ssteve.reinhardt@amd.com protected: 1286166Ssteve.reinhardt@amd.com bool setRestartAddress() {return false;} 1296166Ssteve.reinhardt@amd.com private: 1308801Sgblack@eecs.umich.edu static FaultName _name; 1316166Ssteve.reinhardt@amd.com static FaultVect _vect; 1326928SBrad.Beckmann@amd.com static FaultStat _count; 1336928SBrad.Beckmann@amd.com public: 1346928SBrad.Beckmann@amd.com FaultName name() const {return _name;} 135 FaultVect vect() {return _vect;} 136 FaultStat & countStat() {return _count;} 137}; 138 139class DtbFault : public AlphaFault 140{ 141 protected: 142 AlphaISA::VAddr vaddr; 143 uint32_t reqFlags; 144 uint64_t flags; 145 public: 146 DtbFault(AlphaISA::VAddr _vaddr, uint32_t _reqFlags, uint64_t _flags) 147 : vaddr(_vaddr), reqFlags(_reqFlags), flags(_flags) 148 { } 149 FaultName name() const = 0; 150 FaultVect vect() = 0; 151 FaultStat & countStat() = 0; 152#if FULL_SYSTEM 153 void invoke(ThreadContext * tc); 154#endif 155}; 156 157class NDtbMissFault : public DtbFault 158{ 159 private: 160 static FaultName _name; 161 static FaultVect _vect; 162 static FaultStat _count; 163 public: 164 NDtbMissFault(AlphaISA::VAddr vaddr, uint32_t reqFlags, uint64_t flags) 165 : DtbFault(vaddr, reqFlags, flags) 166 { } 167 FaultName name() const {return _name;} 168 FaultVect vect() {return _vect;} 169 FaultStat & countStat() {return _count;} 170#if !FULL_SYSTEM 171 void invoke(ThreadContext * tc); 172#endif 173}; 174 175class PDtbMissFault : public DtbFault 176{ 177 private: 178 static FaultName _name; 179 static FaultVect _vect; 180 static FaultStat _count; 181 public: 182 PDtbMissFault(AlphaISA::VAddr vaddr, uint32_t reqFlags, uint64_t flags) 183 : DtbFault(vaddr, reqFlags, flags) 184 { } 185 FaultName name() const {return _name;} 186 FaultVect vect() {return _vect;} 187 FaultStat & countStat() {return _count;} 188}; 189 190class DtbPageFault : public DtbFault 191{ 192 private: 193 static FaultName _name; 194 static FaultVect _vect; 195 static FaultStat _count; 196 public: 197 DtbPageFault(AlphaISA::VAddr vaddr, uint32_t reqFlags, uint64_t flags) 198 : DtbFault(vaddr, reqFlags, flags) 199 { } 200 FaultName name() const {return _name;} 201 FaultVect vect() {return _vect;} 202 FaultStat & countStat() {return _count;} 203}; 204 205class DtbAcvFault : public DtbFault 206{ 207 private: 208 static FaultName _name; 209 static FaultVect _vect; 210 static FaultStat _count; 211 public: 212 DtbAcvFault(AlphaISA::VAddr vaddr, uint32_t reqFlags, uint64_t flags) 213 : DtbFault(vaddr, reqFlags, flags) 214 { } 215 FaultName name() const {return _name;} 216 FaultVect vect() {return _vect;} 217 FaultStat & countStat() {return _count;} 218}; 219 220class DtbAlignmentFault : public DtbFault 221{ 222 private: 223 static FaultName _name; 224 static FaultVect _vect; 225 static FaultStat _count; 226 public: 227 DtbAlignmentFault(AlphaISA::VAddr vaddr, uint32_t reqFlags, uint64_t flags) 228 : DtbFault(vaddr, reqFlags, flags) 229 { } 230 FaultName name() const {return _name;} 231 FaultVect vect() {return _vect;} 232 FaultStat & countStat() {return _count;} 233}; 234 235class ItbFault : public AlphaFault 236{ 237 protected: 238 Addr pc; 239 public: 240 ItbFault(Addr _pc) 241 : pc(_pc) 242 { } 243 FaultName name() const = 0; 244 FaultVect vect() = 0; 245 FaultStat & countStat() = 0; 246#if FULL_SYSTEM 247 void invoke(ThreadContext * tc); 248#endif 249}; 250 251class ItbPageFault : public ItbFault 252{ 253 private: 254 static FaultName _name; 255 static FaultVect _vect; 256 static FaultStat _count; 257 public: 258 ItbPageFault(Addr pc) 259 : ItbFault(pc) 260 { } 261 FaultName name() const {return _name;} 262 FaultVect vect() {return _vect;} 263 FaultStat & countStat() {return _count;} 264#if !FULL_SYSTEM 265 void invoke(ThreadContext * tc); 266#endif 267}; 268 269class ItbAcvFault : public ItbFault 270{ 271 private: 272 static FaultName _name; 273 static FaultVect _vect; 274 static FaultStat _count; 275 public: 276 ItbAcvFault(Addr pc) 277 : ItbFault(pc) 278 { } 279 FaultName name() const {return _name;} 280 FaultVect vect() {return _vect;} 281 FaultStat & countStat() {return _count;} 282}; 283 284class UnimplementedOpcodeFault : public AlphaFault 285{ 286 private: 287 static FaultName _name; 288 static FaultVect _vect; 289 static FaultStat _count; 290 public: 291 FaultName name() const {return _name;} 292 FaultVect vect() {return _vect;} 293 FaultStat & countStat() {return _count;} 294}; 295 296class FloatEnableFault : public AlphaFault 297{ 298 private: 299 static FaultName _name; 300 static FaultVect _vect; 301 static FaultStat _count; 302 public: 303 FaultName name() const {return _name;} 304 FaultVect vect() {return _vect;} 305 FaultStat & countStat() {return _count;} 306}; 307 308class PalFault : public AlphaFault 309{ 310 protected: 311 bool skipFaultingInstruction() {return true;} 312 private: 313 static FaultName _name; 314 static FaultVect _vect; 315 static FaultStat _count; 316 public: 317 FaultName name() const {return _name;} 318 FaultVect vect() {return _vect;} 319 FaultStat & countStat() {return _count;} 320}; 321 322class IntegerOverflowFault : public AlphaFault 323{ 324 private: 325 static FaultName _name; 326 static FaultVect _vect; 327 static FaultStat _count; 328 public: 329 FaultName name() const {return _name;} 330 FaultVect vect() {return _vect;} 331 FaultStat & countStat() {return _count;} 332}; 333 334} // AlphaISA namespace 335 336#endif // __FAULTS_HH__ 337