decoder.hh revision 9478
12SN/A/* 28707Sandreas.hansson@arm.com * Copyright (c) 2012 Google 38707Sandreas.hansson@arm.com * All rights reserved. 48707Sandreas.hansson@arm.com * 58707Sandreas.hansson@arm.com * Redistribution and use in source and binary forms, with or without 68707Sandreas.hansson@arm.com * modification, are permitted provided that the following conditions are 78707Sandreas.hansson@arm.com * met: redistributions of source code must retain the above copyright 88707Sandreas.hansson@arm.com * notice, this list of conditions and the following disclaimer; 98707Sandreas.hansson@arm.com * redistributions in binary form must reproduce the above copyright 108707Sandreas.hansson@arm.com * notice, this list of conditions and the following disclaimer in the 118707Sandreas.hansson@arm.com * documentation and/or other materials provided with the distribution; 128707Sandreas.hansson@arm.com * neither the name of the copyright holders nor the names of its 138707Sandreas.hansson@arm.com * contributors may be used to endorse or promote products derived from 141762SN/A * this software without specific prior written permission. 157897Shestness@cs.utexas.edu * 162SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 172SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 182SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 192SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 202SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 212SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 222SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 232SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 242SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 252SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 262SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 272SN/A * 282SN/A * Authors: Gabe Black 292SN/A */ 302SN/A 312SN/A#ifndef __ARCH_ALPHA_DECODER_HH__ 322SN/A#define __ARCH_ALPHA_DECODER_HH__ 332SN/A 342SN/A#include "arch/generic/decode_cache.hh" 352SN/A#include "arch/types.hh" 362SN/A#include "cpu/static_inst.hh" 372SN/A#include "sim/full_system.hh" 382SN/A 392SN/Anamespace AlphaISA 402665Ssaidi@eecs.umich.edu{ 412665Ssaidi@eecs.umich.edu 422665Ssaidi@eecs.umich.educlass Decoder 437897Shestness@cs.utexas.edu{ 442SN/A protected: 452SN/A // The extended machine instruction being generated 461717SN/A ExtMachInst ext_inst; 471717SN/A bool instDone; 482SN/A 492SN/A public: 502SN/A Decoder() : instDone(false) 518745Sgblack@eecs.umich.edu {} 524182Sgblack@eecs.umich.edu 535664Sgblack@eecs.umich.edu void 54707SN/A process() 556658Snate@binkert.org { } 568229Snate@binkert.org 5756SN/A void 588779Sgblack@eecs.umich.edu reset() 594776Sgblack@eecs.umich.edu { 602SN/A instDone = false; 618901Sandreas.hansson@arm.com } 622190SN/A 632315SN/A // Use this to give data to the predecoder. This should be used 642680Sktlim@umich.edu // when there is control flow. 652SN/A void 662SN/A moreBytes(const PCState &pc, Addr fetchPC, MachInst inst) 674182Sgblack@eecs.umich.edu { 684182Sgblack@eecs.umich.edu ext_inst = inst; 694182Sgblack@eecs.umich.edu instDone = true; 704182Sgblack@eecs.umich.edu if (FullSystem) 714182Sgblack@eecs.umich.edu ext_inst |= (static_cast<ExtMachInst>(pc.pc() & 0x1) << 32); 722356SN/A } 732356SN/A 742356SN/A bool 756144Sksewell@umich.edu needMoreBytes() 762356SN/A { 772356SN/A return true; 786144Sksewell@umich.edu } 792356SN/A 802356SN/A bool 816144Sksewell@umich.edu instReady() 822356SN/A { 832356SN/A return instDone; 842356SN/A } 856144Sksewell@umich.edu 866144Sksewell@umich.edu void takeOverFrom(Decoder * old) {} 876144Sksewell@umich.edu 886144Sksewell@umich.edu protected: 896144Sksewell@umich.edu /// A cache of decoded instruction objects. 905336Shines@cs.fsu.edu static GenericISA::BasicDecodeCache defaultCache; 912356SN/A 922356SN/A public: 932856Srdreslin@umich.edu StaticInstPtr decodeInst(ExtMachInst mach_inst); 942SN/A 951634SN/A /// Decode a machine instruction. 961634SN/A /// @param mach_inst The binary instruction to decode. 971695SN/A /// @retval A pointer to the corresponding StaticInst object. 983814Ssaidi@eecs.umich.edu StaticInstPtr 993814Ssaidi@eecs.umich.edu decode(ExtMachInst mach_inst, Addr addr) 1005712Shsul@eecs.umich.edu { 1015712Shsul@eecs.umich.edu return defaultCache.decode(this, mach_inst, addr); 1025715Shsul@eecs.umich.edu } 1035712Shsul@eecs.umich.edu 1045712Shsul@eecs.umich.edu StaticInstPtr 1051634SN/A decode(AlphaISA::PCState &nextPC) 1068832SAli.Saidi@ARM.com { 1078832SAli.Saidi@ARM.com if (!instDone) 1088832SAli.Saidi@ARM.com return NULL; 1098832SAli.Saidi@ARM.com instDone = false; 1108832SAli.Saidi@ARM.com return decode(ext_inst, nextPC.instAddr()); 1118832SAli.Saidi@ARM.com } 1128707Sandreas.hansson@arm.com}; 1138707Sandreas.hansson@arm.com 1148707Sandreas.hansson@arm.com} // namespace AlphaISA 1158707Sandreas.hansson@arm.com 1168707Sandreas.hansson@arm.com#endif // __ARCH_ALPHA_DECODER_HH__ 1178707Sandreas.hansson@arm.com