SConscript revision 2023
18512Sgeoffrey.blake@arm.com# -*- mode:python -*- 213106Sgiacomo.travaglini@arm.com 38512Sgeoffrey.blake@arm.com# Copyright (c) 2004-2005 The Regents of The University of Michigan 48512Sgeoffrey.blake@arm.com# All rights reserved. 58512Sgeoffrey.blake@arm.com# 68512Sgeoffrey.blake@arm.com# Redistribution and use in source and binary forms, with or without 78512Sgeoffrey.blake@arm.com# modification, are permitted provided that the following conditions are 88512Sgeoffrey.blake@arm.com# met: redistributions of source code must retain the above copyright 98512Sgeoffrey.blake@arm.com# notice, this list of conditions and the following disclaimer; 108512Sgeoffrey.blake@arm.com# redistributions in binary form must reproduce the above copyright 118512Sgeoffrey.blake@arm.com# notice, this list of conditions and the following disclaimer in the 128512Sgeoffrey.blake@arm.com# documentation and/or other materials provided with the distribution; 138512Sgeoffrey.blake@arm.com# neither the name of the copyright holders nor the names of its 148512Sgeoffrey.blake@arm.com# contributors may be used to endorse or promote products derived from 158512Sgeoffrey.blake@arm.com# this software without specific prior written permission. 168512Sgeoffrey.blake@arm.com# 178512Sgeoffrey.blake@arm.com# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 188512Sgeoffrey.blake@arm.com# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 198512Sgeoffrey.blake@arm.com# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 208512Sgeoffrey.blake@arm.com# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 218512Sgeoffrey.blake@arm.com# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 228512Sgeoffrey.blake@arm.com# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 238512Sgeoffrey.blake@arm.com# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 248512Sgeoffrey.blake@arm.com# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 258512Sgeoffrey.blake@arm.com# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 268512Sgeoffrey.blake@arm.com# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 278512Sgeoffrey.blake@arm.com# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 288512Sgeoffrey.blake@arm.com 298512Sgeoffrey.blake@arm.comimport os 308512Sgeoffrey.blake@arm.comimport sys 318512Sgeoffrey.blake@arm.comfrom os.path import isdir 328512Sgeoffrey.blake@arm.com 338512Sgeoffrey.blake@arm.com# This file defines how to build a particular configuration of M5 348512Sgeoffrey.blake@arm.com# based on variable settings in the 'env' build environment. 358512Sgeoffrey.blake@arm.com 368512Sgeoffrey.blake@arm.com# Import build environment variable from SConstruct. 378512Sgeoffrey.blake@arm.comImport('env') 388512Sgeoffrey.blake@arm.com 398512Sgeoffrey.blake@arm.com################################################### 408512Sgeoffrey.blake@arm.com# 418512Sgeoffrey.blake@arm.com# Define needed sources. 428512Sgeoffrey.blake@arm.com# 438512Sgeoffrey.blake@arm.com################################################### 449338SAndreas.Sandberg@arm.com 458512Sgeoffrey.blake@arm.com# Base sources used by all configurations. 468512Sgeoffrey.blake@arm.comarch_base_sources = Split(''' 478512Sgeoffrey.blake@arm.com arch/alpha/decoder.cc 488512Sgeoffrey.blake@arm.com arch/alpha/alpha_o3_exec.cc 498512Sgeoffrey.blake@arm.com arch/alpha/fast_cpu_exec.cc 508512Sgeoffrey.blake@arm.com arch/alpha/simple_cpu_exec.cc 518512Sgeoffrey.blake@arm.com arch/alpha/full_cpu_exec.cc 528512Sgeoffrey.blake@arm.com arch/alpha/faults.cc 539525SAndreas.Sandberg@ARM.com arch/alpha/isa_traits.cc 5413106Sgiacomo.travaglini@arm.com ''') 558512Sgeoffrey.blake@arm.com 568512Sgeoffrey.blake@arm.com# base/circlebuf.cc 578512Sgeoffrey.blake@arm.com# base/copyright.cc 588512Sgeoffrey.blake@arm.com# base/cprintf.cc 5910905Sandreas.sandberg@arm.com# base/embedfile.cc 608512Sgeoffrey.blake@arm.com# base/fast_alloc.cc 618512Sgeoffrey.blake@arm.com# base/fifo_buffer.cc 628512Sgeoffrey.blake@arm.com# base/hostinfo.cc 638512Sgeoffrey.blake@arm.com# base/hybrid_pred.cc 648512Sgeoffrey.blake@arm.com# base/inifile.cc 658512Sgeoffrey.blake@arm.com# base/intmath.cc 668512Sgeoffrey.blake@arm.com# base/match.cc 678512Sgeoffrey.blake@arm.com# base/misc.cc 688512Sgeoffrey.blake@arm.com# base/output.cc 698512Sgeoffrey.blake@arm.com# base/pollevent.cc 708512Sgeoffrey.blake@arm.com# base/range.cc 718512Sgeoffrey.blake@arm.com# base/random.cc 728512Sgeoffrey.blake@arm.com# base/sat_counter.cc 738512Sgeoffrey.blake@arm.com# base/socket.cc 748512Sgeoffrey.blake@arm.com# base/statistics.cc 758512Sgeoffrey.blake@arm.com# base/str.cc 768512Sgeoffrey.blake@arm.com# base/time.cc 778512Sgeoffrey.blake@arm.com# base/trace.cc 788512Sgeoffrey.blake@arm.com# base/traceflags.cc 798512Sgeoffrey.blake@arm.com# base/userinfo.cc 808512Sgeoffrey.blake@arm.com# base/compression/lzss_compression.cc 819193SAli.Saidi@ARM.com# base/loader/aout_object.cc 829193SAli.Saidi@ARM.com# base/loader/ecoff_object.cc 838512Sgeoffrey.blake@arm.com# base/loader/elf_object.cc 848512Sgeoffrey.blake@arm.com# base/loader/object_file.cc 858512Sgeoffrey.blake@arm.com# base/loader/symtab.cc 868512Sgeoffrey.blake@arm.com# base/stats/events.cc 878512Sgeoffrey.blake@arm.com# base/stats/statdb.cc 888512Sgeoffrey.blake@arm.com# base/stats/visit.cc 898512Sgeoffrey.blake@arm.com# base/stats/text.cc 909193SAli.Saidi@ARM.com# 919193SAli.Saidi@ARM.com# cpu/base.cc 928512Sgeoffrey.blake@arm.com# cpu/base_dyn_inst.cc 938512Sgeoffrey.blake@arm.com# cpu/exec_context.cc 948512Sgeoffrey.blake@arm.com# cpu/exetrace.cc 958512Sgeoffrey.blake@arm.com# cpu/pc_event.cc 968512Sgeoffrey.blake@arm.com# cpu/static_inst.cc 978512Sgeoffrey.blake@arm.com# cpu/o3/2bit_local_pred.cc 988512Sgeoffrey.blake@arm.com# cpu/o3/alpha_dyn_inst.cc 998512Sgeoffrey.blake@arm.com# cpu/o3/alpha_cpu.cc 10013106Sgiacomo.travaglini@arm.com# cpu/o3/alpha_cpu_builder.cc 10113106Sgiacomo.travaglini@arm.com# cpu/o3/bpred_unit.cc 10213106Sgiacomo.travaglini@arm.com# cpu/o3/btb.cc 1038512Sgeoffrey.blake@arm.com# cpu/o3/commit.cc 1048512Sgeoffrey.blake@arm.com# cpu/o3/decode.cc 1058512Sgeoffrey.blake@arm.com# cpu/o3/fetch.cc 1068512Sgeoffrey.blake@arm.com# cpu/o3/free_list.cc 1078512Sgeoffrey.blake@arm.com# cpu/o3/cpu.cc 1088512Sgeoffrey.blake@arm.com# cpu/o3/iew.cc 1098512Sgeoffrey.blake@arm.com# cpu/o3/inst_queue.cc 1108512Sgeoffrey.blake@arm.com# cpu/o3/ldstq.cc 1118512Sgeoffrey.blake@arm.com# cpu/o3/mem_dep_unit.cc 1128512Sgeoffrey.blake@arm.com# cpu/o3/ras.cc 1138512Sgeoffrey.blake@arm.com# cpu/o3/rename.cc 1148512Sgeoffrey.blake@arm.com# cpu/o3/rename_map.cc 1158512Sgeoffrey.blake@arm.com# cpu/o3/rob.cc 1168512Sgeoffrey.blake@arm.com# cpu/o3/sat_counter.cc 1178512Sgeoffrey.blake@arm.com# cpu/o3/store_set.cc 1188512Sgeoffrey.blake@arm.com# cpu/o3/tournament_pred.cc 1198512Sgeoffrey.blake@arm.com# cpu/fast/cpu.cc 1208512Sgeoffrey.blake@arm.com# cpu/sampler/sampler.cc 1218512Sgeoffrey.blake@arm.com# cpu/simple/cpu.cc 1228512Sgeoffrey.blake@arm.com# cpu/trace/reader/mem_trace_reader.cc 1238512Sgeoffrey.blake@arm.com# cpu/trace/reader/ibm_reader.cc 1248512Sgeoffrey.blake@arm.com# cpu/trace/reader/itx_reader.cc 1258512Sgeoffrey.blake@arm.com# cpu/trace/reader/m5_reader.cc 12612086Sspwilson2@wisc.edu# cpu/trace/opt_cpu.cc 1278512Sgeoffrey.blake@arm.com# cpu/trace/trace_cpu.cc 1288512Sgeoffrey.blake@arm.com# 12912086Sspwilson2@wisc.edu# encumbered/cpu/full/bpred.cc 1308512Sgeoffrey.blake@arm.com# encumbered/cpu/full/commit.cc 1318512Sgeoffrey.blake@arm.com# encumbered/cpu/full/cpu.cc 1328512Sgeoffrey.blake@arm.com# encumbered/cpu/full/create_vector.cc 1338512Sgeoffrey.blake@arm.com# encumbered/cpu/full/cv_spec_state.cc 1348512Sgeoffrey.blake@arm.com# encumbered/cpu/full/dd_queue.cc 1358512Sgeoffrey.blake@arm.com# encumbered/cpu/full/dep_link.cc 13613106Sgiacomo.travaglini@arm.com# encumbered/cpu/full/dispatch.cc 13713106Sgiacomo.travaglini@arm.com# encumbered/cpu/full/dyn_inst.cc 13813106Sgiacomo.travaglini@arm.com# encumbered/cpu/full/execute.cc 13913106Sgiacomo.travaglini@arm.com# encumbered/cpu/full/fetch.cc 1408512Sgeoffrey.blake@arm.com# encumbered/cpu/full/floss_reasons.cc 1418512Sgeoffrey.blake@arm.com# encumbered/cpu/full/fu_pool.cc 1428512Sgeoffrey.blake@arm.com# encumbered/cpu/full/inst_fifo.cc 1438512Sgeoffrey.blake@arm.com# encumbered/cpu/full/instpipe.cc 1448512Sgeoffrey.blake@arm.com# encumbered/cpu/full/issue.cc 1458512Sgeoffrey.blake@arm.com# encumbered/cpu/full/ls_queue.cc 1468512Sgeoffrey.blake@arm.com# encumbered/cpu/full/machine_queue.cc 1478512Sgeoffrey.blake@arm.com# encumbered/cpu/full/pipetrace.cc 1488512Sgeoffrey.blake@arm.com# encumbered/cpu/full/readyq.cc 14911168Sandreas.hansson@arm.com# encumbered/cpu/full/reg_info.cc 15011168Sandreas.hansson@arm.com# encumbered/cpu/full/rob_station.cc 1518512Sgeoffrey.blake@arm.com# encumbered/cpu/full/spec_memory.cc 1528512Sgeoffrey.blake@arm.com# encumbered/cpu/full/spec_state.cc 1538512Sgeoffrey.blake@arm.com# encumbered/cpu/full/storebuffer.cc 1548512Sgeoffrey.blake@arm.com# encumbered/cpu/full/writeback.cc 1558512Sgeoffrey.blake@arm.com# encumbered/cpu/full/iq/iq_station.cc 1569525SAndreas.Sandberg@ARM.com# encumbered/cpu/full/iq/iqueue.cc 1578512Sgeoffrey.blake@arm.com# encumbered/cpu/full/iq/segmented/chain_info.cc 1588512Sgeoffrey.blake@arm.com# encumbered/cpu/full/iq/segmented/chain_wire.cc 15913106Sgiacomo.travaglini@arm.com# encumbered/cpu/full/iq/segmented/iq_seg.cc 1608512Sgeoffrey.blake@arm.com# encumbered/cpu/full/iq/segmented/iq_segmented.cc 1618512Sgeoffrey.blake@arm.com# encumbered/cpu/full/iq/segmented/seg_chain.cc 1628512Sgeoffrey.blake@arm.com# encumbered/cpu/full/iq/seznec/iq_seznec.cc 1638512Sgeoffrey.blake@arm.com# encumbered/cpu/full/iq/standard/iq_standard.cc 1648512Sgeoffrey.blake@arm.com# encumbered/mem/functional/main.cc 1658512Sgeoffrey.blake@arm.com# 1668512Sgeoffrey.blake@arm.com# mem/base_hier.cc 1678512Sgeoffrey.blake@arm.com# mem/base_mem.cc 1688512Sgeoffrey.blake@arm.com# mem/hier_params.cc 1698512Sgeoffrey.blake@arm.com# mem/mem_cmd.cc 1708512Sgeoffrey.blake@arm.com# mem/mem_debug.cc 1718512Sgeoffrey.blake@arm.com# mem/mem_req.cc 1728512Sgeoffrey.blake@arm.com# mem/memory_interface.cc 1738512Sgeoffrey.blake@arm.com# mem/bus/base_interface.cc 17413106Sgiacomo.travaglini@arm.com# mem/bus/bus.cc 17513106Sgiacomo.travaglini@arm.com# mem/bus/bus_bridge.cc 17613106Sgiacomo.travaglini@arm.com# mem/bus/bus_bridge_master.cc 1778512Sgeoffrey.blake@arm.com# mem/bus/bus_bridge_slave.cc 1788512Sgeoffrey.blake@arm.com# mem/bus/bus_interface.cc 1798512Sgeoffrey.blake@arm.com# mem/bus/dma_bus_interface.cc 1808512Sgeoffrey.blake@arm.com# mem/bus/dma_interface.cc 1818512Sgeoffrey.blake@arm.com# mem/bus/master_interface.cc 18211174Sandreas.hansson@arm.com# mem/bus/slave_interface.cc 1838512Sgeoffrey.blake@arm.com# mem/cache/base_cache.cc 1848512Sgeoffrey.blake@arm.com# mem/cache/cache.cc 1858512Sgeoffrey.blake@arm.com# mem/cache/cache_builder.cc 1868512Sgeoffrey.blake@arm.com# mem/cache/coherence/coherence_protocol.cc 1878512Sgeoffrey.blake@arm.com# mem/cache/coherence/uni_coherence.cc 1888512Sgeoffrey.blake@arm.com# mem/cache/miss/blocking_buffer.cc 18911174Sandreas.hansson@arm.com# mem/cache/miss/miss_queue.cc 1908512Sgeoffrey.blake@arm.com# mem/cache/miss/mshr.cc 19111168Sandreas.hansson@arm.com# mem/cache/miss/mshr_queue.cc 19211168Sandreas.hansson@arm.com# mem/cache/prefetch/base_prefetcher.cc 1938512Sgeoffrey.blake@arm.com# mem/cache/prefetch/prefetcher.cc 1948512Sgeoffrey.blake@arm.com# mem/cache/prefetch/tagged_prefetcher.cc 1958512Sgeoffrey.blake@arm.com# mem/cache/tags/base_tags.cc 1968512Sgeoffrey.blake@arm.com# mem/cache/tags/cache_tags.cc 1978512Sgeoffrey.blake@arm.com# mem/cache/tags/fa_lru.cc 198# mem/cache/tags/iic.cc 199# mem/cache/tags/lru.cc 200# mem/cache/tags/repl/gen.cc 201# mem/cache/tags/repl/repl.cc 202# mem/cache/tags/split.cc 203# mem/cache/tags/split_lru.cc 204# mem/cache/tags/split_lifo.cc 205# mem/functional/functional.cc 206# mem/timing/base_memory.cc 207# mem/timing/memory_builder.cc 208# mem/timing/simple_mem_bank.cc 209# mem/trace/itx_writer.cc 210# mem/trace/mem_trace_writer.cc 211# mem/trace/m5_writer.cc 212# 213# python/pyconfig.cc 214# python/embedded_py.cc 215# 216# sim/builder.cc 217# sim/configfile.cc 218# sim/debug.cc 219# sim/eventq.cc 220# sim/main.cc 221# sim/param.cc 222# sim/profile.cc 223# sim/root.cc 224# sim/serialize.cc 225# sim/sim_events.cc 226# sim/sim_exit.cc 227# sim/sim_object.cc 228# sim/startup.cc 229# sim/stat_context.cc 230# sim/stat_control.cc 231# sim/trace_context.cc 232# ''') 233 234# MySql sources 235arch_mysql_sources = Split(''' 236 ''') 237# base/mysql.cc 238# base/stats/mysql.cc 239# ''') 240 241# Full-system sources 242arch_full_system_sources = Split(''' 243 arch/alpha/alpha_memory.cc 244 arch/alpha/arguments.cc 245 arch/alpha/ev5.cc 246 arch/alpha/osfpal.cc 247 arch/alpha/pseudo_inst.cc 248 arch/alpha/stacktrace.cc 249 arch/alpha/vtophys.cc 250 ''') 251 252# base/crc.cc 253# base/inet.cc 254# base/remote_gdb.cc 255# 256# cpu/intr_control.cc 257# cpu/profile.cc 258# 259# dev/alpha_console.cc 260# dev/baddev.cc 261# dev/simconsole.cc 262# dev/disk_image.cc 263# dev/etherbus.cc 264# dev/etherdump.cc 265# dev/etherint.cc 266# dev/etherlink.cc 267# dev/etherpkt.cc 268# dev/ethertap.cc 269# dev/ide_ctrl.cc 270# dev/ide_disk.cc 271# dev/io_device.cc 272# dev/ns_gige.cc 273# dev/pciconfigall.cc 274# dev/pcidev.cc 275# dev/pcifake.cc 276# dev/pktfifo.cc 277# dev/platform.cc 278# dev/sinic.cc 279# dev/simple_disk.cc 280# dev/tsunami.cc 281# dev/tsunami_cchip.cc 282# dev/isa_fake.cc 283# dev/tsunami_io.cc 284# dev/tsunami_pchip.cc 285# dev/uart.cc 286# dev/uart8250.cc 287# 288# kern/kernel_binning.cc 289# kern/kernel_stats.cc 290# kern/system_events.cc 291# kern/freebsd/freebsd_system.cc 292# kern/linux/linux_syscalls.cc 293# kern/linux/linux_system.cc 294# kern/linux/printk.cc 295# kern/tru64/dump_mbuf.cc 296# kern/tru64/printf.cc 297# kern/tru64/tru64_events.cc 298# kern/tru64/tru64_syscalls.cc 299# kern/tru64/tru64_system.cc 300# 301# mem/functional/memory_control.cc 302# mem/functional/physical.cc 303# 304# sim/system.cc 305# ''') 306 307# turbolaser encumbered sources 308arch_turbolaser_sources = Split(''' 309 ''') 310# encumbered/dev/dma.cc 311# encumbered/dev/etherdev.cc 312# encumbered/dev/scsi.cc 313# encumbered/dev/scsi_ctrl.cc 314# encumbered/dev/scsi_disk.cc 315# encumbered/dev/scsi_none.cc 316# encumbered/dev/tlaser_clock.cc 317# encumbered/dev/tlaser_ipi.cc 318# encumbered/dev/tlaser_mbox.cc 319# encumbered/dev/tlaser_mc146818.cc 320# encumbered/dev/tlaser_node.cc 321# encumbered/dev/tlaser_pcia.cc 322# encumbered/dev/tlaser_pcidev.cc 323# encumbered/dev/tlaser_serial.cc 324# encumbered/dev/turbolaser.cc 325# encumbered/dev/uart8530.cc 326# ''') 327 328# Syscall emulation (non-full-system) sources 329arch_syscall_emulation_sources = Split(''' 330 arch/alpha/alpha_common_syscall_emul.cc 331 arch/alpha/alpha_linux_process.cc 332 arch/alpha/alpha_tru64_process.cc 333 ''') 334# cpu/memtest/memtest.cc 335# encumbered/eio/eio.cc 336# encumbered/eio/exolex.cc 337# encumbered/eio/libexo.cc 338# sim/process.cc 339# sim/syscall_emul.cc 340# ''') 341 342#targetarch_files = Split(''' 343# alpha_common_syscall_emul.hh 344# alpha_linux_process.hh 345# alpha_memory.hh 346# alpha_tru64_process.hh 347# aout_machdep.h 348# arguments.hh 349# byte_swap.hh 350# ecoff_machdep.h 351# ev5.hh 352# faults.hh 353# isa_fullsys_traits.hh 354# isa_traits.hh 355# osfpal.hh 356# pseudo_inst.hh 357# stacktrace.hh 358# vptr.hh 359# vtophys.hh 360# ''') 361 362#for f in targetarch_files: 363# env.Command('targetarch/' + f, 'arch/alpha/' + f, 364# '''echo '#include "arch/alpha/%s"' > $TARGET''' % f) 365 366 367# Set up complete list of sources based on configuration. 368sources = arch_base_sources 369 370if env['FULL_SYSTEM']: 371 sources += arch_full_system_sources 372 if env['ALPHA_TLASER']: 373 sources += arch_turbolaser_sources 374else: 375 sources += arch_syscall_emulation_sources 376 377if env['USE_MYSQL']: 378 sources += arch_mysql_sources 379 380for opt in env.ExportOptions: 381 env.ConfigFile(opt) 382 383################################################### 384# 385# Special build rules. 386# 387################################################### 388 389# base/traceflags.{cc,hh} are generated from base/traceflags.py. 390# $TARGET.base will expand to "<build-dir>/base/traceflags". 391# env.Command(Split('base/traceflags.hh base/traceflags.cc'), 392# 'base/traceflags.py', 393# 'python $SOURCE $TARGET.base') 394 395# several files are generated from arch/$TARGET_ISA/isa_desc. 396#env.Command(Split('''decoder.cc 397# decoder.hh 398# alpha_o3_exec.cc 399# fast_cpu_exec.cc 400# simple_cpu_exec.cc 401# full_cpu_exec.cc'''), 402# Split('''isa_desc 403# ../isa_parser.py'''), 404# '$SRCDIR/arch/isa_parser.py $SOURCE $TARGET.dir arch/alpha') 405 406 407# libelf build is described in its own SConscript file. 408# SConscript-local is the per-config build, which just copies some 409# header files into a place where they can be found. 410# SConscript('libelf/SConscript-local', exports = 'env', duplicate=0) 411# SConscript('python/SConscript', exports = ['env'], duplicate=0) 412 413# This function adds the specified sources to the given build 414# environment, and returns a list of all the corresponding SCons 415# Object nodes (including an extra one for date.cc). We explicitly 416# add the Object nodes so we can set up special dependencies for 417# date.cc. 418# def make_objs(sources, env): 419# objs = [env.Object(s) for s in sources] 420# # make date.cc depend on all other objects so it always gets 421# # recompiled whenever anything else does 422# date_obj = env.Object('base/date.cc') 423# base/traceflags.{cc,hh} are generated from base/traceflags.py. 424# $TARGET.base will expand to "<build-dir>/base/traceflags". 425# env.Command(Split('base/traceflags.hh base/traceflags.cc'), 426# 'base/traceflags.py', 427# 'python $SOURCE $TARGET.base') 428# 429# Split('''arch/alpha/isa_desc 430# arch/isa_parser.py'''), 431# env.Depends(date_obj, objs) 432# objs.append(date_obj) 433# return objs 434 435################################################### 436# 437# Define binaries. Each different build type (debug, opt, etc.) gets 438# a slightly different build environment. 439# 440################################################### 441 442# Include file paths are rooted in this directory. SCons will 443# automatically expand '.' to refer to both the source directory and 444# the corresponding build directory to pick up generated include 445# files. 446# env.Append(CPPPATH='.') 447 448# Debug binary 449# debugEnv = env.Copy(OBJSUFFIX='.do') 450# debugEnv.Label = 'debug' 451# debugEnv.Append(CCFLAGS=Split('-g -gstabs+ -O0')) 452# debugEnv.Append(CPPDEFINES='DEBUG') 453# tlist = debugEnv.Program(target = 'm5.debug', 454# source = make_objs(sources, debugEnv)) 455# debugEnv.M5Binary = tlist[0] 456 457# Optimized binary 458# optEnv = env.Copy() 459# optEnv.Label = 'opt' 460# optEnv.Append(CCFLAGS=Split('-g -O5')) 461# tlist = optEnv.Program(target = 'm5.opt', 462# source = make_objs(sources, optEnv)) 463# optEnv.M5Binary = tlist[0] 464 465# "Fast" binary 466# fastEnv = env.Copy(OBJSUFFIX='.fo') 467# fastEnv.Label = 'fast' 468# fastEnv.Append(CCFLAGS=Split('-O5')) 469# fastEnv.Append(CPPDEFINES='NDEBUG') 470# fastEnv.Program(target = 'm5.fast.unstripped', 471# source = make_objs(sources, fastEnv)) 472# tlist = fastEnv.Command(target = 'm5.fast', 473# source = 'm5.fast.unstripped', 474# action = 'strip $SOURCE -o $TARGET') 475# fastEnv.M5Binary = tlist[0] 476 477# Profiled binary 478# profEnv = env.Copy(OBJSUFFIX='.po') 479# profEnv.Label = 'prof' 480# profEnv.Append(CCFLAGS=Split('-O5 -g -pg'), LINKFLAGS='-pg') 481# tlist = profEnv.Program(target = 'm5.prof', 482# source = make_objs(sources, profEnv)) 483# profEnv.M5Binary = tlist[0] 484# 485# envList = [debugEnv, optEnv, fastEnv, profEnv] 486# 487# Return('envList') 488Return('sources') 489