SConscript revision 2797:b5f26b4eacef
16019Shines@cs.fsu.edu# -*- mode:python -*- 210850SGiacomo.Gabrielli@arm.com 37416SAli.Saidi@ARM.com# Copyright (c) 2004-2005 The Regents of The University of Michigan 47416SAli.Saidi@ARM.com# All rights reserved. 57416SAli.Saidi@ARM.com# 67416SAli.Saidi@ARM.com# Redistribution and use in source and binary forms, with or without 77416SAli.Saidi@ARM.com# modification, are permitted provided that the following conditions are 87416SAli.Saidi@ARM.com# met: redistributions of source code must retain the above copyright 97416SAli.Saidi@ARM.com# notice, this list of conditions and the following disclaimer; 107416SAli.Saidi@ARM.com# redistributions in binary form must reproduce the above copyright 117416SAli.Saidi@ARM.com# notice, this list of conditions and the following disclaimer in the 127416SAli.Saidi@ARM.com# documentation and/or other materials provided with the distribution; 137416SAli.Saidi@ARM.com# neither the name of the copyright holders nor the names of its 146019Shines@cs.fsu.edu# contributors may be used to endorse or promote products derived from 156019Shines@cs.fsu.edu# this software without specific prior written permission. 166019Shines@cs.fsu.edu# 176019Shines@cs.fsu.edu# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 186019Shines@cs.fsu.edu# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 196019Shines@cs.fsu.edu# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 206019Shines@cs.fsu.edu# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 216019Shines@cs.fsu.edu# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 226019Shines@cs.fsu.edu# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 236019Shines@cs.fsu.edu# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 246019Shines@cs.fsu.edu# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 256019Shines@cs.fsu.edu# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 266019Shines@cs.fsu.edu# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 276019Shines@cs.fsu.edu# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 286019Shines@cs.fsu.edu# 296019Shines@cs.fsu.edu# Authors: Steve Reinhardt 306019Shines@cs.fsu.edu 316019Shines@cs.fsu.eduimport os 326019Shines@cs.fsu.eduimport sys 336019Shines@cs.fsu.edufrom os.path import isdir 346019Shines@cs.fsu.edu 356019Shines@cs.fsu.edu# This file defines how to build a particular configuration of M5 366019Shines@cs.fsu.edu# based on variable settings in the 'env' build environment. 376019Shines@cs.fsu.edu 386019Shines@cs.fsu.edu# Import build environment variable from SConstruct. 396019Shines@cs.fsu.eduImport('env') 406019Shines@cs.fsu.edu 417416SAli.Saidi@ARM.com################################################### 427416SAli.Saidi@ARM.com# 436019Shines@cs.fsu.edu# Define needed sources. 446019Shines@cs.fsu.edu# 456019Shines@cs.fsu.edu################################################### 466019Shines@cs.fsu.edu 476019Shines@cs.fsu.edu# Base sources used by all configurations. 4813536Sandreas.sandberg@arm.com 496019Shines@cs.fsu.edubase_sources = Split(''' 506019Shines@cs.fsu.edu base/circlebuf.cc 5113536Sandreas.sandberg@arm.com base/cprintf.cc 5213536Sandreas.sandberg@arm.com base/fast_alloc.cc 5313536Sandreas.sandberg@arm.com base/fifo_buffer.cc 5413536Sandreas.sandberg@arm.com base/hostinfo.cc 5513536Sandreas.sandberg@arm.com base/hybrid_pred.cc 5613536Sandreas.sandberg@arm.com base/inifile.cc 5713536Sandreas.sandberg@arm.com base/intmath.cc 5813536Sandreas.sandberg@arm.com base/match.cc 5913536Sandreas.sandberg@arm.com base/misc.cc 6013536Sandreas.sandberg@arm.com base/output.cc 6113538Sandreas.sandberg@arm.com base/pollevent.cc 6213538Sandreas.sandberg@arm.com base/range.cc 6313538Sandreas.sandberg@arm.com base/random.cc 6413538Sandreas.sandberg@arm.com base/sat_counter.cc 6513538Sandreas.sandberg@arm.com base/socket.cc 6613538Sandreas.sandberg@arm.com base/statistics.cc 6713536Sandreas.sandberg@arm.com base/str.cc 6813536Sandreas.sandberg@arm.com base/time.cc 6913536Sandreas.sandberg@arm.com base/trace.cc 7013536Sandreas.sandberg@arm.com base/traceflags.cc 716019Shines@cs.fsu.edu base/userinfo.cc 726019Shines@cs.fsu.edu base/compression/lzss_compression.cc 736019Shines@cs.fsu.edu base/loader/aout_object.cc 7411382Sbrandon.potter@amd.com base/loader/ecoff_object.cc 7511382Sbrandon.potter@amd.com base/loader/elf_object.cc 7611382Sbrandon.potter@amd.com base/loader/object_file.cc 7711382Sbrandon.potter@amd.com base/loader/symtab.cc 7811382Sbrandon.potter@amd.com base/stats/events.cc 7911382Sbrandon.potter@amd.com base/stats/statdb.cc 8011382Sbrandon.potter@amd.com base/stats/visit.cc 8111382Sbrandon.potter@amd.com base/stats/text.cc 8211382Sbrandon.potter@amd.com 8311382Sbrandon.potter@amd.com cpu/activity.cc 8411382Sbrandon.potter@amd.com cpu/base.cc 8511382Sbrandon.potter@amd.com cpu/cpuevent.cc 8611382Sbrandon.potter@amd.com cpu/exetrace.cc 8711382Sbrandon.potter@amd.com cpu/func_unit.cc 8811382Sbrandon.potter@amd.com cpu/op_class.cc 8911382Sbrandon.potter@amd.com cpu/pc_event.cc 9011382Sbrandon.potter@amd.com cpu/quiesce_event.cc 9111382Sbrandon.potter@amd.com cpu/static_inst.cc 9211382Sbrandon.potter@amd.com cpu/sampler/sampler.cc 9311382Sbrandon.potter@amd.com cpu/simple_thread.cc 9411382Sbrandon.potter@amd.com cpu/thread_state.cc 9511382Sbrandon.potter@amd.com 9611382Sbrandon.potter@amd.com mem/bridge.cc 9711382Sbrandon.potter@amd.com mem/bus.cc 9811382Sbrandon.potter@amd.com mem/mem_object.cc 9911382Sbrandon.potter@amd.com mem/packet.cc 10011382Sbrandon.potter@amd.com mem/physical.cc 10111382Sbrandon.potter@amd.com mem/port.cc 10211382Sbrandon.potter@amd.com 10311382Sbrandon.potter@amd.com sim/builder.cc 10411382Sbrandon.potter@amd.com sim/debug.cc 10511382Sbrandon.potter@amd.com sim/eventq.cc 10611382Sbrandon.potter@amd.com sim/faults.cc 10711382Sbrandon.potter@amd.com sim/main.cc 10811382Sbrandon.potter@amd.com python/swig/cc_main_wrap.cc 1096019Shines@cs.fsu.edu sim/param.cc 1106019Shines@cs.fsu.edu sim/root.cc 11111381Sbrandon.potter@amd.com sim/serialize.cc 1126019Shines@cs.fsu.edu sim/sim_events.cc 1136019Shines@cs.fsu.edu sim/sim_object.cc 1146019Shines@cs.fsu.edu sim/startup.cc 1156019Shines@cs.fsu.edu sim/stat_context.cc 1166019Shines@cs.fsu.edu sim/stat_control.cc 1177416SAli.Saidi@ARM.com sim/system.cc 1187416SAli.Saidi@ARM.com sim/trace_context.cc 1197416SAli.Saidi@ARM.com ''') 1207416SAli.Saidi@ARM.com 1217416SAli.Saidi@ARM.com# Old FullCPU sources 1227416SAli.Saidi@ARM.comfull_cpu_sources = Split(''' 1237416SAli.Saidi@ARM.com encumbered/cpu/full/bpred.cc 1247416SAli.Saidi@ARM.com encumbered/cpu/full/commit.cc 1256019Shines@cs.fsu.edu encumbered/cpu/full/cpu.cc 12611382Sbrandon.potter@amd.com encumbered/cpu/full/create_vector.cc 12711382Sbrandon.potter@amd.com encumbered/cpu/full/cv_spec_state.cc 12811382Sbrandon.potter@amd.com encumbered/cpu/full/dd_queue.cc 12911382Sbrandon.potter@amd.com encumbered/cpu/full/dep_link.cc 13011382Sbrandon.potter@amd.com encumbered/cpu/full/dispatch.cc 13111382Sbrandon.potter@amd.com encumbered/cpu/full/dyn_inst.cc 13211382Sbrandon.potter@amd.com encumbered/cpu/full/execute.cc 13311382Sbrandon.potter@amd.com encumbered/cpu/full/fetch.cc 13411382Sbrandon.potter@amd.com encumbered/cpu/full/floss_reasons.cc 13511382Sbrandon.potter@amd.com encumbered/cpu/full/fu_pool.cc 13611382Sbrandon.potter@amd.com encumbered/cpu/full/inst_fifo.cc 13711382Sbrandon.potter@amd.com encumbered/cpu/full/instpipe.cc 13811382Sbrandon.potter@amd.com encumbered/cpu/full/issue.cc 13911382Sbrandon.potter@amd.com encumbered/cpu/full/ls_queue.cc 14011382Sbrandon.potter@amd.com encumbered/cpu/full/machine_queue.cc 14111382Sbrandon.potter@amd.com encumbered/cpu/full/pipetrace.cc 14211382Sbrandon.potter@amd.com encumbered/cpu/full/readyq.cc 14311382Sbrandon.potter@amd.com encumbered/cpu/full/reg_info.cc 14411382Sbrandon.potter@amd.com encumbered/cpu/full/rob_station.cc 1456019Shines@cs.fsu.edu encumbered/cpu/full/spec_memory.cc 1466019Shines@cs.fsu.edu encumbered/cpu/full/spec_state.cc 14711383Sbrandon.potter@amd.com encumbered/cpu/full/storebuffer.cc 14811383Sbrandon.potter@amd.com encumbered/cpu/full/writeback.cc 14911383Sbrandon.potter@amd.com encumbered/cpu/full/iq/iq_station.cc 15011383Sbrandon.potter@amd.com encumbered/cpu/full/iq/iqueue.cc 15111383Sbrandon.potter@amd.com encumbered/cpu/full/iq/segmented/chain_info.cc 15211383Sbrandon.potter@amd.com encumbered/cpu/full/iq/segmented/chain_wire.cc 15311383Sbrandon.potter@amd.com encumbered/cpu/full/iq/segmented/iq_seg.cc 15411383Sbrandon.potter@amd.com encumbered/cpu/full/iq/segmented/iq_segmented.cc 15511383Sbrandon.potter@amd.com encumbered/cpu/full/iq/segmented/seg_chain.cc 15611383Sbrandon.potter@amd.com encumbered/cpu/full/iq/seznec/iq_seznec.cc 15711383Sbrandon.potter@amd.com encumbered/cpu/full/iq/standard/iq_standard.cc 15811383Sbrandon.potter@amd.com ''') 15911383Sbrandon.potter@amd.com 16011383Sbrandon.potter@amd.comtrace_reader_sources = Split(''' 16111383Sbrandon.potter@amd.com cpu/trace/reader/mem_trace_reader.cc 16211383Sbrandon.potter@amd.com cpu/trace/reader/ibm_reader.cc 16311383Sbrandon.potter@amd.com cpu/trace/reader/itx_reader.cc 1646019Shines@cs.fsu.edu cpu/trace/reader/m5_reader.cc 1656019Shines@cs.fsu.edu cpu/trace/opt_cpu.cc 1666019Shines@cs.fsu.edu cpu/trace/trace_cpu.cc 1676019Shines@cs.fsu.edu ''') 1687416SAli.Saidi@ARM.com 1697416SAli.Saidi@ARM.com 1707416SAli.Saidi@ARM.com 1717416SAli.Saidi@ARM.com# MySql sources 1727416SAli.Saidi@ARM.commysql_sources = Split(''' 1737416SAli.Saidi@ARM.com base/mysql.cc 1747416SAli.Saidi@ARM.com base/stats/mysql.cc 1757416SAli.Saidi@ARM.com ''') 1767416SAli.Saidi@ARM.com 1777416SAli.Saidi@ARM.com# Full-system sources 1787416SAli.Saidi@ARM.comfull_system_sources = Split(''' 1797416SAli.Saidi@ARM.com base/crc.cc 18010850SGiacomo.Gabrielli@arm.com base/inet.cc 18110850SGiacomo.Gabrielli@arm.com base/remote_gdb.cc 18210850SGiacomo.Gabrielli@arm.com 18310850SGiacomo.Gabrielli@arm.com cpu/intr_control.cc 18410850SGiacomo.Gabrielli@arm.com cpu/profile.cc 1857416SAli.Saidi@ARM.com 1867416SAli.Saidi@ARM.com dev/alpha_console.cc 1877416SAli.Saidi@ARM.com dev/baddev.cc 1887416SAli.Saidi@ARM.com dev/disk_image.cc 1897416SAli.Saidi@ARM.com dev/etherbus.cc 1907416SAli.Saidi@ARM.com dev/etherdump.cc 1917416SAli.Saidi@ARM.com dev/etherint.cc 1926395Ssaidi@eecs.umich.edu dev/etherlink.cc 1936395Ssaidi@eecs.umich.edu dev/etherpkt.cc 1946395Ssaidi@eecs.umich.edu dev/ethertap.cc 1956395Ssaidi@eecs.umich.edu dev/ide_ctrl.cc 1966395Ssaidi@eecs.umich.edu dev/ide_disk.cc 1976395Ssaidi@eecs.umich.edu dev/io_device.cc 1986395Ssaidi@eecs.umich.edu dev/isa_fake.cc 1996395Ssaidi@eecs.umich.edu dev/ns_gige.cc 20010037SARM gem5 Developers dev/pciconfigall.cc 2016395Ssaidi@eecs.umich.edu dev/pcidev.cc 2026395Ssaidi@eecs.umich.edu dev/pcifake.cc 20310037SARM gem5 Developers dev/pktfifo.cc 2046395Ssaidi@eecs.umich.edu dev/platform.cc 2056395Ssaidi@eecs.umich.edu dev/simconsole.cc 2066395Ssaidi@eecs.umich.edu dev/simple_disk.cc 2076395Ssaidi@eecs.umich.edu dev/sinic.cc 2086395Ssaidi@eecs.umich.edu dev/tsunami.cc 2096395Ssaidi@eecs.umich.edu dev/tsunami_cchip.cc 2106395Ssaidi@eecs.umich.edu dev/tsunami_io.cc 2116395Ssaidi@eecs.umich.edu dev/tsunami_fake.cc 2126395Ssaidi@eecs.umich.edu dev/tsunami_pchip.cc 2136395Ssaidi@eecs.umich.edu 2146395Ssaidi@eecs.umich.edu dev/uart.cc 2156395Ssaidi@eecs.umich.edu dev/uart8250.cc 2166395Ssaidi@eecs.umich.edu 2176395Ssaidi@eecs.umich.edu kern/kernel_stats.cc 2186395Ssaidi@eecs.umich.edu kern/system_events.cc 2196395Ssaidi@eecs.umich.edu kern/linux/events.cc 2206395Ssaidi@eecs.umich.edu kern/linux/linux_syscalls.cc 2216395Ssaidi@eecs.umich.edu kern/linux/printk.cc 2226395Ssaidi@eecs.umich.edu 2236395Ssaidi@eecs.umich.edu mem/vport.cc 2246395Ssaidi@eecs.umich.edu 2256395Ssaidi@eecs.umich.edu sim/pseudo_inst.cc 2266395Ssaidi@eecs.umich.edu ''') 2276395Ssaidi@eecs.umich.edu 2286395Ssaidi@eecs.umich.edu 2296395Ssaidi@eecs.umich.eduif env['TARGET_ISA'] == 'alpha': 2306395Ssaidi@eecs.umich.edu full_system_sources += Split(''' 2316395Ssaidi@eecs.umich.edu kern/tru64/dump_mbuf.cc 2326395Ssaidi@eecs.umich.edu kern/tru64/printf.cc 2336395Ssaidi@eecs.umich.edu kern/tru64/tru64_events.cc 2346395Ssaidi@eecs.umich.edu kern/tru64/tru64_syscalls.cc 2356640Svince@csl.cornell.edu ''') 2366640Svince@csl.cornell.edu 2376640Svince@csl.cornell.edu# turbolaser encumbered sources 2386640Svince@csl.cornell.eduturbolaser_sources = Split(''' 2396640Svince@csl.cornell.edu encumbered/dev/dma.cc 2406640Svince@csl.cornell.edu encumbered/dev/etherdev.cc 2416640Svince@csl.cornell.edu encumbered/dev/scsi.cc 2426640Svince@csl.cornell.edu encumbered/dev/scsi_ctrl.cc 2436640Svince@csl.cornell.edu encumbered/dev/scsi_disk.cc 2446640Svince@csl.cornell.edu encumbered/dev/scsi_none.cc 2456640Svince@csl.cornell.edu encumbered/dev/tlaser_clock.cc 2466640Svince@csl.cornell.edu encumbered/dev/tlaser_ipi.cc 2476640Svince@csl.cornell.edu encumbered/dev/tlaser_mbox.cc 2486640Svince@csl.cornell.edu encumbered/dev/tlaser_mc146818.cc 24911320Ssteve.reinhardt@amd.com encumbered/dev/tlaser_node.cc 2507416SAli.Saidi@ARM.com encumbered/dev/tlaser_pcia.cc 2517416SAli.Saidi@ARM.com encumbered/dev/tlaser_pcidev.cc 2527416SAli.Saidi@ARM.com encumbered/dev/tlaser_serial.cc 2537416SAli.Saidi@ARM.com encumbered/dev/turbolaser.cc 2547416SAli.Saidi@ARM.com encumbered/dev/uart8530.cc 2557416SAli.Saidi@ARM.com ''') 2567416SAli.Saidi@ARM.com 2577416SAli.Saidi@ARM.com# Syscall emulation (non-full-system) sources 2587416SAli.Saidi@ARM.comsyscall_emulation_sources = Split(''' 2597416SAli.Saidi@ARM.com mem/translating_port.cc 2607416SAli.Saidi@ARM.com mem/page_table.cc 2617416SAli.Saidi@ARM.com sim/process.cc 2627416SAli.Saidi@ARM.com sim/syscall_emul.cc 2637416SAli.Saidi@ARM.com ''') 2647416SAli.Saidi@ARM.com 2657416SAli.Saidi@ARM.com#if env['TARGET_ISA'] == 'alpha': 2667416SAli.Saidi@ARM.com# syscall_emulation_sources += Split(''' 2677416SAli.Saidi@ARM.com# kern/tru64/tru64.cc 2687416SAli.Saidi@ARM.com# ''') 2697416SAli.Saidi@ARM.com 2707416SAli.Saidi@ARM.comalpha_eio_sources = Split(''' 2717416SAli.Saidi@ARM.com encumbered/eio/exolex.cc 2727416SAli.Saidi@ARM.com encumbered/eio/libexo.cc 2737416SAli.Saidi@ARM.com encumbered/eio/eio.cc 2747416SAli.Saidi@ARM.com ''') 2757416SAli.Saidi@ARM.com 2767416SAli.Saidi@ARM.comif env['TARGET_ISA'] == 'ALPHA_ISA': 27713537Sandreas.sandberg@arm.com syscall_emulation_sources += alpha_eio_sources 27813537Sandreas.sandberg@arm.com 27913537Sandreas.sandberg@arm.commemtest_sources = Split(''' 28013537Sandreas.sandberg@arm.com cpu/memtest/memtest.cc 28113537Sandreas.sandberg@arm.com ''') 28213537Sandreas.sandberg@arm.com 28313537Sandreas.sandberg@arm.com# Include file paths are rooted in this directory. SCons will 28413537Sandreas.sandberg@arm.com# automatically expand '.' to refer to both the source directory and 28513537Sandreas.sandberg@arm.com# the corresponding build directory to pick up generated include 28613537Sandreas.sandberg@arm.com# files. 28713537Sandreas.sandberg@arm.comenv.Append(CPPPATH=Dir('.')) 28813537Sandreas.sandberg@arm.com 28910037SARM gem5 Developers# Add a flag defining what THE_ISA should be for all compilation 2907416SAli.Saidi@ARM.comenv.Append(CPPDEFINES=[('THE_ISA','%s_ISA' % env['TARGET_ISA'].upper())]) 29113536Sandreas.sandberg@arm.com 29210037SARM gem5 Developersarch_sources = SConscript('arch/SConscript', exports = 'env') 29310037SARM gem5 Developers 2946395Ssaidi@eecs.umich.educpu_sources = SConscript('cpu/SConscript', exports = 'env') 29511382Sbrandon.potter@amd.com 29611382Sbrandon.potter@amd.com# This is outside of cpu/SConscript since the source directory isn't 29711382Sbrandon.potter@amd.com# underneath 'cpu'. 29811382Sbrandon.potter@amd.comif 'FullCPU' in env['CPU_MODELS']: 29911382Sbrandon.potter@amd.com cpu_sources += full_cpu_sources 30011382Sbrandon.potter@amd.com 30111382Sbrandon.potter@amd.com# Set up complete list of sources based on configuration. 30211382Sbrandon.potter@amd.comsources = base_sources + arch_sources + cpu_sources 30311382Sbrandon.potter@amd.com 30411382Sbrandon.potter@amd.comif env['FULL_SYSTEM']: 30511382Sbrandon.potter@amd.com sources += full_system_sources 30611382Sbrandon.potter@amd.com if env['ALPHA_TLASER']: 30711382Sbrandon.potter@amd.com sources += turbolaser_sources 30811382Sbrandon.potter@amd.comelse: 30911382Sbrandon.potter@amd.com sources += syscall_emulation_sources 31011382Sbrandon.potter@amd.com 31111382Sbrandon.potter@amd.comif env['USE_MYSQL']: 31211382Sbrandon.potter@amd.com sources += mysql_sources 31311382Sbrandon.potter@amd.com 31411382Sbrandon.potter@amd.comfor opt in env.ExportOptions: 31511382Sbrandon.potter@amd.com env.ConfigFile(opt) 31611382Sbrandon.potter@amd.com 31711382Sbrandon.potter@amd.com################################################### 31811382Sbrandon.potter@amd.com# 31911382Sbrandon.potter@amd.com# Special build rules. 32011382Sbrandon.potter@amd.com# 32111382Sbrandon.potter@amd.com################################################### 32211382Sbrandon.potter@amd.com 32311382Sbrandon.potter@amd.com# base/traceflags.{cc,hh} are generated from base/traceflags.py. 32411382Sbrandon.potter@amd.com# $TARGET.base will expand to "<build-dir>/base/traceflags". 32511382Sbrandon.potter@amd.comenv.Command(Split('base/traceflags.hh base/traceflags.cc'), 32611382Sbrandon.potter@amd.com 'base/traceflags.py', 32711382Sbrandon.potter@amd.com 'python $SOURCE $TARGET.base') 32811382Sbrandon.potter@amd.com 32911382Sbrandon.potter@amd.comSConscript('python/SConscript', exports = ['env']) 33010037SARM gem5 Developers 33110037SARM gem5 Developers# This function adds the specified sources to the given build 33211381Sbrandon.potter@amd.com# environment, and returns a list of all the corresponding SCons 33310037SARM gem5 Developers# Object nodes (including an extra one for date.cc). We explicitly 33410037SARM gem5 Developers# add the Object nodes so we can set up special dependencies for 33510037SARM gem5 Developers# date.cc. 33610037SARM gem5 Developersdef make_objs(sources, env): 33710037SARM gem5 Developers objs = [env.Object(s) for s in sources] 33810037SARM gem5 Developers # make date.cc depend on all other objects so it always gets 33910037SARM gem5 Developers # recompiled whenever anything else does 34010037SARM gem5 Developers date_obj = env.Object('base/date.cc') 34110037SARM gem5 Developers env.Depends(date_obj, objs) 34210037SARM gem5 Developers objs.append(date_obj) 34310037SARM gem5 Developers return objs 34410037SARM gem5 Developers 34510037SARM gem5 Developers################################################### 34610037SARM gem5 Developers# 34711382Sbrandon.potter@amd.com# Define binaries. Each different build type (debug, opt, etc.) gets 34811382Sbrandon.potter@amd.com# a slightly different build environment. 34911382Sbrandon.potter@amd.com# 35011382Sbrandon.potter@amd.com################################################### 35111382Sbrandon.potter@amd.com 35211382Sbrandon.potter@amd.com# List of constructed environments to pass back to SConstruct 35311382Sbrandon.potter@amd.comenvList = [] 35411382Sbrandon.potter@amd.com 35511382Sbrandon.potter@amd.com# Function to create a new build environment as clone of current 35611382Sbrandon.potter@amd.com# environment 'env' with modified object suffix and optional stripped 35711382Sbrandon.potter@amd.com# binary. Additional keyword arguments are appended to corresponding 35811382Sbrandon.potter@amd.com# build environment vars. 35911382Sbrandon.potter@amd.comdef makeEnv(label, objsfx, strip = False, **kwargs): 36011382Sbrandon.potter@amd.com newEnv = env.Copy(OBJSUFFIX=objsfx) 36111382Sbrandon.potter@amd.com newEnv.Label = label 36211382Sbrandon.potter@amd.com newEnv.Append(**kwargs) 36311382Sbrandon.potter@amd.com exe = 'm5.' + label # final executable 36411382Sbrandon.potter@amd.com bin = exe + '.bin' # executable w/o appended Python zip archive 36511382Sbrandon.potter@amd.com newEnv.Program(bin, make_objs(sources, newEnv)) 36610037SARM gem5 Developers if strip: 36710037SARM gem5 Developers stripped_bin = bin + '.stripped' 36810037SARM gem5 Developers newEnv.Command(stripped_bin, bin, 'strip $SOURCE -o $TARGET') 36911383Sbrandon.potter@amd.com bin = stripped_bin 37011383Sbrandon.potter@amd.com targets = newEnv.Concat(exe, [bin, 'python/m5py.zip']) 37111383Sbrandon.potter@amd.com newEnv.M5Binary = targets[0] 37211383Sbrandon.potter@amd.com envList.append(newEnv) 37311383Sbrandon.potter@amd.com 37411383Sbrandon.potter@amd.com# Debug binary 37511383Sbrandon.potter@amd.commakeEnv('debug', '.do', 37611383Sbrandon.potter@amd.com CCFLAGS = Split('-g3 -gdwarf-2 -O0'), 37711383Sbrandon.potter@amd.com CPPDEFINES = 'DEBUG') 37811383Sbrandon.potter@amd.com 37911383Sbrandon.potter@amd.com# Optimized binary 38011383Sbrandon.potter@amd.commakeEnv('opt', '.o', 38111383Sbrandon.potter@amd.com CCFLAGS = Split('-g -O3')) 38211383Sbrandon.potter@amd.com 38311383Sbrandon.potter@amd.com# "Fast" binary 38411383Sbrandon.potter@amd.commakeEnv('fast', '.fo', strip = True, 38511383Sbrandon.potter@amd.com CCFLAGS = Split('-O3'), 38611383Sbrandon.potter@amd.com CPPDEFINES = 'NDEBUG') 38711383Sbrandon.potter@amd.com 38810037SARM gem5 Developers# Profiled binary 38910037SARM gem5 DevelopersmakeEnv('prof', '.po', 39010037SARM gem5 Developers CCFLAGS = Split('-O3 -g -pg'), 39110037SARM gem5 Developers LINKFLAGS = '-pg') 39210037SARM gem5 Developers 39310037SARM gem5 DevelopersReturn('envList') 39410037SARM gem5 Developers