mmu.hh revision 10915
1/* 2 * Copyright (c) 2014-2015 ARM Limited 3 * All rights reserved 4 * 5 * Licensed under the Apache License, Version 2.0 (the "License"); 6 * you may not use this file except in compliance with the License. 7 * You may obtain a copy of the License at 8 * 9 * http://www.apache.org/licenses/LICENSE-2.0 10 * 11 * Unless required by applicable law or agreed to in writing, software 12 * distributed under the License is distributed on an "AS IS" BASIS, 13 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 14 * See the License for the specific language governing permissions and 15 * limitations under the License. 16 * 17 * Authors: Andreas Sandberg 18 */ 19 20#ifndef _LIBNOMALIMODEL_MMU_HH 21#define _LIBNOMALIMODEL_MMU_HH 22 23#include <vector> 24 25#include "gpublock.hh" 26#include "types.hh" 27 28namespace NoMali { 29 30class GPU; 31 32/** 33 * MMU dummy implementation. 34 * 35 * This is a dummy implementation of a Midgard GPU MMU block. The only 36 * features supported by the block is interrupt delivery and registers 37 * related to interrupt delivery. Writes to unimplemented registers 38 * (most registers) are discarded and their values are read as zero. 39 */ 40class MMU 41 : public GPUBlockInt 42{ 43 public: 44 MMU(GPU &_gpu); 45 virtual ~MMU(); 46 47 void writeReg(RegAddr idx, uint32_t value) override; 48 49 protected: 50 void onInterrupt(int set) override; 51 52 RegVector regs; 53}; 54 55} 56 57#endif // _LIBNOMALIMODEL_MMU_HH 58