mmu.cc revision 10915:71ace17ccb3d 
1/*
2 * Copyright (c) 2014-2015 ARM Limited
3 * All rights reserved
4 *
5 * Licensed under the Apache License, Version 2.0 (the "License");
6 * you may not use this file except in compliance with the License.
7 * You may obtain a copy of the License at
8 *
9 *     http://www.apache.org/licenses/LICENSE-2.0
10 *
11 * Unless required by applicable law or agreed to in writing, software
12 * distributed under the License is distributed on an "AS IS" BASIS,
13 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14 * See the License for the specific language governing permissions and
15 * limitations under the License.
16 *
17 * Authors: Andreas Sandberg
18 */
19
20#include "mmu.hh"
21
22#include "gpu.hh"
23#include "regutils.hh"
24
25namespace NoMali {
26
27MMU::MMU(GPU &_gpu)
28    : GPUBlockInt(_gpu,
29                  RegAddr(MMU_IRQ_RAWSTAT),
30                  RegAddr(MMU_IRQ_CLEAR),
31                  RegAddr(MMU_IRQ_MASK),
32                  RegAddr(MMU_IRQ_STATUS)),
33      regs(BLOCK_NUM_REGS)
34{
35}
36
37MMU::~MMU()
38{
39}
40
41void
42MMU::writeReg(RegAddr addr, uint32_t value)
43{
44    switch (addr.value) {
45      case MMU_IRQ_RAWSTAT:
46      case MMU_IRQ_CLEAR:
47      case MMU_IRQ_MASK:
48      case MMU_IRQ_STATUS:
49        GPUBlockInt::writeReg(addr, value);
50        break;
51
52      default:
53        // Ignore writes by default
54        break;
55    };
56}
57
58void
59MMU::onInterrupt(int set)
60{
61    gpu.intMMU(set);
62}
63
64}
65