110915Sandreas.sandberg@arm.com/* 210915Sandreas.sandberg@arm.com * Copyright (c) 2014-2015 ARM Limited 310915Sandreas.sandberg@arm.com * All rights reserved 410915Sandreas.sandberg@arm.com * 510915Sandreas.sandberg@arm.com * Licensed under the Apache License, Version 2.0 (the "License"); 610915Sandreas.sandberg@arm.com * you may not use this file except in compliance with the License. 710915Sandreas.sandberg@arm.com * You may obtain a copy of the License at 810915Sandreas.sandberg@arm.com * 910915Sandreas.sandberg@arm.com * http://www.apache.org/licenses/LICENSE-2.0 1010915Sandreas.sandberg@arm.com * 1110915Sandreas.sandberg@arm.com * Unless required by applicable law or agreed to in writing, software 1210915Sandreas.sandberg@arm.com * distributed under the License is distributed on an "AS IS" BASIS, 1310915Sandreas.sandberg@arm.com * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 1410915Sandreas.sandberg@arm.com * See the License for the specific language governing permissions and 1510915Sandreas.sandberg@arm.com * limitations under the License. 1610915Sandreas.sandberg@arm.com * 1710915Sandreas.sandberg@arm.com * Authors: Andreas Sandberg 1810915Sandreas.sandberg@arm.com */ 1910915Sandreas.sandberg@arm.com 2010915Sandreas.sandberg@arm.com#include "mali_t7xx.hh" 2110915Sandreas.sandberg@arm.com 2210915Sandreas.sandberg@arm.com#include "regutils.hh" 2310915Sandreas.sandberg@arm.com 2410915Sandreas.sandberg@arm.comnamespace NoMali { 2510915Sandreas.sandberg@arm.com 2610915Sandreas.sandberg@arm.comMaliT7xxBase::MaliT7xxBase(unsigned gpuType, 2710915Sandreas.sandberg@arm.com unsigned major, unsigned minor, unsigned status) 2810915Sandreas.sandberg@arm.com : MaliMidgard(gpuType, major, minor, status) 2910915Sandreas.sandberg@arm.com{ 3010915Sandreas.sandberg@arm.com} 3110915Sandreas.sandberg@arm.com 3210915Sandreas.sandberg@arm.comvoid 3310915Sandreas.sandberg@arm.comMaliT7xxBase::setupControlIdRegisters(RegVector ®s) 3410915Sandreas.sandberg@arm.com{ 3510915Sandreas.sandberg@arm.com MaliMidgard::setupControlIdRegisters(regs); 3610915Sandreas.sandberg@arm.com 3710915Sandreas.sandberg@arm.com regs[RegAddr(L2_FEATURES)] = 3810915Sandreas.sandberg@arm.com (0x07 << 24) | // lg2 ext bus width 3910915Sandreas.sandberg@arm.com (0x13 << 16) | // lg2 cache size 4010915Sandreas.sandberg@arm.com (0x02 << 8) | // lg2 associativity 4110915Sandreas.sandberg@arm.com (0x06); // lg2 line size 4210915Sandreas.sandberg@arm.com} 4310915Sandreas.sandberg@arm.com 4410915Sandreas.sandberg@arm.com 4510915Sandreas.sandberg@arm.comMaliT76x::MaliT76x(unsigned major, unsigned minor, unsigned status) 4610915Sandreas.sandberg@arm.com : MaliT7xxBase(GPU_ID_PI_T76X, major, minor, status) 4710915Sandreas.sandberg@arm.com{ 4810915Sandreas.sandberg@arm.com} 4910915Sandreas.sandberg@arm.com 5010915Sandreas.sandberg@arm.com}; 51