110915Sandreas.sandberg@arm.com/*
210915Sandreas.sandberg@arm.com * Copyright (c) 2014-2015 ARM Limited
310915Sandreas.sandberg@arm.com * All rights reserved
410915Sandreas.sandberg@arm.com *
510915Sandreas.sandberg@arm.com * Licensed under the Apache License, Version 2.0 (the "License");
610915Sandreas.sandberg@arm.com * you may not use this file except in compliance with the License.
710915Sandreas.sandberg@arm.com * You may obtain a copy of the License at
810915Sandreas.sandberg@arm.com *
910915Sandreas.sandberg@arm.com *     http://www.apache.org/licenses/LICENSE-2.0
1010915Sandreas.sandberg@arm.com *
1110915Sandreas.sandberg@arm.com * Unless required by applicable law or agreed to in writing, software
1210915Sandreas.sandberg@arm.com * distributed under the License is distributed on an "AS IS" BASIS,
1310915Sandreas.sandberg@arm.com * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
1410915Sandreas.sandberg@arm.com * See the License for the specific language governing permissions and
1510915Sandreas.sandberg@arm.com * limitations under the License.
1610915Sandreas.sandberg@arm.com */
1710915Sandreas.sandberg@arm.com
1810915Sandreas.sandberg@arm.com#include "gpu.hh"
1910915Sandreas.sandberg@arm.com
2010915Sandreas.sandberg@arm.com#include "gpucontrol.hh"
2110915Sandreas.sandberg@arm.com#include "jobcontrol.hh"
2210915Sandreas.sandberg@arm.com#include "mmu.hh"
2310915Sandreas.sandberg@arm.com#include "regutils.hh"
2410915Sandreas.sandberg@arm.com
2510915Sandreas.sandberg@arm.comnamespace NoMali {
2610915Sandreas.sandberg@arm.com
2710915Sandreas.sandberg@arm.comGPU::GPU(GPUControl &gc, JobControl &jc, MMU &_mmu)
2810915Sandreas.sandberg@arm.com    : gpuControl(gc), jobControl(jc), mmu(_mmu),
2910915Sandreas.sandberg@arm.com      blocks({&gpuControl, // REG_BLOCK_GPU
3010915Sandreas.sandberg@arm.com              &jobControl, // REG_BLOCK_JOB
3110915Sandreas.sandberg@arm.com              &mmu})       // REG_BLOCK_MMU
3210915Sandreas.sandberg@arm.com{
3310915Sandreas.sandberg@arm.com}
3410915Sandreas.sandberg@arm.com
3510915Sandreas.sandberg@arm.comGPU::~GPU()
3610915Sandreas.sandberg@arm.com{
3710915Sandreas.sandberg@arm.com}
3810915Sandreas.sandberg@arm.com
3910915Sandreas.sandberg@arm.comvoid
4010915Sandreas.sandberg@arm.comGPU::reset()
4110915Sandreas.sandberg@arm.com{
4210915Sandreas.sandberg@arm.com    for (auto *block : blocks)
4310915Sandreas.sandberg@arm.com        block->reset();
4410915Sandreas.sandberg@arm.com}
4510915Sandreas.sandberg@arm.com
4610915Sandreas.sandberg@arm.comuint32_t
4710915Sandreas.sandberg@arm.comGPU::readReg(RegAddr addr)
4810915Sandreas.sandberg@arm.com{
4910915Sandreas.sandberg@arm.com    GPUBlock * const block(getGPUBlock(addr));
5010915Sandreas.sandberg@arm.com
5110915Sandreas.sandberg@arm.com    return block ? block->readReg(getBlockReg(addr)) : 0;
5210915Sandreas.sandberg@arm.com}
5310915Sandreas.sandberg@arm.com
5410915Sandreas.sandberg@arm.comvoid
5510915Sandreas.sandberg@arm.comGPU::writeReg(RegAddr addr, uint32_t value)
5610915Sandreas.sandberg@arm.com{
5710915Sandreas.sandberg@arm.com    GPUBlock * const block(getGPUBlock(addr));
5810915Sandreas.sandberg@arm.com
5910915Sandreas.sandberg@arm.com    if (block)
6010915Sandreas.sandberg@arm.com        block->writeReg(getBlockReg(addr), value);
6110915Sandreas.sandberg@arm.com}
6210915Sandreas.sandberg@arm.com
6310915Sandreas.sandberg@arm.comuint32_t
6410915Sandreas.sandberg@arm.comGPU::readRegRaw(RegAddr addr)
6510915Sandreas.sandberg@arm.com{
6610915Sandreas.sandberg@arm.com    GPUBlock * const block(getGPUBlock(addr));
6710915Sandreas.sandberg@arm.com
6810915Sandreas.sandberg@arm.com    return block ? block->readRegRaw(getBlockReg(addr)) : 0;
6910915Sandreas.sandberg@arm.com}
7010915Sandreas.sandberg@arm.com
7110915Sandreas.sandberg@arm.comvoid
7210915Sandreas.sandberg@arm.comGPU::writeRegRaw(RegAddr addr, uint32_t value)
7310915Sandreas.sandberg@arm.com{
7410915Sandreas.sandberg@arm.com    GPUBlock * const block(getGPUBlock(addr));
7510915Sandreas.sandberg@arm.com
7610915Sandreas.sandberg@arm.com    if (block)
7710915Sandreas.sandberg@arm.com        block->writeRegRaw(getBlockReg(addr), value);
7810915Sandreas.sandberg@arm.com}
7910915Sandreas.sandberg@arm.com
8010915Sandreas.sandberg@arm.com
8110915Sandreas.sandberg@arm.combool
8210915Sandreas.sandberg@arm.comGPU::intGPUAsserted() const
8310915Sandreas.sandberg@arm.com{
8410915Sandreas.sandberg@arm.com    return gpuControl.intAsserted();
8510915Sandreas.sandberg@arm.com}
8610915Sandreas.sandberg@arm.com
8710915Sandreas.sandberg@arm.combool
8810915Sandreas.sandberg@arm.comGPU::intJobAsserted() const
8910915Sandreas.sandberg@arm.com{
9010915Sandreas.sandberg@arm.com    return jobControl.intAsserted();
9110915Sandreas.sandberg@arm.com}
9210915Sandreas.sandberg@arm.com
9310915Sandreas.sandberg@arm.combool
9410915Sandreas.sandberg@arm.comGPU::intMMUAsserted() const
9510915Sandreas.sandberg@arm.com{
9610915Sandreas.sandberg@arm.com    return mmu.intAsserted();
9710915Sandreas.sandberg@arm.com}
9810915Sandreas.sandberg@arm.com
9910915Sandreas.sandberg@arm.com
10010915Sandreas.sandberg@arm.comGPUBlock *
10110915Sandreas.sandberg@arm.comGPU::getGPUBlock(RegAddr addr)
10210915Sandreas.sandberg@arm.com{
10310915Sandreas.sandberg@arm.com    const RegBlock block(getRegBlock(addr));
10410915Sandreas.sandberg@arm.com    const uint16_t block_no(static_cast<uint16_t>(block));
10510915Sandreas.sandberg@arm.com
10610915Sandreas.sandberg@arm.com    if (block_no < blocks.size())
10710915Sandreas.sandberg@arm.com        return blocks[block_no];
10810915Sandreas.sandberg@arm.com    else
10910915Sandreas.sandberg@arm.com        return nullptr;
11010915Sandreas.sandberg@arm.com}
11110915Sandreas.sandberg@arm.com
11210915Sandreas.sandberg@arm.com}
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