mat.h revision 10152:52c552138ba1 
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31
32
33
34#ifndef __MAT_H__
35#define __MAT_H__
36
37#include "component.h"
38#include "decoder.h"
39#include "subarray.h"
40#include "wire.h"
41
42class Mat : public Component
43{
44  public:
45    Mat(const DynamicParameter & dyn_p);
46    ~Mat();
47    double compute_delays(double inrisetime);  // return outrisetime
48    void compute_power_energy();
49
50    const DynamicParameter & dp;
51
52    // TODO: clean up pointers and powerDefs below
53    Decoder * row_dec;
54    Decoder * bit_mux_dec;
55    Decoder * sa_mux_lev_1_dec;
56    Decoder * sa_mux_lev_2_dec;
57    PredecBlk * dummy_way_sel_predec_blk1;
58    PredecBlk * dummy_way_sel_predec_blk2;
59    PredecBlkDrv * way_sel_drv1;
60    PredecBlkDrv * dummy_way_sel_predec_blk_drv2;
61
62    Predec * r_predec;
63    Predec * b_mux_predec;
64    Predec * sa_mux_lev_1_predec;
65    Predec * sa_mux_lev_2_predec;
66
67    Wire   * subarray_out_wire;
68    Driver * bl_precharge_eq_drv;
69    Driver * cam_bl_precharge_eq_drv;//bitline pre-charge circuit is separated for CAM and RAM arrays.
70    Driver * ml_precharge_drv;//matchline prechange driver
71    Driver * sl_precharge_eq_drv;//searchline prechage driver
72    Driver * sl_data_drv;//search line data driver
73    Driver * ml_to_ram_wl_drv;//search line data driver
74
75
76    powerDef power_row_decoders;
77    powerDef power_bit_mux_decoders;
78    powerDef power_sa_mux_lev_1_decoders;
79    powerDef power_sa_mux_lev_2_decoders;
80    powerDef power_fa_cam;  // TODO: leakage power is not computed yet
81    powerDef power_bl_precharge_eq_drv;
82    powerDef power_subarray_out_drv;
83    powerDef power_cam_all_active;
84    powerDef power_searchline_precharge;
85    powerDef power_matchline_precharge;
86    powerDef power_ml_to_ram_wl_drv;
87
88    double   delay_fa_tag, delay_cam;
89    double   delay_before_decoder;
90    double   delay_bitline;
91    double   delay_wl_reset;
92    double   delay_bl_restore;
93
94    double   delay_searchline;
95    double   delay_matchchline;
96    double   delay_cam_sl_restore;
97    double   delay_cam_ml_reset;
98    double   delay_fa_ram_wl;
99
100    double   delay_hit_miss_reset;
101    double   delay_hit_miss;
102
103    Subarray subarray;
104    powerDef power_bitline, power_searchline, power_matchline;
105    double   per_bitline_read_energy;
106    int      deg_bl_muxing;
107    int      num_act_mats_hor_dir;
108    double   delay_writeback;
109    Area     cell,cam_cell;
110    bool     is_dram,is_fa, pure_cam, camFlag;
111    int      num_mats;
112    powerDef power_sa;
113    double   delay_sa;
114    double   leak_power_sense_amps_closed_page_state;
115    double   leak_power_sense_amps_open_page_state;
116    double   delay_subarray_out_drv;
117    double   delay_subarray_out_drv_htree;
118    double   delay_comparator;
119    powerDef power_comparator;
120    int      num_do_b_mat;
121    int      num_so_b_mat;
122    int      num_sa_subarray;
123    int      num_sa_subarray_search;
124    double   C_bl;
125
126    uint32_t num_subarrays_per_mat;  // the number of subarrays in a mat
127    uint32_t num_subarrays_per_row;  // the number of subarrays in a row of a mat
128
129
130  private:
131    double compute_bit_mux_sa_precharge_sa_mux_wr_drv_wr_mux_h();
132    double width_write_driver_or_write_mux();
133    double compute_comparators_height(int tagbits, int number_ways_in_mat, double subarray_mem_cell_area_w);
134    double compute_cam_delay(double inrisetime);
135    double compute_bitline_delay(double inrisetime);
136    double compute_sa_delay(double inrisetime);
137    double compute_subarray_out_drv(double inrisetime);
138    double compute_comparator_delay(double inrisetime);
139
140    int RWP;
141    int ERP;
142    int EWP;
143    int SCHP;
144};
145
146
147
148#endif
149