110448Snilay@cs.wisc.edu/* Copyright (c) 2012 Massachusetts Institute of Technology 210448Snilay@cs.wisc.edu * 310448Snilay@cs.wisc.edu * Permission is hereby granted, free of charge, to any person obtaining a copy 410448Snilay@cs.wisc.edu * of this software and associated documentation files (the "Software"), to deal 510448Snilay@cs.wisc.edu * in the Software without restriction, including without limitation the rights 610448Snilay@cs.wisc.edu * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 710448Snilay@cs.wisc.edu * copies of the Software, and to permit persons to whom the Software is 810448Snilay@cs.wisc.edu * furnished to do so, subject to the following conditions: 910448Snilay@cs.wisc.edu * 1010448Snilay@cs.wisc.edu * The above copyright notice and this permission notice shall be included in 1110448Snilay@cs.wisc.edu * all copies or substantial portions of the Software. 1210448Snilay@cs.wisc.edu * 1310448Snilay@cs.wisc.edu * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 1410448Snilay@cs.wisc.edu * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 1510448Snilay@cs.wisc.edu * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 1610448Snilay@cs.wisc.edu * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 1710448Snilay@cs.wisc.edu * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 1810448Snilay@cs.wisc.edu * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 1910448Snilay@cs.wisc.edu * THE SOFTWARE. 2010448Snilay@cs.wisc.edu */ 2110448Snilay@cs.wisc.edu 2210447Snilay@cs.wisc.edu#include "model/electrical/TestModel.h" 2310447Snilay@cs.wisc.edu 2410447Snilay@cs.wisc.edu#include <cmath> 2510447Snilay@cs.wisc.edu 2610447Snilay@cs.wisc.edu#include "model/std_cells/StdCell.h" 2710447Snilay@cs.wisc.edu#include "model/std_cells/StdCellLib.h" 2810447Snilay@cs.wisc.edu#include "model/electrical/RippleAdder.h" 2910447Snilay@cs.wisc.edu#include "model/electrical/Multiplexer.h" 3010447Snilay@cs.wisc.edu#include "model/timing_graph/ElectricalNet.h" 3110447Snilay@cs.wisc.edu#include "model/timing_graph/ElectricalDriver.h" 3210447Snilay@cs.wisc.edu#include "model/timing_graph/ElectricalLoad.h" 3310447Snilay@cs.wisc.edu#include "model/timing_graph/ElectricalTimingTree.h" 3410447Snilay@cs.wisc.edu 3510447Snilay@cs.wisc.edunamespace DSENT 3610447Snilay@cs.wisc.edu{ 3710447Snilay@cs.wisc.edu TestModel::TestModel(const String& instance_name_, const TechModel* tech_model_) 3810447Snilay@cs.wisc.edu : ElectricalModel(instance_name_, tech_model_) 3910447Snilay@cs.wisc.edu { 4010447Snilay@cs.wisc.edu initProperties(); 4110447Snilay@cs.wisc.edu } 4210447Snilay@cs.wisc.edu 4310447Snilay@cs.wisc.edu TestModel::~TestModel() 4410447Snilay@cs.wisc.edu {} 4510447Snilay@cs.wisc.edu 4610447Snilay@cs.wisc.edu void TestModel::initProperties() 4710447Snilay@cs.wisc.edu { 4810447Snilay@cs.wisc.edu return; 4910447Snilay@cs.wisc.edu } 5010447Snilay@cs.wisc.edu 5110447Snilay@cs.wisc.edu TestModel* TestModel::clone() const 5210447Snilay@cs.wisc.edu { 5310447Snilay@cs.wisc.edu return NULL; 5410447Snilay@cs.wisc.edu } 5510447Snilay@cs.wisc.edu 5610447Snilay@cs.wisc.edu void TestModel::constructModel() 5710447Snilay@cs.wisc.edu { 5810447Snilay@cs.wisc.edu unsigned int num_bits = 64; 5910447Snilay@cs.wisc.edu unsigned int mux_bits = 1; 6010447Snilay@cs.wisc.edu 6110447Snilay@cs.wisc.edu // Create the instance 6210447Snilay@cs.wisc.edu createNet("CK"); 6310447Snilay@cs.wisc.edu createNet("CI"); 6410447Snilay@cs.wisc.edu getNet("CI")->setDistributedCap(100e-15); 6510447Snilay@cs.wisc.edu getNet("CI")->setDistributedRes(10); 6610447Snilay@cs.wisc.edu createNet("CO"); 6710447Snilay@cs.wisc.edu createNet("A", makeNetIndex(0, num_bits - 1)); 6810447Snilay@cs.wisc.edu createNet("B", makeNetIndex(0, num_bits - 1)); 6910447Snilay@cs.wisc.edu createNet("S", makeNetIndex(0, num_bits - 1)); 7010447Snilay@cs.wisc.edu 7110447Snilay@cs.wisc.edu StdCell* ci_reg = getTechModel()->getStdCellLib()->createStdCell("DFFQ", "DFFQ-CI"); 7210447Snilay@cs.wisc.edu ci_reg->setProperty("P(D)", 0.5); 7310447Snilay@cs.wisc.edu ci_reg->setProperty("P(CK)", 0.5); 7410447Snilay@cs.wisc.edu ci_reg->construct(); 7510447Snilay@cs.wisc.edu portConnect(ci_reg, "Q", "CI"); 7610447Snilay@cs.wisc.edu portConnect(ci_reg, "CK", "CK"); 7710447Snilay@cs.wisc.edu //ci_reg->connect("Q", getNet("CI")); 7810447Snilay@cs.wisc.edu //ci_reg->connect("CK", getNet("CK")); 7910447Snilay@cs.wisc.edu addSubInstances(ci_reg, 1.0); 8010447Snilay@cs.wisc.edu 8110447Snilay@cs.wisc.edu StdCell* co_reg = getTechModel()->getStdCellLib()->createStdCell("DFFQ", "DFFQ-CO"); 8210447Snilay@cs.wisc.edu co_reg->setProperty("P(D)", 0.5); 8310447Snilay@cs.wisc.edu co_reg->setProperty("P(CK)", 0.5); 8410447Snilay@cs.wisc.edu co_reg->construct(); 8510447Snilay@cs.wisc.edu portConnect(co_reg, "D", "CO"); 8610447Snilay@cs.wisc.edu portConnect(co_reg, "CK", "CK"); 8710447Snilay@cs.wisc.edu //co_reg->connect("D", getNet("CO")); 8810447Snilay@cs.wisc.edu //co_reg->connect("CK", getNet("CK")); 8910447Snilay@cs.wisc.edu addSubInstances(co_reg, 1.0); 9010447Snilay@cs.wisc.edu 9110447Snilay@cs.wisc.edu for (unsigned int i = 0; i < num_bits; i++) 9210447Snilay@cs.wisc.edu { 9310447Snilay@cs.wisc.edu StdCell* a_reg = getTechModel()->getStdCellLib()->createStdCell("DFFQ", "DFFQ-A[" + (String) i + "]"); 9410447Snilay@cs.wisc.edu a_reg->setProperty("P(D)", 0.5); 9510447Snilay@cs.wisc.edu a_reg->setProperty("P(CK)", 0.5); 9610447Snilay@cs.wisc.edu a_reg->construct(); 9710447Snilay@cs.wisc.edu portConnect(a_reg, "Q", "A", makeNetIndex(i)); 9810447Snilay@cs.wisc.edu portConnect(a_reg, "CK", "CK"); 9910447Snilay@cs.wisc.edu //a_reg->connect("Q", getNet("A[" + (String) i + "]")); 10010447Snilay@cs.wisc.edu //a_reg->connect("CK", getNet("CK")); 10110447Snilay@cs.wisc.edu addSubInstances(a_reg, 1.0); 10210447Snilay@cs.wisc.edu 10310447Snilay@cs.wisc.edu StdCell* b_reg = getTechModel()->getStdCellLib()->createStdCell("DFFQ", "DFFQ-B[" + (String) i + "]"); 10410447Snilay@cs.wisc.edu b_reg->setProperty("P(D)", 0.5); 10510447Snilay@cs.wisc.edu b_reg->setProperty("P(CK)", 0.5); 10610447Snilay@cs.wisc.edu b_reg->construct(); 10710447Snilay@cs.wisc.edu portConnect(b_reg, "Q", "B", makeNetIndex(i)); 10810447Snilay@cs.wisc.edu portConnect(b_reg, "CK", "CK"); 10910447Snilay@cs.wisc.edu //b_reg->connect("Q", getNet("B[" + (String) i + "]")); 11010447Snilay@cs.wisc.edu //b_reg->connect("CK", getNet("CK")); 11110447Snilay@cs.wisc.edu addSubInstances(b_reg, 1.0); 11210447Snilay@cs.wisc.edu 11310447Snilay@cs.wisc.edu StdCell* s_reg = getTechModel()->getStdCellLib()->createStdCell("DFFQ", "DFFQ-S[" + (String) i + "]"); 11410447Snilay@cs.wisc.edu s_reg->setProperty("P(D)", 0.5); 11510447Snilay@cs.wisc.edu s_reg->setProperty("P(CK)", 0.5); 11610447Snilay@cs.wisc.edu s_reg->construct(); 11710447Snilay@cs.wisc.edu portConnect(s_reg, "D", "S", makeNetIndex(i)); 11810447Snilay@cs.wisc.edu portConnect(s_reg, "CK", "CK"); 11910447Snilay@cs.wisc.edu //s_reg->connect("D", getNet("A[" + (String) i + "]")); 12010447Snilay@cs.wisc.edu //s_reg->connect("CK", getNet("CK")); 12110447Snilay@cs.wisc.edu addSubInstances(s_reg, 1.0); 12210447Snilay@cs.wisc.edu } 12310447Snilay@cs.wisc.edu 12410447Snilay@cs.wisc.edu 12510447Snilay@cs.wisc.edu //Create some adders! 12610447Snilay@cs.wisc.edu 12710447Snilay@cs.wisc.edu ElectricalModel* ripple_adder = new RippleAdder("Adder_1", getTechModel()); 12810447Snilay@cs.wisc.edu ripple_adder->setParameter("NumberBits", num_bits); 12910447Snilay@cs.wisc.edu ripple_adder->setProperty("P(A)", 0.5); 13010447Snilay@cs.wisc.edu ripple_adder->setProperty("P(B)", 0.5); 13110447Snilay@cs.wisc.edu ripple_adder->setProperty("P(CI)", 0.5); 13210447Snilay@cs.wisc.edu 13310447Snilay@cs.wisc.edu ripple_adder->construct(); 13410447Snilay@cs.wisc.edu addSubInstances(ripple_adder, 1.0); 13510447Snilay@cs.wisc.edu portConnect(ripple_adder, "CI", "CI"); 13610447Snilay@cs.wisc.edu portConnect(ripple_adder, "CO", "CO"); 13710447Snilay@cs.wisc.edu portConnect(ripple_adder, "A", "A"); 13810447Snilay@cs.wisc.edu portConnect(ripple_adder, "B", "B"); 13910447Snilay@cs.wisc.edu portConnect(ripple_adder, "S", "S"); 14010447Snilay@cs.wisc.edu 14110447Snilay@cs.wisc.edu ElectricalModel* multiplexer = new Multiplexer("Mux_1", getTechModel()); 14210447Snilay@cs.wisc.edu multiplexer->setParameter("NumberInputs", 2); 14310447Snilay@cs.wisc.edu multiplexer->setParameter("NumberBits", mux_bits); 14410447Snilay@cs.wisc.edu multiplexer->setParameter("BitDuplicate", "FALSE"); 14510447Snilay@cs.wisc.edu //multiplexer->setProperty("P(In)", "[0.5, 0.5, 0.5, 0.5, 0.5, 0.5, 0.5, 0.5]"); 14610447Snilay@cs.wisc.edu //multiplexer->setProperty("P(Sel)", "[0.5, 0.5, 0.5]"); 14710447Snilay@cs.wisc.edu //multiplexer->setProperty("Act(In)", "[1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0]"); 14810447Snilay@cs.wisc.edu //multiplexer->setProperty("Act(Sel)", "[2.0, 4.0, 8.0]"); 14910447Snilay@cs.wisc.edu multiplexer->setProperty("P(In)", "[0.5, 0.5]"); 15010447Snilay@cs.wisc.edu multiplexer->setProperty("P(Sel)", "[0.5]"); 15110447Snilay@cs.wisc.edu multiplexer->setProperty("Act(In)", "[1.0, 1.0]"); 15210447Snilay@cs.wisc.edu multiplexer->setProperty("Act(Sel)", "[1.0]"); 15310447Snilay@cs.wisc.edu multiplexer->construct(); 15410447Snilay@cs.wisc.edu 15510447Snilay@cs.wisc.edu createNet("In0", makeNetIndex(0, mux_bits-1)); 15610447Snilay@cs.wisc.edu createNet("In1", makeNetIndex(0, mux_bits-1)); 15710447Snilay@cs.wisc.edu createNet("In2", makeNetIndex(0, mux_bits-1)); 15810447Snilay@cs.wisc.edu createNet("In3", makeNetIndex(0, mux_bits-1)); 15910447Snilay@cs.wisc.edu createNet("In4", makeNetIndex(0, mux_bits-1)); 16010447Snilay@cs.wisc.edu createNet("Out", makeNetIndex(0, mux_bits-1)); 16110447Snilay@cs.wisc.edu 16210447Snilay@cs.wisc.edu portConnect(multiplexer, "In0", "In0"); 16310447Snilay@cs.wisc.edu portConnect(multiplexer, "In1", "In1"); 16410447Snilay@cs.wisc.edu //portConnect(multiplexer, "In2", "In2"); 16510447Snilay@cs.wisc.edu //portConnect(multiplexer, "In3", "In3"); 16610447Snilay@cs.wisc.edu //portConnect(multiplexer, "In4", "In4"); 16710447Snilay@cs.wisc.edu portConnect(multiplexer, "Out", "Out"); 16810447Snilay@cs.wisc.edu 16910447Snilay@cs.wisc.edu for (unsigned int i = 0; i < mux_bits; ++i) 17010447Snilay@cs.wisc.edu { 17110447Snilay@cs.wisc.edu String n = (String) i; 17210447Snilay@cs.wisc.edu 17310447Snilay@cs.wisc.edu createLoad("OutLoad[" + n + "]"); 17410447Snilay@cs.wisc.edu getLoad("OutLoad[" + n + "]")->setLoadCap(100e-15); 17510447Snilay@cs.wisc.edu 17610447Snilay@cs.wisc.edu getNet("Out", makeNetIndex(i))->addDownstreamNode(getLoad("OutLoad[" + n + "]")); 17710447Snilay@cs.wisc.edu } 17810447Snilay@cs.wisc.edu createNet("Sel", makeNetIndex(0, 2)); 17910447Snilay@cs.wisc.edu assign("Sel", makeNetIndex(0), "CK"); 18010447Snilay@cs.wisc.edu assign("Sel", makeNetIndex(1), "CK"); 18110447Snilay@cs.wisc.edu assign("Sel", makeNetIndex(2), "CK"); 18210447Snilay@cs.wisc.edu 18310447Snilay@cs.wisc.edu //portConnect(multiplexer, "Sel", "Sel"); 18410447Snilay@cs.wisc.edu 18510447Snilay@cs.wisc.edu addSubInstances(multiplexer, 1.0); 18610447Snilay@cs.wisc.edu 18710447Snilay@cs.wisc.edu //ElectricalTimingAbstract* abstract = new ElectricalTimingAbstract("HAHAHA", getTechModel(), ripple_adder); 18810447Snilay@cs.wisc.edu //abstract->buildAbstract(); 18910447Snilay@cs.wisc.edu 19010447Snilay@cs.wisc.edu return; 19110447Snilay@cs.wisc.edu } 19210447Snilay@cs.wisc.edu 19310447Snilay@cs.wisc.edu void TestModel::updateModel() 19410447Snilay@cs.wisc.edu { 19510447Snilay@cs.wisc.edu Model::updateModel(); 19610447Snilay@cs.wisc.edu 19710447Snilay@cs.wisc.edu //ElectricalTimingTree* t = new ElectricalTimingTree("Add", this); 19810447Snilay@cs.wisc.edu //t->performTimingOpt(getNet("CK"), 4.21300e-8); 19910447Snilay@cs.wisc.edu //t->performTimingOpt(getNet("CK"), 1e-9); 20010447Snilay@cs.wisc.edu //delete t; 20110447Snilay@cs.wisc.edu 20210447Snilay@cs.wisc.edu ElectricalTimingTree* t2 = new ElectricalTimingTree("Mux", this); 20310447Snilay@cs.wisc.edu t2->performTimingOpt(getNet("In1", makeNetIndex(0)), 500e-12); 20410447Snilay@cs.wisc.edu delete t2; 20510447Snilay@cs.wisc.edu 20610447Snilay@cs.wisc.edu 20710447Snilay@cs.wisc.edu } 20810447Snilay@cs.wisc.edu 20910447Snilay@cs.wisc.edu void TestModel::evaluateModel() 21010447Snilay@cs.wisc.edu { 21110447Snilay@cs.wisc.edu Model::evaluateModel(); 21210447Snilay@cs.wisc.edu 21310447Snilay@cs.wisc.edu //ripple_adder->getNddPowerResult("LeakagePower")->print("RippleAdder->Leakage", 10, cout); 21410447Snilay@cs.wisc.edu getSubInstance("Adder_1")->getNddPowerResult("Leakage")->print("RippleAdder->Leakage", 0, cout); 21510447Snilay@cs.wisc.edu //ripple_adder->getAreaResult("TotalArea")->print("RippleAdder->TotalArea", 10, cout); 21610447Snilay@cs.wisc.edu getSubInstance("Adder_1")->getAreaResult("Active")->print("RippleAdder->ActiveArea", 0, cout); 21710447Snilay@cs.wisc.edu //ripple_adder->getEventResult("AddEvent")->print("RippleAdder->AddEvent", 10, cout); 21810447Snilay@cs.wisc.edu getSubInstance("Adder_1")->getEventResult("Add")->print("RippleAdder->Add", 0, cout); 21910447Snilay@cs.wisc.edu 22010447Snilay@cs.wisc.edu getSubInstance("Mux_1")->getNddPowerResult("Leakage")->print("Multiplexer->Leakage", 0, cout); 22110447Snilay@cs.wisc.edu getSubInstance("Mux_1")->getAreaResult("Active")->print("Multiplexer->ActiveArea", 0, cout); 22210447Snilay@cs.wisc.edu getSubInstance("Mux_1")->getEventResult("Mux")->print("Multiplexer->MuxEvent", 0, cout); 22310447Snilay@cs.wisc.edu cout << "Multiplexer->P(Out) = " << getSubInstance("Mux_1")->getGenProperties()->get("P(Out)") << endl; 22410447Snilay@cs.wisc.edu 22510447Snilay@cs.wisc.edu getSubInstance("DFFQ-CI")->getNddPowerResult("Leakage")->print("DFFQ-CI->Leakage", 0, cout); 22610447Snilay@cs.wisc.edu getSubInstance("DFFQ-CI")->getAreaResult("Active")->print("DFFQ-CI->ActiveArea", 0, cout); 22710447Snilay@cs.wisc.edu getSubInstance("DFFQ-CI")->getEventResult("DFF")->print("DFFQ-CI->DFF", 0, cout); 22810447Snilay@cs.wisc.edu getSubInstance("DFFQ-CI")->getEventResult("CK")->print("DFFQ-CI->CK", 0, cout); 22910447Snilay@cs.wisc.edu 23010447Snilay@cs.wisc.edu //ripple_adder->getNddPowerResult("LeakagePower")->print("RippleAdder->Leakage", 10, cout); 23110447Snilay@cs.wisc.edu getSubInstance("Adder_1")->getNddPowerResult("Leakage")->print("RippleAdder->Leakage", 0, cout); 23210447Snilay@cs.wisc.edu //ripple_adder->getAreaResult("TotalArea")->print("RippleAdder->TotalArea", 10, cout); 23310447Snilay@cs.wisc.edu getSubInstance("Adder_1")->getAreaResult("Active")->print("RippleAdder->ActiveArea", 0, cout); 23410447Snilay@cs.wisc.edu //ripple_adder->getEventResult("AddEvent")->print("RippleAdder->AddEvent", 10, cout); 23510447Snilay@cs.wisc.edu getSubInstance("Adder_1")->getEventResult("Add")->print("RippleAdder->AddEvent", 0, cout); 23610447Snilay@cs.wisc.edu } 23710447Snilay@cs.wisc.edu 23810447Snilay@cs.wisc.edu} // namespace DSENT 23910447Snilay@cs.wisc.edu 240