run.py revision 8931
1360SN/A# Copyright (c) 2005-2007 The Regents of The University of Michigan
210850SGiacomo.Gabrielli@arm.com# All rights reserved.
310796Sbrandon.potter@amd.com#
410027SChris.Adeniyi-Jones@arm.com# Redistribution and use in source and binary forms, with or without
510027SChris.Adeniyi-Jones@arm.com# modification, are permitted provided that the following conditions are
610027SChris.Adeniyi-Jones@arm.com# met: redistributions of source code must retain the above copyright
710027SChris.Adeniyi-Jones@arm.com# notice, this list of conditions and the following disclaimer;
810027SChris.Adeniyi-Jones@arm.com# redistributions in binary form must reproduce the above copyright
910027SChris.Adeniyi-Jones@arm.com# notice, this list of conditions and the following disclaimer in the
1010027SChris.Adeniyi-Jones@arm.com# documentation and/or other materials provided with the distribution;
1110027SChris.Adeniyi-Jones@arm.com# neither the name of the copyright holders nor the names of its
1210027SChris.Adeniyi-Jones@arm.com# contributors may be used to endorse or promote products derived from
1310027SChris.Adeniyi-Jones@arm.com# this software without specific prior written permission.
1410027SChris.Adeniyi-Jones@arm.com#
151458SN/A# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
16360SN/A# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
17360SN/A# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
18360SN/A# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
19360SN/A# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
20360SN/A# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
21360SN/A# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
22360SN/A# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
23360SN/A# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24360SN/A# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
25360SN/A# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26360SN/A#
27360SN/A# Authors: Ron Dreslinski
28360SN/A
29360SN/A# Splash2 Run Script
30360SN/A#
31360SN/A
32360SN/Aimport os
33360SN/Aimport optparse
34360SN/Aimport sys
35360SN/A
36360SN/Aimport m5
37360SN/Afrom m5.objects import *
38360SN/A
39360SN/Am5.util.addToPath('../common')
402665Ssaidi@eecs.umich.edu
412665Ssaidi@eecs.umich.edu# --------------------
422665Ssaidi@eecs.umich.edu# Define Command Line Options
43360SN/A# ====================
44360SN/A
451354SN/Aparser = optparse.OptionParser()
461354SN/A
47360SN/Aparser.add_option("-d", "--detailed", action="store_true")
4812018Sandreas.sandberg@arm.comparser.add_option("-t", "--timing", action="store_true")
4912018Sandreas.sandberg@arm.comparser.add_option("-m", "--maxtick", type="int")
5012018Sandreas.sandberg@arm.comparser.add_option("-n", "--numcpus",
5112018Sandreas.sandberg@arm.com                  help="Number of cpus in total", type="int")
5212018Sandreas.sandberg@arm.comparser.add_option("-f", "--frequency",
5312018Sandreas.sandberg@arm.com                  default = "1GHz",
5412018Sandreas.sandberg@arm.com                  help="Frequency of each CPU")
552064SN/Aparser.add_option("--l1size",
5612018Sandreas.sandberg@arm.com                  default = "32kB")
5712018Sandreas.sandberg@arm.comparser.add_option("--l1latency",
5812018Sandreas.sandberg@arm.com                  default = "1ns")
5912018Sandreas.sandberg@arm.comparser.add_option("--l2size",
6012018Sandreas.sandberg@arm.com                  default = "256kB")
6112018Sandreas.sandberg@arm.comparser.add_option("--l2latency",
6211799Sbrandon.potter@amd.com                  default = "10ns")
6312018Sandreas.sandberg@arm.comparser.add_option("--rootdir",
6412018Sandreas.sandberg@arm.com                  help="Root directory of Splash2",
6512018Sandreas.sandberg@arm.com                  default="/dist/splash2/codes")
6612018Sandreas.sandberg@arm.comparser.add_option("-b", "--benchmark",
6712018Sandreas.sandberg@arm.com                  help="Splash 2 benchmark to run")
6812018Sandreas.sandberg@arm.com
6911799Sbrandon.potter@amd.com(options, args) = parser.parse_args()
70360SN/A
71360SN/Aif args:
72360SN/A    print "Error: script doesn't take any positional arguments"
73360SN/A    sys.exit(1)
74360SN/A
75360SN/Aif not options.numcpus:
761809SN/A    print "Specify the number of cpus with -n"
7711800Sbrandon.potter@amd.com    sys.exit(1)
7811392Sbrandon.potter@amd.com
791809SN/A# --------------------
8011392Sbrandon.potter@amd.com# Define Splash2 Benchmarks
8113570Sbrandon.potter@amd.com# ====================
8211383Sbrandon.potter@amd.comclass Cholesky(LiveProcess):
8313568Sbrandon.potter@amd.com    cwd = options.rootdir + '/kernels/cholesky'
843113Sgblack@eecs.umich.edu    executable = options.rootdir + '/kernels/cholesky/CHOLESKY'
8511799Sbrandon.potter@amd.com    cmd = ['CHOLESKY', '-p' +  str(options.numcpus),
8611759Sbrandon.potter@amd.com            options.rootdir + '/kernels/cholesky/inputs/tk23.O']
8711812Sbaz21@cam.ac.uk
8811812Sbaz21@cam.ac.ukclass FFT(LiveProcess):
8911799Sbrandon.potter@amd.com    cwd = options.rootdir + '/kernels/fft'
908229Snate@binkert.org    executable = options.rootdir + '/kernels/fft/FFT'
9113570Sbrandon.potter@amd.com    cmd = ['FFT', '-p', str(options.numcpus), '-m18']
928229Snate@binkert.org
9311594Santhony.gutierrez@amd.comclass LU_contig(LiveProcess):
947075Snate@binkert.org    executable = options.rootdir + '/kernels/lu/contiguous_blocks/LU'
958229Snate@binkert.org    cmd = ['LU', '-p', str(options.numcpus)]
9611856Sbrandon.potter@amd.com    cwd = options.rootdir + '/kernels/lu/contiguous_blocks'
977075Snate@binkert.org
98360SN/Aclass LU_noncontig(LiveProcess):
9912461Sgabeblack@google.com    executable = options.rootdir + '/kernels/lu/non_contiguous_blocks/LU'
10011886Sbrandon.potter@amd.com    cmd = ['LU', '-p', str(options.numcpus)]
10111800Sbrandon.potter@amd.com    cwd = options.rootdir + '/kernels/lu/non_contiguous_blocks'
10211392Sbrandon.potter@amd.com
10312334Sgabeblack@google.comclass Radix(LiveProcess):
1041354SN/A    executable = options.rootdir + '/kernels/radix/RADIX'
1056216Snate@binkert.org    cmd = ['RADIX', '-n524288', '-p', str(options.numcpus)]
1066658Snate@binkert.org    cwd = options.rootdir + '/kernels/radix'
1072474SN/A
1082680Sktlim@umich.educlass Barnes(LiveProcess):
1098229Snate@binkert.org    executable = options.rootdir + '/apps/barnes/BARNES'
11011886Sbrandon.potter@amd.com    cmd = ['BARNES']
11110496Ssteve.reinhardt@amd.com    input = options.rootdir + '/apps/barnes/input.p' + str(options.numcpus)
11211911SBrandon.Potter@amd.com    cwd = options.rootdir + '/apps/barnes'
1138229Snate@binkert.org
11411794Sbrandon.potter@amd.comclass FMM(LiveProcess):
11511886Sbrandon.potter@amd.com    executable = options.rootdir + '/apps/fmm/FMM'
11610497Ssteve.reinhardt@amd.com    cmd = ['FMM']
11711794Sbrandon.potter@amd.com    if str(options.numcpus) == '1':
118360SN/A        input = options.rootdir + '/apps/fmm/inputs/input.2048'
119360SN/A    else:
120360SN/A        input = options.rootdir + '/apps/fmm/inputs/input.2048.p' + str(options.numcpus)
121360SN/A    cwd = options.rootdir + '/apps/fmm'
122360SN/A
123360SN/Aclass Ocean_contig(LiveProcess):
124360SN/A    executable = options.rootdir + '/apps/ocean/contiguous_partitions/OCEAN'
125360SN/A    cmd = ['OCEAN', '-p', str(options.numcpus)]
126360SN/A    cwd = options.rootdir + '/apps/ocean/contiguous_partitions'
127360SN/A
128378SN/Aclass Ocean_noncontig(LiveProcess):
1291706SN/A    executable = options.rootdir + '/apps/ocean/non_contiguous_partitions/OCEAN'
13011851Sbrandon.potter@amd.com    cmd = ['OCEAN', '-p', str(options.numcpus)]
131378SN/A    cwd = options.rootdir + '/apps/ocean/non_contiguous_partitions'
132378SN/A
133378SN/Aclass Raytrace(LiveProcess):
134378SN/A    executable = options.rootdir + '/apps/raytrace/RAYTRACE'
135378SN/A    cmd = ['RAYTRACE', '-p' + str(options.numcpus),
1361706SN/A           options.rootdir + '/apps/raytrace/inputs/teapot.env']
13711851Sbrandon.potter@amd.com    cwd = options.rootdir + '/apps/raytrace'
138360SN/A
13911760Sbrandon.potter@amd.comclass Water_nsquared(LiveProcess):
14011760Sbrandon.potter@amd.com    executable = options.rootdir + '/apps/water-nsquared/WATER-NSQUARED'
14111851Sbrandon.potter@amd.com    cmd = ['WATER-NSQUARED']
14211760Sbrandon.potter@amd.com    if options.numcpus==1:
1436109Ssanchezd@stanford.edu        input = options.rootdir + '/apps/water-nsquared/input'
1441706SN/A    else:
14511851Sbrandon.potter@amd.com        input = options.rootdir + '/apps/water-nsquared/input.p' + str(options.numcpus)
146378SN/A    cwd = options.rootdir + '/apps/water-nsquared'
1476109Ssanchezd@stanford.edu
1486109Ssanchezd@stanford.educlass Water_spatial(LiveProcess):
14911851Sbrandon.potter@amd.com    executable = options.rootdir + '/apps/water-spatial/WATER-SPATIAL'
1506109Ssanchezd@stanford.edu    cmd = ['WATER-SPATIAL']
15111886Sbrandon.potter@amd.com    if options.numcpus==1:
15211886Sbrandon.potter@amd.com        input = options.rootdir + '/apps/water-spatial/input'
15311886Sbrandon.potter@amd.com    else:
15411886Sbrandon.potter@amd.com        input = options.rootdir + '/apps/water-spatial/input.p' + str(options.numcpus)
155378SN/A    cwd = options.rootdir + '/apps/water-spatial'
1561706SN/A
15711851Sbrandon.potter@amd.com# --------------------
158378SN/A# Base L1 Cache Definition
1595748SSteve.Reinhardt@amd.com# ====================
1605748SSteve.Reinhardt@amd.com
16111851Sbrandon.potter@amd.comclass L1(BaseCache):
162378SN/A    latency = options.l1latency
163378SN/A    block_size = 64
1641706SN/A    mshrs = 12
16511851Sbrandon.potter@amd.com    tgts_per_mshr = 8
166378SN/A
167378SN/A# ----------------------
1681706SN/A# Base L2 Cache Definition
16911851Sbrandon.potter@amd.com# ----------------------
170378SN/A
1714118Sgblack@eecs.umich.educlass L2(BaseCache):
1724118Sgblack@eecs.umich.edu    block_size = 64
17311851Sbrandon.potter@amd.com    latency = options.l2latency
1744118Sgblack@eecs.umich.edu    mshrs = 92
175378SN/A    tgts_per_mshr = 16
1761706SN/A    write_buffers = 8
17711851Sbrandon.potter@amd.com
178378SN/A# ----------------------
17913568Sbrandon.potter@amd.com# Define the cpus
18013568Sbrandon.potter@amd.com# ----------------------
18113568Sbrandon.potter@amd.com
18213568Sbrandon.potter@amd.combusFrequency = Frequency(options.frequency)
183378SN/A
1841706SN/Aif options.timing:
18511851Sbrandon.potter@amd.com    cpus = [TimingSimpleCPU(cpu_id = i,
186360SN/A                            clock=options.frequency)
1875513SMichael.Adler@intel.com            for i in xrange(options.numcpus)]
1885513SMichael.Adler@intel.comelif options.detailed:
18911851Sbrandon.potter@amd.com    cpus = [DerivO3CPU(cpu_id = i,
1905513SMichael.Adler@intel.com                       clock=options.frequency)
19110203SAli.Saidi@ARM.com            for i in xrange(options.numcpus)]
19210203SAli.Saidi@ARM.comelse:
19311851Sbrandon.potter@amd.com    cpus = [AtomicSimpleCPU(cpu_id = i,
19410203SAli.Saidi@ARM.com                            clock=options.frequency)
1955513SMichael.Adler@intel.com            for i in xrange(options.numcpus)]
19611851Sbrandon.potter@amd.com
1975513SMichael.Adler@intel.com# ----------------------
198511SN/A# Create a system, and add system wide objects
19910633Smichaelupton@gmail.com# ----------------------
20011851Sbrandon.potter@amd.comsystem = System(cpu = cpus, physmem = SimpleMemory(),
20110633Smichaelupton@gmail.com                membus = Bus(clock = busFrequency))
2021706SN/A
20311851Sbrandon.potter@amd.comsystem.toL2bus = Bus(clock = busFrequency)
204511SN/Asystem.l2 = L2(size = options.l2size, assoc = 8)
20512795Smattdsinclair@gmail.com
20612795Smattdsinclair@gmail.com# ----------------------
20712795Smattdsinclair@gmail.com# Connect the L2 cache and memory together
20812795Smattdsinclair@gmail.com# ----------------------
20912796Smattdsinclair@gmail.com
21012796Smattdsinclair@gmail.comsystem.physmem.port = system.membus.master
21112796Smattdsinclair@gmail.comsystem.l2.cpu_side = system.toL2bus.master
21212796Smattdsinclair@gmail.comsystem.l2.mem_side = system.membus.slave
2135513SMichael.Adler@intel.comsystem.system_port = system.membus.slave
2145513SMichael.Adler@intel.com
21511851Sbrandon.potter@amd.com# ----------------------
2165513SMichael.Adler@intel.com# Connect the L2 cache and clusters together
21713031Sbrandon.potter@amd.com# ----------------------
21813031Sbrandon.potter@amd.comfor cpu in cpus:
21913031Sbrandon.potter@amd.com    cpu.addPrivateSplitL1Caches(L1(size = options.l1size, assoc = 1),
22013031Sbrandon.potter@amd.com                                L1(size = options.l1size, assoc = 4))
22113031Sbrandon.potter@amd.com    # connect cpu level-1 caches to shared level-2 cache
22213031Sbrandon.potter@amd.com    cpu.connectAllPorts(system.toL2bus, system.membus)
22313031Sbrandon.potter@amd.com
22413031Sbrandon.potter@amd.com
22513031Sbrandon.potter@amd.com# ----------------------
22613031Sbrandon.potter@amd.com# Define the root
22713031Sbrandon.potter@amd.com# ----------------------
22813031Sbrandon.potter@amd.com
229511SN/Aroot = Root(full_system = False, system = system)
2301706SN/A
23111851Sbrandon.potter@amd.com# --------------------
2321706SN/A# Pick the correct Splash2 Benchmarks
2331706SN/A# ====================
2341706SN/Aif options.benchmark == 'Cholesky':
2351706SN/A    root.workload = Cholesky()
23611851Sbrandon.potter@amd.comelif options.benchmark == 'FFT':
2371706SN/A    root.workload = FFT()
2381706SN/Aelif options.benchmark == 'LUContig':
2391706SN/A    root.workload = LU_contig()
2401706SN/Aelif options.benchmark == 'LUNoncontig':
24111851Sbrandon.potter@amd.com    root.workload = LU_noncontig()
2421706SN/Aelif options.benchmark == 'Radix':
243511SN/A    root.workload = Radix()
2446703Svince@csl.cornell.eduelif options.benchmark == 'Barnes':
2456703Svince@csl.cornell.edu    root.workload = Barnes()
24611851Sbrandon.potter@amd.comelif options.benchmark == 'FMM':
2476703Svince@csl.cornell.edu    root.workload = FMM()
2486685Stjones1@inf.ed.ac.ukelif options.benchmark == 'OceanContig':
2496685Stjones1@inf.ed.ac.uk    root.workload = Ocean_contig()
25011851Sbrandon.potter@amd.comelif options.benchmark == 'OceanNoncontig':
2516685Stjones1@inf.ed.ac.uk    root.workload = Ocean_noncontig()
2526685Stjones1@inf.ed.ac.ukelif options.benchmark == 'Raytrace':
2535513SMichael.Adler@intel.com    root.workload = Raytrace()
2545513SMichael.Adler@intel.comelif options.benchmark == 'WaterNSquared':
25511851Sbrandon.potter@amd.com    root.workload = Water_nsquared()
2565513SMichael.Adler@intel.comelif options.benchmark == 'WaterSpatial':
25711885Sbrandon.potter@amd.com    root.workload = Water_spatial()
25811885Sbrandon.potter@amd.comelse:
25911885Sbrandon.potter@amd.com    print >> sys.stderr, """The --benchmark environment variable was set to something improper.
2605513SMichael.Adler@intel.comUse Cholesky, FFT, LUContig, LUNoncontig, Radix, Barnes, FMM, OceanContig,
2611999SN/AOceanNoncontig, Raytrace, WaterNSquared, or WaterSpatial"""
2621999SN/A    sys.exit(1)
26311851Sbrandon.potter@amd.com
2641999SN/A# --------------------
26511885Sbrandon.potter@amd.com# Assign the workload to the cpus
26611885Sbrandon.potter@amd.com# ====================
26711885Sbrandon.potter@amd.com
2681999SN/Afor cpu in cpus:
2691999SN/A    cpu.workload = root.workload
2701999SN/A
27111851Sbrandon.potter@amd.com# ----------------------
2721999SN/A# Run the simulation
2733079Sstever@eecs.umich.edu# ----------------------
2743079Sstever@eecs.umich.edu
27511851Sbrandon.potter@amd.comif options.timing or options.detailed:
2763079Sstever@eecs.umich.edu    root.system.mem_mode = 'timing'
27711908SBrandon.Potter@amd.com
27811908SBrandon.Potter@amd.com# instantiate configuration
27911908SBrandon.Potter@amd.comm5.instantiate()
28011908SBrandon.Potter@amd.com
28111875Sbrandon.potter@amd.com# simulate until program terminates
2822093SN/Aif options.maxtick:
28311851Sbrandon.potter@amd.com    exit_event = m5.simulate(options.maxtick)
2842093SN/Aelse:
2852687Sksewell@umich.edu    exit_event = m5.simulate(m5.MaxTick)
2862687Sksewell@umich.edu
28711851Sbrandon.potter@amd.comprint 'Exiting @ tick', m5.curTick(), 'because', exit_event.getCause()
2882687Sksewell@umich.edu
2892238SN/A