run.py revision 5255
14403Srdreslin@umich.edu# Copyright (c) 2005-2007 The Regents of The University of Michigan 21693Sstever@eecs.umich.edu# All rights reserved. 31693Sstever@eecs.umich.edu# 41693Sstever@eecs.umich.edu# Redistribution and use in source and binary forms, with or without 51693Sstever@eecs.umich.edu# modification, are permitted provided that the following conditions are 61693Sstever@eecs.umich.edu# met: redistributions of source code must retain the above copyright 71693Sstever@eecs.umich.edu# notice, this list of conditions and the following disclaimer; 81693Sstever@eecs.umich.edu# redistributions in binary form must reproduce the above copyright 91693Sstever@eecs.umich.edu# notice, this list of conditions and the following disclaimer in the 101693Sstever@eecs.umich.edu# documentation and/or other materials provided with the distribution; 111693Sstever@eecs.umich.edu# neither the name of the copyright holders nor the names of its 121693Sstever@eecs.umich.edu# contributors may be used to endorse or promote products derived from 131693Sstever@eecs.umich.edu# this software without specific prior written permission. 141693Sstever@eecs.umich.edu# 151693Sstever@eecs.umich.edu# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 161693Sstever@eecs.umich.edu# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 171693Sstever@eecs.umich.edu# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 181693Sstever@eecs.umich.edu# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 191693Sstever@eecs.umich.edu# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 201693Sstever@eecs.umich.edu# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 211693Sstever@eecs.umich.edu# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 221693Sstever@eecs.umich.edu# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 231693Sstever@eecs.umich.edu# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 241693Sstever@eecs.umich.edu# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 251693Sstever@eecs.umich.edu# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 261693Sstever@eecs.umich.edu# 271693Sstever@eecs.umich.edu# Authors: Ron Dreslinski 281693Sstever@eecs.umich.edu 293358Srdreslin@umich.edu# Splash2 Run Script 303358Srdreslin@umich.edu# 311516SN/A 323358Srdreslin@umich.eduimport m5 333358Srdreslin@umich.edufrom m5.objects import * 343358Srdreslin@umich.eduimport os, optparse, sys 353358Srdreslin@umich.edum5.AddToPath('../common') 361516SN/A 373358Srdreslin@umich.edu# -------------------- 383358Srdreslin@umich.edu# Define Command Line Options 393358Srdreslin@umich.edu# ==================== 403358Srdreslin@umich.edu 413358Srdreslin@umich.eduparser = optparse.OptionParser() 423358Srdreslin@umich.edu 433358Srdreslin@umich.eduparser.add_option("-d", "--detailed", action="store_true") 443358Srdreslin@umich.eduparser.add_option("-t", "--timing", action="store_true") 453358Srdreslin@umich.eduparser.add_option("-m", "--maxtick", type="int") 463358Srdreslin@umich.eduparser.add_option("-n", "--numcpus", 473358Srdreslin@umich.edu help="Number of cpus in total", type="int") 483358Srdreslin@umich.eduparser.add_option("-f", "--frequency", 493360Srdreslin@umich.edu default = "1GHz", 503358Srdreslin@umich.edu help="Frequency of each CPU") 513360Srdreslin@umich.eduparser.add_option("--l1size", 523360Srdreslin@umich.edu default = "32kB") 533360Srdreslin@umich.eduparser.add_option("--l1latency", 545255Ssaidi@eecs.umich.edu default = "1ns") 553360Srdreslin@umich.eduparser.add_option("--l2size", 563360Srdreslin@umich.edu default = "256kB") 573360Srdreslin@umich.eduparser.add_option("--l2latency", 585255Ssaidi@eecs.umich.edu default = "10ns") 593358Srdreslin@umich.eduparser.add_option("--rootdir", 604403Srdreslin@umich.edu help="Root directory of Splash2", 613360Srdreslin@umich.edu default="/dist/splash2/codes") 623358Srdreslin@umich.eduparser.add_option("-b", "--benchmark", 633358Srdreslin@umich.edu help="Splash 2 benchmark to run") 643358Srdreslin@umich.edu 653358Srdreslin@umich.edu(options, args) = parser.parse_args() 663358Srdreslin@umich.edu 673358Srdreslin@umich.eduif args: 683358Srdreslin@umich.edu print "Error: script doesn't take any positional arguments" 693358Srdreslin@umich.edu sys.exit(1) 703358Srdreslin@umich.edu 713360Srdreslin@umich.eduif not options.numcpus: 723360Srdreslin@umich.edu print "Specify the number of cpus with -n" 733360Srdreslin@umich.edu sys.exit(1) 743360Srdreslin@umich.edu 753358Srdreslin@umich.edu# -------------------- 763358Srdreslin@umich.edu# Define Splash2 Benchmarks 773358Srdreslin@umich.edu# ==================== 783358Srdreslin@umich.educlass Cholesky(LiveProcess): 794403Srdreslin@umich.edu cwd = options.rootdir + '/kernels/cholesky' 804403Srdreslin@umich.edu executable = options.rootdir + '/kernels/cholesky/CHOLESKY' 815255Ssaidi@eecs.umich.edu cmd = ['CHOLESKY', '-p', str(options.numcpus), 825255Ssaidi@eecs.umich.edu options.rootdir + '/kernels/cholesky/inputs/tk23.O'] 833358Srdreslin@umich.edu 843358Srdreslin@umich.educlass FFT(LiveProcess): 854403Srdreslin@umich.edu cwd = options.rootdir + '/kernels/fft' 864403Srdreslin@umich.edu executable = options.rootdir + '/kernels/fft/FFT' 875255Ssaidi@eecs.umich.edu cmd = ['FFT', '-p', str(options.numcpus), '-m18'] 883358Srdreslin@umich.edu 893358Srdreslin@umich.educlass LU_contig(LiveProcess): 904403Srdreslin@umich.edu executable = options.rootdir + '/kernels/lu/contiguous_blocks/LU' 915255Ssaidi@eecs.umich.edu cmd = ['LU', '-p', str(options.numcpus)] 924403Srdreslin@umich.edu cwd = options.rootdir + '/kernels/lu/contiguous_blocks' 933358Srdreslin@umich.edu 943358Srdreslin@umich.educlass LU_noncontig(LiveProcess): 954403Srdreslin@umich.edu executable = options.rootdir + '/kernels/lu/non_contiguous_blocks/LU' 965255Ssaidi@eecs.umich.edu cmd = ['LU', '-p', str(options.numcpus)] 974403Srdreslin@umich.edu cwd = options.rootdir + '/kernels/lu/non_contiguous_blocks' 983358Srdreslin@umich.edu 993358Srdreslin@umich.educlass Radix(LiveProcess): 1004403Srdreslin@umich.edu executable = options.rootdir + '/kernels/radix/RADIX' 1015255Ssaidi@eecs.umich.edu cmd = ['RADIX', '-n524288', '-p', str(options.numcpus)] 1024403Srdreslin@umich.edu cwd = options.rootdir + '/kernels/radix' 1033358Srdreslin@umich.edu 1043358Srdreslin@umich.educlass Barnes(LiveProcess): 1054403Srdreslin@umich.edu executable = options.rootdir + '/apps/barnes/BARNES' 1065255Ssaidi@eecs.umich.edu cmd = ['BARNES'] 1074403Srdreslin@umich.edu input = options.rootdir + '/apps/barnes/input.p' + str(options.numcpus) 1084403Srdreslin@umich.edu cwd = options.rootdir + '/apps/barnes' 1093358Srdreslin@umich.edu 1103358Srdreslin@umich.educlass FMM(LiveProcess): 1114403Srdreslin@umich.edu executable = options.rootdir + '/apps/fmm/FMM' 1125255Ssaidi@eecs.umich.edu cmd = ['FMM'] 1134403Srdreslin@umich.edu if str(options.numcpus) == '1': 1144403Srdreslin@umich.edu input = options.rootdir + '/apps/fmm/inputs/input.2048' 1154403Srdreslin@umich.edu else: 1163360Srdreslin@umich.edu input = options.rootdir + '/apps/fmm/inputs/input.2048.p' + str(options.numcpus) 1174403Srdreslin@umich.edu cwd = options.rootdir + '/apps/fmm' 1183358Srdreslin@umich.edu 1193358Srdreslin@umich.educlass Ocean_contig(LiveProcess): 1204403Srdreslin@umich.edu executable = options.rootdir + '/apps/ocean/contiguous_partitions/OCEAN' 1215255Ssaidi@eecs.umich.edu cmd = ['OCEAN', '-p', str(options.numcpus)] 1224403Srdreslin@umich.edu cwd = options.rootdir + '/apps/ocean/contiguous_partitions' 1233358Srdreslin@umich.edu 1243358Srdreslin@umich.educlass Ocean_noncontig(LiveProcess): 1254403Srdreslin@umich.edu executable = options.rootdir + '/apps/ocean/non_contiguous_partitions/OCEAN' 1265255Ssaidi@eecs.umich.edu cmd = ['OCEAN', '-p', str(options.numcpus)] 1274403Srdreslin@umich.edu cwd = options.rootdir + '/apps/ocean/non_contiguous_partitions' 1283358Srdreslin@umich.edu 1293358Srdreslin@umich.educlass Raytrace(LiveProcess): 1304403Srdreslin@umich.edu executable = options.rootdir + '/apps/raytrace/RAYTRACE' 1315255Ssaidi@eecs.umich.edu cmd = ['RAYTRACE', '-p', str(options.numcpus), 1325255Ssaidi@eecs.umich.edu options.rootdir + '/apps/raytrace/inputs/teapot.env'] 1334403Srdreslin@umich.edu cwd = options.rootdir + '/apps/raytrace' 1343358Srdreslin@umich.edu 1353358Srdreslin@umich.educlass Water_nsquared(LiveProcess): 1364403Srdreslin@umich.edu executable = options.rootdir + '/apps/water-nsquared/WATER-NSQUARED' 1375255Ssaidi@eecs.umich.edu cmd = ['WATER-NSQUARED'] 1384403Srdreslin@umich.edu if options.numcpus==1: 1394403Srdreslin@umich.edu input = options.rootdir + '/apps/water-nsquared/input' 1404403Srdreslin@umich.edu else: 1413360Srdreslin@umich.edu input = options.rootdir + '/apps/water-nsquared/input.p' + str(options.numcpus) 1424403Srdreslin@umich.edu cwd = options.rootdir + '/apps/water-nsquared' 1433358Srdreslin@umich.edu 1443358Srdreslin@umich.educlass Water_spatial(LiveProcess): 1454403Srdreslin@umich.edu executable = options.rootdir + '/apps/water-spatial/WATER-SPATIAL' 1465255Ssaidi@eecs.umich.edu cmd = ['WATER-SPATIAL'] 1474403Srdreslin@umich.edu if options.numcpus==1: 1484403Srdreslin@umich.edu input = options.rootdir + '/apps/water-spatial/input' 1494403Srdreslin@umich.edu else: 1503360Srdreslin@umich.edu input = options.rootdir + '/apps/water-spatial/input.p' + str(options.numcpus) 1514403Srdreslin@umich.edu cwd = options.rootdir + '/apps/water-spatial' 1523358Srdreslin@umich.edu 1533358Srdreslin@umich.edu# -------------------- 1543358Srdreslin@umich.edu# Base L1 Cache Definition 1553358Srdreslin@umich.edu# ==================== 1563358Srdreslin@umich.edu 1573358Srdreslin@umich.educlass L1(BaseCache): 1583358Srdreslin@umich.edu latency = options.l1latency 1593358Srdreslin@umich.edu block_size = 64 1603358Srdreslin@umich.edu mshrs = 12 1613358Srdreslin@umich.edu tgts_per_mshr = 8 1623358Srdreslin@umich.edu 1633358Srdreslin@umich.edu# ---------------------- 1643358Srdreslin@umich.edu# Base L2 Cache Definition 1653358Srdreslin@umich.edu# ---------------------- 1663358Srdreslin@umich.edu 1673358Srdreslin@umich.educlass L2(BaseCache): 1683358Srdreslin@umich.edu block_size = 64 1693358Srdreslin@umich.edu latency = options.l2latency 1703358Srdreslin@umich.edu mshrs = 92 1713358Srdreslin@umich.edu tgts_per_mshr = 16 1723358Srdreslin@umich.edu write_buffers = 8 1733358Srdreslin@umich.edu 1743358Srdreslin@umich.edu# ---------------------- 1753358Srdreslin@umich.edu# Define the cpus 1763358Srdreslin@umich.edu# ---------------------- 1773358Srdreslin@umich.edu 1783358Srdreslin@umich.edubusFrequency = Frequency(options.frequency) 1793358Srdreslin@umich.edu 1803358Srdreslin@umich.eduif options.timing: 1813358Srdreslin@umich.edu cpus = [TimingSimpleCPU(cpu_id = i, 1823358Srdreslin@umich.edu clock=options.frequency) 1833358Srdreslin@umich.edu for i in xrange(options.numcpus)] 1843358Srdreslin@umich.eduelif options.detailed: 1853358Srdreslin@umich.edu cpus = [DerivO3CPU(cpu_id = i, 1863358Srdreslin@umich.edu clock=options.frequency) 1873358Srdreslin@umich.edu for i in xrange(options.numcpus)] 1881516SN/Aelse: 1893358Srdreslin@umich.edu cpus = [AtomicSimpleCPU(cpu_id = i, 1903358Srdreslin@umich.edu clock=options.frequency) 1913358Srdreslin@umich.edu for i in xrange(options.numcpus)] 1921516SN/A 1933358Srdreslin@umich.edu# ---------------------- 1943358Srdreslin@umich.edu# Create a system, and add system wide objects 1953358Srdreslin@umich.edu# ---------------------- 1963358Srdreslin@umich.edusystem = System(cpu = cpus, physmem = PhysicalMemory(), 1973358Srdreslin@umich.edu membus = Bus(clock = busFrequency)) 1981516SN/A 1993358Srdreslin@umich.edusystem.toL2bus = Bus(clock = busFrequency) 2003358Srdreslin@umich.edusystem.l2 = L2(size = options.l2size, assoc = 8) 2013358Srdreslin@umich.edu 2023358Srdreslin@umich.edu# ---------------------- 2033358Srdreslin@umich.edu# Connect the L2 cache and memory together 2043358Srdreslin@umich.edu# ---------------------- 2053358Srdreslin@umich.edu 2063358Srdreslin@umich.edusystem.physmem.port = system.membus.port 2073358Srdreslin@umich.edusystem.l2.cpu_side = system.toL2bus.port 2083358Srdreslin@umich.edusystem.l2.mem_side = system.membus.port 2093358Srdreslin@umich.edu 2103358Srdreslin@umich.edu# ---------------------- 2113358Srdreslin@umich.edu# Connect the L2 cache and clusters together 2123358Srdreslin@umich.edu# ---------------------- 2133358Srdreslin@umich.edufor cpu in cpus: 2143358Srdreslin@umich.edu cpu.addPrivateSplitL1Caches(L1(size = options.l1size, assoc = 1), 2153358Srdreslin@umich.edu L1(size = options.l1size, assoc = 4)) 2163358Srdreslin@umich.edu cpu.mem = cpu.dcache 2173358Srdreslin@umich.edu # connect cpu level-1 caches to shared level-2 cache 2183358Srdreslin@umich.edu cpu.connectMemPorts(system.toL2bus) 2193358Srdreslin@umich.edu 2203358Srdreslin@umich.edu 2213358Srdreslin@umich.edu# ---------------------- 2223358Srdreslin@umich.edu# Define the root 2233358Srdreslin@umich.edu# ---------------------- 2243358Srdreslin@umich.edu 2253358Srdreslin@umich.eduroot = Root(system = system) 2263358Srdreslin@umich.edu 2273358Srdreslin@umich.edu# -------------------- 2283358Srdreslin@umich.edu# Pick the correct Splash2 Benchmarks 2293358Srdreslin@umich.edu# ==================== 2303358Srdreslin@umich.eduif options.benchmark == 'Cholesky': 2313358Srdreslin@umich.edu root.workload = Cholesky() 2323358Srdreslin@umich.eduelif options.benchmark == 'FFT': 2333358Srdreslin@umich.edu root.workload = FFT() 2343358Srdreslin@umich.eduelif options.benchmark == 'LUContig': 2353358Srdreslin@umich.edu root.workload = LU_contig() 2363358Srdreslin@umich.eduelif options.benchmark == 'LUNoncontig': 2373358Srdreslin@umich.edu root.workload = LU_noncontig() 2383358Srdreslin@umich.eduelif options.benchmark == 'Radix': 2393358Srdreslin@umich.edu root.workload = Radix() 2403358Srdreslin@umich.eduelif options.benchmark == 'Barnes': 2413358Srdreslin@umich.edu root.workload = Barnes() 2423358Srdreslin@umich.eduelif options.benchmark == 'FMM': 2433358Srdreslin@umich.edu root.workload = FMM() 2443358Srdreslin@umich.eduelif options.benchmark == 'OceanContig': 2453358Srdreslin@umich.edu root.workload = Ocean_contig() 2463358Srdreslin@umich.eduelif options.benchmark == 'OceanNoncontig': 2473358Srdreslin@umich.edu root.workload = Ocean_noncontig() 2483358Srdreslin@umich.eduelif options.benchmark == 'Raytrace': 2493358Srdreslin@umich.edu root.workload = Raytrace() 2503358Srdreslin@umich.eduelif options.benchmark == 'WaterNSquared': 2513358Srdreslin@umich.edu root.workload = Water_nsquared() 2523358Srdreslin@umich.eduelif options.benchmark == 'WaterSpatial': 2533358Srdreslin@umich.edu root.workload = Water_spatial() 2541516SN/Aelse: 2553358Srdreslin@umich.edu panic("The --benchmark environment variable was set to something" \ 2561516SN/A +" improper.\nUse Cholesky, FFT, LUContig, LUNoncontig, Radix" \ 2571516SN/A +", Barnes, FMM, OceanContig,\nOceanNoncontig, Raytrace," \ 2581516SN/A +" WaterNSquared, or WaterSpatial\n") 2593358Srdreslin@umich.edu 2603358Srdreslin@umich.edu# -------------------- 2613358Srdreslin@umich.edu# Assign the workload to the cpus 2623358Srdreslin@umich.edu# ==================== 2633358Srdreslin@umich.edu 2643358Srdreslin@umich.edufor cpu in cpus: 2653358Srdreslin@umich.edu cpu.workload = root.workload 2663358Srdreslin@umich.edu 2673358Srdreslin@umich.edu# ---------------------- 2683358Srdreslin@umich.edu# Run the simulation 2693358Srdreslin@umich.edu# ---------------------- 2703358Srdreslin@umich.edu 2713358Srdreslin@umich.eduif options.timing or options.detailed: 2723358Srdreslin@umich.edu root.system.mem_mode = 'timing' 2733358Srdreslin@umich.edu 2743358Srdreslin@umich.edu# instantiate configuration 2753358Srdreslin@umich.edum5.instantiate(root) 2763358Srdreslin@umich.edu 2773358Srdreslin@umich.edu# simulate until program terminates 2783358Srdreslin@umich.eduif options.maxtick: 2793358Srdreslin@umich.edu exit_event = m5.simulate(options.maxtick) 2803358Srdreslin@umich.eduelse: 2813646Srdreslin@umich.edu exit_event = m5.simulate(m5.MaxTick) 2823358Srdreslin@umich.edu 2833358Srdreslin@umich.eduprint 'Exiting @ tick', m5.curTick(), 'because', exit_event.getCause() 2843358Srdreslin@umich.edu 285