run.py revision 13774
14403Srdreslin@umich.edu# Copyright (c) 2005-2007 The Regents of The University of Michigan 21693Sstever@eecs.umich.edu# All rights reserved. 31693Sstever@eecs.umich.edu# 41693Sstever@eecs.umich.edu# Redistribution and use in source and binary forms, with or without 51693Sstever@eecs.umich.edu# modification, are permitted provided that the following conditions are 61693Sstever@eecs.umich.edu# met: redistributions of source code must retain the above copyright 71693Sstever@eecs.umich.edu# notice, this list of conditions and the following disclaimer; 81693Sstever@eecs.umich.edu# redistributions in binary form must reproduce the above copyright 91693Sstever@eecs.umich.edu# notice, this list of conditions and the following disclaimer in the 101693Sstever@eecs.umich.edu# documentation and/or other materials provided with the distribution; 111693Sstever@eecs.umich.edu# neither the name of the copyright holders nor the names of its 121693Sstever@eecs.umich.edu# contributors may be used to endorse or promote products derived from 131693Sstever@eecs.umich.edu# this software without specific prior written permission. 141693Sstever@eecs.umich.edu# 151693Sstever@eecs.umich.edu# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 161693Sstever@eecs.umich.edu# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 171693Sstever@eecs.umich.edu# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 181693Sstever@eecs.umich.edu# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 191693Sstever@eecs.umich.edu# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 201693Sstever@eecs.umich.edu# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 211693Sstever@eecs.umich.edu# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 221693Sstever@eecs.umich.edu# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 231693Sstever@eecs.umich.edu# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 241693Sstever@eecs.umich.edu# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 251693Sstever@eecs.umich.edu# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 261693Sstever@eecs.umich.edu# 271693Sstever@eecs.umich.edu# Authors: Ron Dreslinski 281693Sstever@eecs.umich.edu 293358Srdreslin@umich.edu# Splash2 Run Script 303358Srdreslin@umich.edu# 311516SN/A 3212564Sgabeblack@google.comfrom __future__ import print_function 3313774Sandreas.sandberg@arm.comfrom __future__ import absolute_import 3412564Sgabeblack@google.com 356654Snate@binkert.orgimport os 366654Snate@binkert.orgimport optparse 376654Snate@binkert.orgimport sys 386654Snate@binkert.org 393358Srdreslin@umich.eduimport m5 403358Srdreslin@umich.edufrom m5.objects import * 416654Snate@binkert.org 423358Srdreslin@umich.edu# -------------------- 433358Srdreslin@umich.edu# Define Command Line Options 443358Srdreslin@umich.edu# ==================== 453358Srdreslin@umich.edu 463358Srdreslin@umich.eduparser = optparse.OptionParser() 473358Srdreslin@umich.edu 483358Srdreslin@umich.eduparser.add_option("-d", "--detailed", action="store_true") 493358Srdreslin@umich.eduparser.add_option("-t", "--timing", action="store_true") 503358Srdreslin@umich.eduparser.add_option("-m", "--maxtick", type="int") 513358Srdreslin@umich.eduparser.add_option("-n", "--numcpus", 523358Srdreslin@umich.edu help="Number of cpus in total", type="int") 533358Srdreslin@umich.eduparser.add_option("-f", "--frequency", 543360Srdreslin@umich.edu default = "1GHz", 553358Srdreslin@umich.edu help="Frequency of each CPU") 563360Srdreslin@umich.eduparser.add_option("--l1size", 573360Srdreslin@umich.edu default = "32kB") 583360Srdreslin@umich.eduparser.add_option("--l1latency", 595255Ssaidi@eecs.umich.edu default = "1ns") 603360Srdreslin@umich.eduparser.add_option("--l2size", 613360Srdreslin@umich.edu default = "256kB") 623360Srdreslin@umich.eduparser.add_option("--l2latency", 635255Ssaidi@eecs.umich.edu default = "10ns") 643358Srdreslin@umich.eduparser.add_option("--rootdir", 654403Srdreslin@umich.edu help="Root directory of Splash2", 663360Srdreslin@umich.edu default="/dist/splash2/codes") 673358Srdreslin@umich.eduparser.add_option("-b", "--benchmark", 683358Srdreslin@umich.edu help="Splash 2 benchmark to run") 693358Srdreslin@umich.edu 703358Srdreslin@umich.edu(options, args) = parser.parse_args() 713358Srdreslin@umich.edu 723358Srdreslin@umich.eduif args: 7312564Sgabeblack@google.com print("Error: script doesn't take any positional arguments") 743358Srdreslin@umich.edu sys.exit(1) 753358Srdreslin@umich.edu 763360Srdreslin@umich.eduif not options.numcpus: 7712564Sgabeblack@google.com print("Specify the number of cpus with -n") 783360Srdreslin@umich.edu sys.exit(1) 793360Srdreslin@umich.edu 803358Srdreslin@umich.edu# -------------------- 813358Srdreslin@umich.edu# Define Splash2 Benchmarks 823358Srdreslin@umich.edu# ==================== 8311851Sbrandon.potter@amd.comclass Cholesky(Process): 844403Srdreslin@umich.edu cwd = options.rootdir + '/kernels/cholesky' 854403Srdreslin@umich.edu executable = options.rootdir + '/kernels/cholesky/CHOLESKY' 865256Ssaidi@eecs.umich.edu cmd = ['CHOLESKY', '-p' + str(options.numcpus), 875255Ssaidi@eecs.umich.edu options.rootdir + '/kernels/cholesky/inputs/tk23.O'] 883358Srdreslin@umich.edu 8911851Sbrandon.potter@amd.comclass FFT(Process): 904403Srdreslin@umich.edu cwd = options.rootdir + '/kernels/fft' 914403Srdreslin@umich.edu executable = options.rootdir + '/kernels/fft/FFT' 925255Ssaidi@eecs.umich.edu cmd = ['FFT', '-p', str(options.numcpus), '-m18'] 933358Srdreslin@umich.edu 9411851Sbrandon.potter@amd.comclass LU_contig(Process): 954403Srdreslin@umich.edu executable = options.rootdir + '/kernels/lu/contiguous_blocks/LU' 965255Ssaidi@eecs.umich.edu cmd = ['LU', '-p', str(options.numcpus)] 974403Srdreslin@umich.edu cwd = options.rootdir + '/kernels/lu/contiguous_blocks' 983358Srdreslin@umich.edu 9911851Sbrandon.potter@amd.comclass LU_noncontig(Process): 1004403Srdreslin@umich.edu executable = options.rootdir + '/kernels/lu/non_contiguous_blocks/LU' 1015255Ssaidi@eecs.umich.edu cmd = ['LU', '-p', str(options.numcpus)] 1024403Srdreslin@umich.edu cwd = options.rootdir + '/kernels/lu/non_contiguous_blocks' 1033358Srdreslin@umich.edu 10411851Sbrandon.potter@amd.comclass Radix(Process): 1054403Srdreslin@umich.edu executable = options.rootdir + '/kernels/radix/RADIX' 1065255Ssaidi@eecs.umich.edu cmd = ['RADIX', '-n524288', '-p', str(options.numcpus)] 1074403Srdreslin@umich.edu cwd = options.rootdir + '/kernels/radix' 1083358Srdreslin@umich.edu 10911851Sbrandon.potter@amd.comclass Barnes(Process): 1104403Srdreslin@umich.edu executable = options.rootdir + '/apps/barnes/BARNES' 1115255Ssaidi@eecs.umich.edu cmd = ['BARNES'] 1124403Srdreslin@umich.edu input = options.rootdir + '/apps/barnes/input.p' + str(options.numcpus) 1134403Srdreslin@umich.edu cwd = options.rootdir + '/apps/barnes' 1143358Srdreslin@umich.edu 11511851Sbrandon.potter@amd.comclass FMM(Process): 1164403Srdreslin@umich.edu executable = options.rootdir + '/apps/fmm/FMM' 1175255Ssaidi@eecs.umich.edu cmd = ['FMM'] 1184403Srdreslin@umich.edu if str(options.numcpus) == '1': 1194403Srdreslin@umich.edu input = options.rootdir + '/apps/fmm/inputs/input.2048' 1204403Srdreslin@umich.edu else: 1213360Srdreslin@umich.edu input = options.rootdir + '/apps/fmm/inputs/input.2048.p' + str(options.numcpus) 1224403Srdreslin@umich.edu cwd = options.rootdir + '/apps/fmm' 1233358Srdreslin@umich.edu 12411851Sbrandon.potter@amd.comclass Ocean_contig(Process): 1254403Srdreslin@umich.edu executable = options.rootdir + '/apps/ocean/contiguous_partitions/OCEAN' 1265255Ssaidi@eecs.umich.edu cmd = ['OCEAN', '-p', str(options.numcpus)] 1274403Srdreslin@umich.edu cwd = options.rootdir + '/apps/ocean/contiguous_partitions' 1283358Srdreslin@umich.edu 12911851Sbrandon.potter@amd.comclass Ocean_noncontig(Process): 1304403Srdreslin@umich.edu executable = options.rootdir + '/apps/ocean/non_contiguous_partitions/OCEAN' 1315255Ssaidi@eecs.umich.edu cmd = ['OCEAN', '-p', str(options.numcpus)] 1324403Srdreslin@umich.edu cwd = options.rootdir + '/apps/ocean/non_contiguous_partitions' 1333358Srdreslin@umich.edu 13411851Sbrandon.potter@amd.comclass Raytrace(Process): 1354403Srdreslin@umich.edu executable = options.rootdir + '/apps/raytrace/RAYTRACE' 1365256Ssaidi@eecs.umich.edu cmd = ['RAYTRACE', '-p' + str(options.numcpus), 1375255Ssaidi@eecs.umich.edu options.rootdir + '/apps/raytrace/inputs/teapot.env'] 1384403Srdreslin@umich.edu cwd = options.rootdir + '/apps/raytrace' 1393358Srdreslin@umich.edu 14011851Sbrandon.potter@amd.comclass Water_nsquared(Process): 1414403Srdreslin@umich.edu executable = options.rootdir + '/apps/water-nsquared/WATER-NSQUARED' 1425255Ssaidi@eecs.umich.edu cmd = ['WATER-NSQUARED'] 1434403Srdreslin@umich.edu if options.numcpus==1: 1444403Srdreslin@umich.edu input = options.rootdir + '/apps/water-nsquared/input' 1454403Srdreslin@umich.edu else: 1463360Srdreslin@umich.edu input = options.rootdir + '/apps/water-nsquared/input.p' + str(options.numcpus) 1474403Srdreslin@umich.edu cwd = options.rootdir + '/apps/water-nsquared' 1483358Srdreslin@umich.edu 14911851Sbrandon.potter@amd.comclass Water_spatial(Process): 1504403Srdreslin@umich.edu executable = options.rootdir + '/apps/water-spatial/WATER-SPATIAL' 1515255Ssaidi@eecs.umich.edu cmd = ['WATER-SPATIAL'] 1524403Srdreslin@umich.edu if options.numcpus==1: 1534403Srdreslin@umich.edu input = options.rootdir + '/apps/water-spatial/input' 1544403Srdreslin@umich.edu else: 1553360Srdreslin@umich.edu input = options.rootdir + '/apps/water-spatial/input.p' + str(options.numcpus) 1564403Srdreslin@umich.edu cwd = options.rootdir + '/apps/water-spatial' 1573358Srdreslin@umich.edu 1583358Srdreslin@umich.edu# -------------------- 1593358Srdreslin@umich.edu# Base L1 Cache Definition 1603358Srdreslin@umich.edu# ==================== 1613358Srdreslin@umich.edu 16211053Sandreas.hansson@arm.comclass L1(Cache): 1633358Srdreslin@umich.edu latency = options.l1latency 1643358Srdreslin@umich.edu mshrs = 12 1653358Srdreslin@umich.edu tgts_per_mshr = 8 1663358Srdreslin@umich.edu 1673358Srdreslin@umich.edu# ---------------------- 1683358Srdreslin@umich.edu# Base L2 Cache Definition 1693358Srdreslin@umich.edu# ---------------------- 1703358Srdreslin@umich.edu 17111053Sandreas.hansson@arm.comclass L2(Cache): 1723358Srdreslin@umich.edu latency = options.l2latency 1733358Srdreslin@umich.edu mshrs = 92 1743358Srdreslin@umich.edu tgts_per_mshr = 16 1753358Srdreslin@umich.edu write_buffers = 8 1763358Srdreslin@umich.edu 1773358Srdreslin@umich.edu# ---------------------- 1783358Srdreslin@umich.edu# Define the cpus 1793358Srdreslin@umich.edu# ---------------------- 1803358Srdreslin@umich.edu 1813358Srdreslin@umich.edubusFrequency = Frequency(options.frequency) 1823358Srdreslin@umich.edu 1833358Srdreslin@umich.eduif options.timing: 1843358Srdreslin@umich.edu cpus = [TimingSimpleCPU(cpu_id = i, 1853358Srdreslin@umich.edu clock=options.frequency) 18613731Sandreas.sandberg@arm.com for i in range(options.numcpus)] 1873358Srdreslin@umich.eduelif options.detailed: 1883358Srdreslin@umich.edu cpus = [DerivO3CPU(cpu_id = i, 1893358Srdreslin@umich.edu clock=options.frequency) 19013731Sandreas.sandberg@arm.com for i in range(options.numcpus)] 1911516SN/Aelse: 1923358Srdreslin@umich.edu cpus = [AtomicSimpleCPU(cpu_id = i, 1933358Srdreslin@umich.edu clock=options.frequency) 19413731Sandreas.sandberg@arm.com for i in range(options.numcpus)] 1951516SN/A 1963358Srdreslin@umich.edu# ---------------------- 1973358Srdreslin@umich.edu# Create a system, and add system wide objects 1983358Srdreslin@umich.edu# ---------------------- 1998931Sandreas.hansson@arm.comsystem = System(cpu = cpus, physmem = SimpleMemory(), 20010720Sandreas.hansson@arm.com membus = SystemXBar(clock = busFrequency)) 2019790Sakash.bagdia@arm.comsystem.clock = '1GHz' 2021516SN/A 20310720Sandreas.hansson@arm.comsystem.toL2bus = L2XBar(clock = busFrequency) 2043358Srdreslin@umich.edusystem.l2 = L2(size = options.l2size, assoc = 8) 2053358Srdreslin@umich.edu 2063358Srdreslin@umich.edu# ---------------------- 2073358Srdreslin@umich.edu# Connect the L2 cache and memory together 2083358Srdreslin@umich.edu# ---------------------- 2093358Srdreslin@umich.edu 2108847Sandreas.hansson@arm.comsystem.physmem.port = system.membus.master 2118847Sandreas.hansson@arm.comsystem.l2.cpu_side = system.toL2bus.master 2128847Sandreas.hansson@arm.comsystem.l2.mem_side = system.membus.slave 2138847Sandreas.hansson@arm.comsystem.system_port = system.membus.slave 2143358Srdreslin@umich.edu 2153358Srdreslin@umich.edu# ---------------------- 2163358Srdreslin@umich.edu# Connect the L2 cache and clusters together 2173358Srdreslin@umich.edu# ---------------------- 2183358Srdreslin@umich.edufor cpu in cpus: 2193358Srdreslin@umich.edu cpu.addPrivateSplitL1Caches(L1(size = options.l1size, assoc = 1), 2203358Srdreslin@umich.edu L1(size = options.l1size, assoc = 4)) 2213358Srdreslin@umich.edu # connect cpu level-1 caches to shared level-2 cache 2227876Sgblack@eecs.umich.edu cpu.connectAllPorts(system.toL2bus, system.membus) 2233358Srdreslin@umich.edu 2243358Srdreslin@umich.edu 2253358Srdreslin@umich.edu# ---------------------- 2263358Srdreslin@umich.edu# Define the root 2273358Srdreslin@umich.edu# ---------------------- 2283358Srdreslin@umich.edu 2298801Sgblack@eecs.umich.eduroot = Root(full_system = False, system = system) 2303358Srdreslin@umich.edu 2313358Srdreslin@umich.edu# -------------------- 2323358Srdreslin@umich.edu# Pick the correct Splash2 Benchmarks 2333358Srdreslin@umich.edu# ==================== 2343358Srdreslin@umich.eduif options.benchmark == 'Cholesky': 2353358Srdreslin@umich.edu root.workload = Cholesky() 2363358Srdreslin@umich.eduelif options.benchmark == 'FFT': 2373358Srdreslin@umich.edu root.workload = FFT() 2383358Srdreslin@umich.eduelif options.benchmark == 'LUContig': 2393358Srdreslin@umich.edu root.workload = LU_contig() 2403358Srdreslin@umich.eduelif options.benchmark == 'LUNoncontig': 2413358Srdreslin@umich.edu root.workload = LU_noncontig() 2423358Srdreslin@umich.eduelif options.benchmark == 'Radix': 2433358Srdreslin@umich.edu root.workload = Radix() 2443358Srdreslin@umich.eduelif options.benchmark == 'Barnes': 2453358Srdreslin@umich.edu root.workload = Barnes() 2463358Srdreslin@umich.eduelif options.benchmark == 'FMM': 2473358Srdreslin@umich.edu root.workload = FMM() 2483358Srdreslin@umich.eduelif options.benchmark == 'OceanContig': 2493358Srdreslin@umich.edu root.workload = Ocean_contig() 2503358Srdreslin@umich.eduelif options.benchmark == 'OceanNoncontig': 2513358Srdreslin@umich.edu root.workload = Ocean_noncontig() 2523358Srdreslin@umich.eduelif options.benchmark == 'Raytrace': 2533358Srdreslin@umich.edu root.workload = Raytrace() 2543358Srdreslin@umich.eduelif options.benchmark == 'WaterNSquared': 2553358Srdreslin@umich.edu root.workload = Water_nsquared() 2563358Srdreslin@umich.eduelif options.benchmark == 'WaterSpatial': 2573358Srdreslin@umich.edu root.workload = Water_spatial() 2581516SN/Aelse: 25912564Sgabeblack@google.com print("The --benchmark environment variable was set to something " 26012564Sgabeblack@google.com "improper. Use Cholesky, FFT, LUContig, LUNoncontig, Radix, " 26112564Sgabeblack@google.com "Barnes, FMM, OceanContig, OceanNoncontig, Raytrace, WaterNSquared, " 26212564Sgabeblack@google.com "or WaterSpatial", file=sys.stderr) 2635256Ssaidi@eecs.umich.edu sys.exit(1) 2643358Srdreslin@umich.edu 2653358Srdreslin@umich.edu# -------------------- 2663358Srdreslin@umich.edu# Assign the workload to the cpus 2673358Srdreslin@umich.edu# ==================== 2683358Srdreslin@umich.edu 2693358Srdreslin@umich.edufor cpu in cpus: 2703358Srdreslin@umich.edu cpu.workload = root.workload 2713358Srdreslin@umich.edu 2723358Srdreslin@umich.edu# ---------------------- 2733358Srdreslin@umich.edu# Run the simulation 2743358Srdreslin@umich.edu# ---------------------- 2753358Srdreslin@umich.edu 2763358Srdreslin@umich.eduif options.timing or options.detailed: 2773358Srdreslin@umich.edu root.system.mem_mode = 'timing' 2783358Srdreslin@umich.edu 2793358Srdreslin@umich.edu# instantiate configuration 2807525Ssteve.reinhardt@amd.comm5.instantiate() 2813358Srdreslin@umich.edu 2823358Srdreslin@umich.edu# simulate until program terminates 2833358Srdreslin@umich.eduif options.maxtick: 2843358Srdreslin@umich.edu exit_event = m5.simulate(options.maxtick) 2853358Srdreslin@umich.eduelse: 2863646Srdreslin@umich.edu exit_event = m5.simulate(m5.MaxTick) 2873358Srdreslin@umich.edu 28812564Sgabeblack@google.comprint('Exiting @ tick', m5.curTick(), 'because', exit_event.getCause()) 2893358Srdreslin@umich.edu 290