run.py revision 11851
14403Srdreslin@umich.edu# Copyright (c) 2005-2007 The Regents of The University of Michigan 21693Sstever@eecs.umich.edu# All rights reserved. 31693Sstever@eecs.umich.edu# 41693Sstever@eecs.umich.edu# Redistribution and use in source and binary forms, with or without 51693Sstever@eecs.umich.edu# modification, are permitted provided that the following conditions are 61693Sstever@eecs.umich.edu# met: redistributions of source code must retain the above copyright 71693Sstever@eecs.umich.edu# notice, this list of conditions and the following disclaimer; 81693Sstever@eecs.umich.edu# redistributions in binary form must reproduce the above copyright 91693Sstever@eecs.umich.edu# notice, this list of conditions and the following disclaimer in the 101693Sstever@eecs.umich.edu# documentation and/or other materials provided with the distribution; 111693Sstever@eecs.umich.edu# neither the name of the copyright holders nor the names of its 121693Sstever@eecs.umich.edu# contributors may be used to endorse or promote products derived from 131693Sstever@eecs.umich.edu# this software without specific prior written permission. 141693Sstever@eecs.umich.edu# 151693Sstever@eecs.umich.edu# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 161693Sstever@eecs.umich.edu# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 171693Sstever@eecs.umich.edu# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 181693Sstever@eecs.umich.edu# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 191693Sstever@eecs.umich.edu# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 201693Sstever@eecs.umich.edu# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 211693Sstever@eecs.umich.edu# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 221693Sstever@eecs.umich.edu# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 231693Sstever@eecs.umich.edu# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 241693Sstever@eecs.umich.edu# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 251693Sstever@eecs.umich.edu# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 261693Sstever@eecs.umich.edu# 271693Sstever@eecs.umich.edu# Authors: Ron Dreslinski 281693Sstever@eecs.umich.edu 293358Srdreslin@umich.edu# Splash2 Run Script 303358Srdreslin@umich.edu# 311516SN/A 326654Snate@binkert.orgimport os 336654Snate@binkert.orgimport optparse 346654Snate@binkert.orgimport sys 356654Snate@binkert.org 363358Srdreslin@umich.eduimport m5 373358Srdreslin@umich.edufrom m5.objects import * 386654Snate@binkert.org 393358Srdreslin@umich.edu# -------------------- 403358Srdreslin@umich.edu# Define Command Line Options 413358Srdreslin@umich.edu# ==================== 423358Srdreslin@umich.edu 433358Srdreslin@umich.eduparser = optparse.OptionParser() 443358Srdreslin@umich.edu 453358Srdreslin@umich.eduparser.add_option("-d", "--detailed", action="store_true") 463358Srdreslin@umich.eduparser.add_option("-t", "--timing", action="store_true") 473358Srdreslin@umich.eduparser.add_option("-m", "--maxtick", type="int") 483358Srdreslin@umich.eduparser.add_option("-n", "--numcpus", 493358Srdreslin@umich.edu help="Number of cpus in total", type="int") 503358Srdreslin@umich.eduparser.add_option("-f", "--frequency", 513360Srdreslin@umich.edu default = "1GHz", 523358Srdreslin@umich.edu help="Frequency of each CPU") 533360Srdreslin@umich.eduparser.add_option("--l1size", 543360Srdreslin@umich.edu default = "32kB") 553360Srdreslin@umich.eduparser.add_option("--l1latency", 565255Ssaidi@eecs.umich.edu default = "1ns") 573360Srdreslin@umich.eduparser.add_option("--l2size", 583360Srdreslin@umich.edu default = "256kB") 593360Srdreslin@umich.eduparser.add_option("--l2latency", 605255Ssaidi@eecs.umich.edu default = "10ns") 613358Srdreslin@umich.eduparser.add_option("--rootdir", 624403Srdreslin@umich.edu help="Root directory of Splash2", 633360Srdreslin@umich.edu default="/dist/splash2/codes") 643358Srdreslin@umich.eduparser.add_option("-b", "--benchmark", 653358Srdreslin@umich.edu help="Splash 2 benchmark to run") 663358Srdreslin@umich.edu 673358Srdreslin@umich.edu(options, args) = parser.parse_args() 683358Srdreslin@umich.edu 693358Srdreslin@umich.eduif args: 703358Srdreslin@umich.edu print "Error: script doesn't take any positional arguments" 713358Srdreslin@umich.edu sys.exit(1) 723358Srdreslin@umich.edu 733360Srdreslin@umich.eduif not options.numcpus: 743360Srdreslin@umich.edu print "Specify the number of cpus with -n" 753360Srdreslin@umich.edu sys.exit(1) 763360Srdreslin@umich.edu 773358Srdreslin@umich.edu# -------------------- 783358Srdreslin@umich.edu# Define Splash2 Benchmarks 793358Srdreslin@umich.edu# ==================== 8011851Sbrandon.potter@amd.comclass Cholesky(Process): 814403Srdreslin@umich.edu cwd = options.rootdir + '/kernels/cholesky' 824403Srdreslin@umich.edu executable = options.rootdir + '/kernels/cholesky/CHOLESKY' 835256Ssaidi@eecs.umich.edu cmd = ['CHOLESKY', '-p' + str(options.numcpus), 845255Ssaidi@eecs.umich.edu options.rootdir + '/kernels/cholesky/inputs/tk23.O'] 853358Srdreslin@umich.edu 8611851Sbrandon.potter@amd.comclass FFT(Process): 874403Srdreslin@umich.edu cwd = options.rootdir + '/kernels/fft' 884403Srdreslin@umich.edu executable = options.rootdir + '/kernels/fft/FFT' 895255Ssaidi@eecs.umich.edu cmd = ['FFT', '-p', str(options.numcpus), '-m18'] 903358Srdreslin@umich.edu 9111851Sbrandon.potter@amd.comclass LU_contig(Process): 924403Srdreslin@umich.edu executable = options.rootdir + '/kernels/lu/contiguous_blocks/LU' 935255Ssaidi@eecs.umich.edu cmd = ['LU', '-p', str(options.numcpus)] 944403Srdreslin@umich.edu cwd = options.rootdir + '/kernels/lu/contiguous_blocks' 953358Srdreslin@umich.edu 9611851Sbrandon.potter@amd.comclass LU_noncontig(Process): 974403Srdreslin@umich.edu executable = options.rootdir + '/kernels/lu/non_contiguous_blocks/LU' 985255Ssaidi@eecs.umich.edu cmd = ['LU', '-p', str(options.numcpus)] 994403Srdreslin@umich.edu cwd = options.rootdir + '/kernels/lu/non_contiguous_blocks' 1003358Srdreslin@umich.edu 10111851Sbrandon.potter@amd.comclass Radix(Process): 1024403Srdreslin@umich.edu executable = options.rootdir + '/kernels/radix/RADIX' 1035255Ssaidi@eecs.umich.edu cmd = ['RADIX', '-n524288', '-p', str(options.numcpus)] 1044403Srdreslin@umich.edu cwd = options.rootdir + '/kernels/radix' 1053358Srdreslin@umich.edu 10611851Sbrandon.potter@amd.comclass Barnes(Process): 1074403Srdreslin@umich.edu executable = options.rootdir + '/apps/barnes/BARNES' 1085255Ssaidi@eecs.umich.edu cmd = ['BARNES'] 1094403Srdreslin@umich.edu input = options.rootdir + '/apps/barnes/input.p' + str(options.numcpus) 1104403Srdreslin@umich.edu cwd = options.rootdir + '/apps/barnes' 1113358Srdreslin@umich.edu 11211851Sbrandon.potter@amd.comclass FMM(Process): 1134403Srdreslin@umich.edu executable = options.rootdir + '/apps/fmm/FMM' 1145255Ssaidi@eecs.umich.edu cmd = ['FMM'] 1154403Srdreslin@umich.edu if str(options.numcpus) == '1': 1164403Srdreslin@umich.edu input = options.rootdir + '/apps/fmm/inputs/input.2048' 1174403Srdreslin@umich.edu else: 1183360Srdreslin@umich.edu input = options.rootdir + '/apps/fmm/inputs/input.2048.p' + str(options.numcpus) 1194403Srdreslin@umich.edu cwd = options.rootdir + '/apps/fmm' 1203358Srdreslin@umich.edu 12111851Sbrandon.potter@amd.comclass Ocean_contig(Process): 1224403Srdreslin@umich.edu executable = options.rootdir + '/apps/ocean/contiguous_partitions/OCEAN' 1235255Ssaidi@eecs.umich.edu cmd = ['OCEAN', '-p', str(options.numcpus)] 1244403Srdreslin@umich.edu cwd = options.rootdir + '/apps/ocean/contiguous_partitions' 1253358Srdreslin@umich.edu 12611851Sbrandon.potter@amd.comclass Ocean_noncontig(Process): 1274403Srdreslin@umich.edu executable = options.rootdir + '/apps/ocean/non_contiguous_partitions/OCEAN' 1285255Ssaidi@eecs.umich.edu cmd = ['OCEAN', '-p', str(options.numcpus)] 1294403Srdreslin@umich.edu cwd = options.rootdir + '/apps/ocean/non_contiguous_partitions' 1303358Srdreslin@umich.edu 13111851Sbrandon.potter@amd.comclass Raytrace(Process): 1324403Srdreslin@umich.edu executable = options.rootdir + '/apps/raytrace/RAYTRACE' 1335256Ssaidi@eecs.umich.edu cmd = ['RAYTRACE', '-p' + str(options.numcpus), 1345255Ssaidi@eecs.umich.edu options.rootdir + '/apps/raytrace/inputs/teapot.env'] 1354403Srdreslin@umich.edu cwd = options.rootdir + '/apps/raytrace' 1363358Srdreslin@umich.edu 13711851Sbrandon.potter@amd.comclass Water_nsquared(Process): 1384403Srdreslin@umich.edu executable = options.rootdir + '/apps/water-nsquared/WATER-NSQUARED' 1395255Ssaidi@eecs.umich.edu cmd = ['WATER-NSQUARED'] 1404403Srdreslin@umich.edu if options.numcpus==1: 1414403Srdreslin@umich.edu input = options.rootdir + '/apps/water-nsquared/input' 1424403Srdreslin@umich.edu else: 1433360Srdreslin@umich.edu input = options.rootdir + '/apps/water-nsquared/input.p' + str(options.numcpus) 1444403Srdreslin@umich.edu cwd = options.rootdir + '/apps/water-nsquared' 1453358Srdreslin@umich.edu 14611851Sbrandon.potter@amd.comclass Water_spatial(Process): 1474403Srdreslin@umich.edu executable = options.rootdir + '/apps/water-spatial/WATER-SPATIAL' 1485255Ssaidi@eecs.umich.edu cmd = ['WATER-SPATIAL'] 1494403Srdreslin@umich.edu if options.numcpus==1: 1504403Srdreslin@umich.edu input = options.rootdir + '/apps/water-spatial/input' 1514403Srdreslin@umich.edu else: 1523360Srdreslin@umich.edu input = options.rootdir + '/apps/water-spatial/input.p' + str(options.numcpus) 1534403Srdreslin@umich.edu cwd = options.rootdir + '/apps/water-spatial' 1543358Srdreslin@umich.edu 1553358Srdreslin@umich.edu# -------------------- 1563358Srdreslin@umich.edu# Base L1 Cache Definition 1573358Srdreslin@umich.edu# ==================== 1583358Srdreslin@umich.edu 15911053Sandreas.hansson@arm.comclass L1(Cache): 1603358Srdreslin@umich.edu latency = options.l1latency 1613358Srdreslin@umich.edu mshrs = 12 1623358Srdreslin@umich.edu tgts_per_mshr = 8 1633358Srdreslin@umich.edu 1643358Srdreslin@umich.edu# ---------------------- 1653358Srdreslin@umich.edu# Base L2 Cache Definition 1663358Srdreslin@umich.edu# ---------------------- 1673358Srdreslin@umich.edu 16811053Sandreas.hansson@arm.comclass L2(Cache): 1693358Srdreslin@umich.edu latency = options.l2latency 1703358Srdreslin@umich.edu mshrs = 92 1713358Srdreslin@umich.edu tgts_per_mshr = 16 1723358Srdreslin@umich.edu write_buffers = 8 1733358Srdreslin@umich.edu 1743358Srdreslin@umich.edu# ---------------------- 1753358Srdreslin@umich.edu# Define the cpus 1763358Srdreslin@umich.edu# ---------------------- 1773358Srdreslin@umich.edu 1783358Srdreslin@umich.edubusFrequency = Frequency(options.frequency) 1793358Srdreslin@umich.edu 1803358Srdreslin@umich.eduif options.timing: 1813358Srdreslin@umich.edu cpus = [TimingSimpleCPU(cpu_id = i, 1823358Srdreslin@umich.edu clock=options.frequency) 1833358Srdreslin@umich.edu for i in xrange(options.numcpus)] 1843358Srdreslin@umich.eduelif options.detailed: 1853358Srdreslin@umich.edu cpus = [DerivO3CPU(cpu_id = i, 1863358Srdreslin@umich.edu clock=options.frequency) 1873358Srdreslin@umich.edu for i in xrange(options.numcpus)] 1881516SN/Aelse: 1893358Srdreslin@umich.edu cpus = [AtomicSimpleCPU(cpu_id = i, 1903358Srdreslin@umich.edu clock=options.frequency) 1913358Srdreslin@umich.edu for i in xrange(options.numcpus)] 1921516SN/A 1933358Srdreslin@umich.edu# ---------------------- 1943358Srdreslin@umich.edu# Create a system, and add system wide objects 1953358Srdreslin@umich.edu# ---------------------- 1968931Sandreas.hansson@arm.comsystem = System(cpu = cpus, physmem = SimpleMemory(), 19710720Sandreas.hansson@arm.com membus = SystemXBar(clock = busFrequency)) 1989790Sakash.bagdia@arm.comsystem.clock = '1GHz' 1991516SN/A 20010720Sandreas.hansson@arm.comsystem.toL2bus = L2XBar(clock = busFrequency) 2013358Srdreslin@umich.edusystem.l2 = L2(size = options.l2size, assoc = 8) 2023358Srdreslin@umich.edu 2033358Srdreslin@umich.edu# ---------------------- 2043358Srdreslin@umich.edu# Connect the L2 cache and memory together 2053358Srdreslin@umich.edu# ---------------------- 2063358Srdreslin@umich.edu 2078847Sandreas.hansson@arm.comsystem.physmem.port = system.membus.master 2088847Sandreas.hansson@arm.comsystem.l2.cpu_side = system.toL2bus.master 2098847Sandreas.hansson@arm.comsystem.l2.mem_side = system.membus.slave 2108847Sandreas.hansson@arm.comsystem.system_port = system.membus.slave 2113358Srdreslin@umich.edu 2123358Srdreslin@umich.edu# ---------------------- 2133358Srdreslin@umich.edu# Connect the L2 cache and clusters together 2143358Srdreslin@umich.edu# ---------------------- 2153358Srdreslin@umich.edufor cpu in cpus: 2163358Srdreslin@umich.edu cpu.addPrivateSplitL1Caches(L1(size = options.l1size, assoc = 1), 2173358Srdreslin@umich.edu L1(size = options.l1size, assoc = 4)) 2183358Srdreslin@umich.edu # connect cpu level-1 caches to shared level-2 cache 2197876Sgblack@eecs.umich.edu cpu.connectAllPorts(system.toL2bus, system.membus) 2203358Srdreslin@umich.edu 2213358Srdreslin@umich.edu 2223358Srdreslin@umich.edu# ---------------------- 2233358Srdreslin@umich.edu# Define the root 2243358Srdreslin@umich.edu# ---------------------- 2253358Srdreslin@umich.edu 2268801Sgblack@eecs.umich.eduroot = Root(full_system = False, system = system) 2273358Srdreslin@umich.edu 2283358Srdreslin@umich.edu# -------------------- 2293358Srdreslin@umich.edu# Pick the correct Splash2 Benchmarks 2303358Srdreslin@umich.edu# ==================== 2313358Srdreslin@umich.eduif options.benchmark == 'Cholesky': 2323358Srdreslin@umich.edu root.workload = Cholesky() 2333358Srdreslin@umich.eduelif options.benchmark == 'FFT': 2343358Srdreslin@umich.edu root.workload = FFT() 2353358Srdreslin@umich.eduelif options.benchmark == 'LUContig': 2363358Srdreslin@umich.edu root.workload = LU_contig() 2373358Srdreslin@umich.eduelif options.benchmark == 'LUNoncontig': 2383358Srdreslin@umich.edu root.workload = LU_noncontig() 2393358Srdreslin@umich.eduelif options.benchmark == 'Radix': 2403358Srdreslin@umich.edu root.workload = Radix() 2413358Srdreslin@umich.eduelif options.benchmark == 'Barnes': 2423358Srdreslin@umich.edu root.workload = Barnes() 2433358Srdreslin@umich.eduelif options.benchmark == 'FMM': 2443358Srdreslin@umich.edu root.workload = FMM() 2453358Srdreslin@umich.eduelif options.benchmark == 'OceanContig': 2463358Srdreslin@umich.edu root.workload = Ocean_contig() 2473358Srdreslin@umich.eduelif options.benchmark == 'OceanNoncontig': 2483358Srdreslin@umich.edu root.workload = Ocean_noncontig() 2493358Srdreslin@umich.eduelif options.benchmark == 'Raytrace': 2503358Srdreslin@umich.edu root.workload = Raytrace() 2513358Srdreslin@umich.eduelif options.benchmark == 'WaterNSquared': 2523358Srdreslin@umich.edu root.workload = Water_nsquared() 2533358Srdreslin@umich.eduelif options.benchmark == 'WaterSpatial': 2543358Srdreslin@umich.edu root.workload = Water_spatial() 2551516SN/Aelse: 2565256Ssaidi@eecs.umich.edu print >> sys.stderr, """The --benchmark environment variable was set to something improper. 2575256Ssaidi@eecs.umich.eduUse Cholesky, FFT, LUContig, LUNoncontig, Radix, Barnes, FMM, OceanContig, 2585256Ssaidi@eecs.umich.eduOceanNoncontig, Raytrace, WaterNSquared, or WaterSpatial""" 2595256Ssaidi@eecs.umich.edu sys.exit(1) 2603358Srdreslin@umich.edu 2613358Srdreslin@umich.edu# -------------------- 2623358Srdreslin@umich.edu# Assign the workload to the cpus 2633358Srdreslin@umich.edu# ==================== 2643358Srdreslin@umich.edu 2653358Srdreslin@umich.edufor cpu in cpus: 2663358Srdreslin@umich.edu cpu.workload = root.workload 2673358Srdreslin@umich.edu 2683358Srdreslin@umich.edu# ---------------------- 2693358Srdreslin@umich.edu# Run the simulation 2703358Srdreslin@umich.edu# ---------------------- 2713358Srdreslin@umich.edu 2723358Srdreslin@umich.eduif options.timing or options.detailed: 2733358Srdreslin@umich.edu root.system.mem_mode = 'timing' 2743358Srdreslin@umich.edu 2753358Srdreslin@umich.edu# instantiate configuration 2767525Ssteve.reinhardt@amd.comm5.instantiate() 2773358Srdreslin@umich.edu 2783358Srdreslin@umich.edu# simulate until program terminates 2793358Srdreslin@umich.eduif options.maxtick: 2803358Srdreslin@umich.edu exit_event = m5.simulate(options.maxtick) 2813358Srdreslin@umich.eduelse: 2823646Srdreslin@umich.edu exit_event = m5.simulate(m5.MaxTick) 2833358Srdreslin@umich.edu 2843358Srdreslin@umich.eduprint 'Exiting @ tick', m5.curTick(), 'because', exit_event.getCause() 2853358Srdreslin@umich.edu 286