Ruby.py revision 10116:d61a59beb670 
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13# Copyright (c) 2006-2007 The Regents of The University of Michigan
14# Copyright (c) 2009 Advanced Micro Devices, Inc.
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40# Authors: Brad Beckmann
41
42import math
43import m5
44from m5.objects import *
45from m5.defines import buildEnv
46
47def define_options(parser):
48    # By default, ruby uses the simple timing cpu
49    parser.set_defaults(cpu_type="timing")
50
51    parser.add_option("--ruby-clock", action="store", type="string",
52                      default='2GHz',
53                      help="Clock for blocks running at Ruby system's speed")
54
55    # Options related to cache structure
56    parser.add_option("--ports", action="store", type="int", default=4,
57                      help="used of transitions per cycle which is a proxy \
58                            for the number of ports.")
59
60    # ruby network options
61    parser.add_option("--topology", type="string", default="Crossbar",
62                 help="check src/mem/ruby/network/topologies for complete set")
63    parser.add_option("--mesh-rows", type="int", default=1,
64                      help="the number of rows in the mesh topology")
65    parser.add_option("--garnet-network", type="choice",
66                      choices=['fixed', 'flexible'], help="'fixed'|'flexible'")
67    parser.add_option("--network-fault-model", action="store_true", default=False,
68                      help="enable network fault model: see src/mem/ruby/network/fault_model/")
69
70    # ruby mapping options
71    parser.add_option("--numa-high-bit", type="int", default=0,
72                      help="high order address bit to use for numa mapping. " \
73                           "0 = highest bit, not specified = lowest bit")
74
75    # ruby sparse memory options
76    parser.add_option("--use-map", action="store_true", default=False)
77    parser.add_option("--map-levels", type="int", default=4)
78
79    parser.add_option("--recycle-latency", type="int", default=10,
80                      help="Recycle latency for ruby controller input buffers")
81
82    parser.add_option("--random_seed", type="int", default=1234,
83                      help="Used for seeding the random number generator")
84
85    parser.add_option("--ruby_stats", type="string", default="ruby.stats")
86
87    protocol = buildEnv['PROTOCOL']
88    exec "import %s" % protocol
89    eval("%s.define_options(parser)" % protocol)
90
91def create_topology(controllers, options):
92    """ Called from create_system in configs/ruby/<protocol>.py
93        Must return an object which is a subclass of BaseTopology
94        found in configs/topologies/BaseTopology.py
95        This is a wrapper for the legacy topologies.
96    """
97    exec "import %s as Topo" % options.topology
98    topology = eval("Topo.%s(controllers)" % options.topology)
99    return topology
100
101def create_system(options, system, piobus = None, dma_ports = []):
102
103    system.ruby = RubySystem(no_mem_vec = options.use_map)
104    ruby = system.ruby
105
106    protocol = buildEnv['PROTOCOL']
107    exec "import %s" % protocol
108    try:
109        (cpu_sequencers, dir_cntrls, topology) = \
110             eval("%s.create_system(options, system, dma_ports, ruby)"
111                  % protocol)
112    except:
113        print "Error: could not create sytem for ruby protocol %s" % protocol
114        raise
115
116    # Create a port proxy for connecting the system port. This is
117    # independent of the protocol and kept in the protocol-agnostic
118    # part (i.e. here).
119    sys_port_proxy = RubyPortProxy(ruby_system = ruby)
120    # Give the system port proxy a SimObject parent without creating a
121    # full-fledged controller
122    system.sys_port_proxy = sys_port_proxy
123
124    # Connect the system port for loading of binaries etc
125    system.system_port = system.sys_port_proxy.slave
126
127
128    #
129    # Set the network classes based on the command line options
130    #
131    if options.garnet_network == "fixed":
132        class NetworkClass(GarnetNetwork_d): pass
133        class IntLinkClass(GarnetIntLink_d): pass
134        class ExtLinkClass(GarnetExtLink_d): pass
135        class RouterClass(GarnetRouter_d): pass
136    elif options.garnet_network == "flexible":
137        class NetworkClass(GarnetNetwork): pass
138        class IntLinkClass(GarnetIntLink): pass
139        class ExtLinkClass(GarnetExtLink): pass
140        class RouterClass(GarnetRouter): pass
141    else:
142        class NetworkClass(SimpleNetwork): pass
143        class IntLinkClass(SimpleIntLink): pass
144        class ExtLinkClass(SimpleExtLink): pass
145        class RouterClass(Switch): pass
146
147
148    # Create the network topology
149    network = NetworkClass(ruby_system = ruby, topology = topology.description,
150                           routers = [], ext_links = [], int_links = [])
151    topology.makeTopology(options, network, IntLinkClass, ExtLinkClass,
152                          RouterClass)
153
154    if options.network_fault_model:
155        assert(options.garnet_network == "fixed")
156        network.enable_fault_model = True
157        network.fault_model = FaultModel()
158
159    #
160    # Loop through the directory controlers.
161    # Determine the total memory size of the ruby system and verify it is equal
162    # to physmem.  However, if Ruby memory is using sparse memory in SE
163    # mode, then the system should not back-up the memory state with
164    # the Memory Vector and thus the memory size bytes should stay at 0.
165    # Also set the numa bits to the appropriate values.
166    #
167    total_mem_size = MemorySize('0B')
168
169    ruby.block_size_bytes = options.cacheline_size
170    block_size_bits = int(math.log(options.cacheline_size, 2))
171
172    if options.numa_high_bit:
173        numa_bit = options.numa_high_bit
174    else:
175        # if the numa_bit is not specified, set the directory bits as the
176        # lowest bits above the block offset bits, and the numa_bit as the
177        # highest of those directory bits
178        dir_bits = int(math.log(options.num_dirs, 2))
179        numa_bit = block_size_bits + dir_bits - 1
180
181    for dir_cntrl in dir_cntrls:
182        total_mem_size.value += dir_cntrl.directory.size.value
183        dir_cntrl.directory.numa_high_bit = numa_bit
184
185    phys_mem_size = sum(map(lambda r: r.size(), system.mem_ranges))
186    assert(total_mem_size.value == phys_mem_size)
187
188    ruby.network = network
189    ruby.mem_size = total_mem_size
190
191    # Connect the cpu sequencers and the piobus
192    if piobus != None:
193        for cpu_seq in cpu_sequencers:
194            cpu_seq.pio_master_port = piobus.slave
195            cpu_seq.mem_master_port = piobus.slave
196
197            if buildEnv['TARGET_ISA'] == "x86":
198                cpu_seq.pio_slave_port = piobus.master
199
200    ruby._cpu_ruby_ports = cpu_sequencers
201    ruby.num_of_sequencers = len(cpu_sequencers)
202    ruby.random_seed    = options.random_seed
203