MOESI_CMP_token.py revision 9154
16908SBrad.Beckmann@amd.com# Copyright (c) 2006-2007 The Regents of The University of Michigan 26908SBrad.Beckmann@amd.com# Copyright (c) 2009 Advanced Micro Devices, Inc. 36908SBrad.Beckmann@amd.com# All rights reserved. 46908SBrad.Beckmann@amd.com# 56908SBrad.Beckmann@amd.com# Redistribution and use in source and binary forms, with or without 66908SBrad.Beckmann@amd.com# modification, are permitted provided that the following conditions are 76908SBrad.Beckmann@amd.com# met: redistributions of source code must retain the above copyright 86908SBrad.Beckmann@amd.com# notice, this list of conditions and the following disclaimer; 96908SBrad.Beckmann@amd.com# redistributions in binary form must reproduce the above copyright 106908SBrad.Beckmann@amd.com# notice, this list of conditions and the following disclaimer in the 116908SBrad.Beckmann@amd.com# documentation and/or other materials provided with the distribution; 126908SBrad.Beckmann@amd.com# neither the name of the copyright holders nor the names of its 136908SBrad.Beckmann@amd.com# contributors may be used to endorse or promote products derived from 146908SBrad.Beckmann@amd.com# this software without specific prior written permission. 156908SBrad.Beckmann@amd.com# 166908SBrad.Beckmann@amd.com# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 176908SBrad.Beckmann@amd.com# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 186908SBrad.Beckmann@amd.com# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 196908SBrad.Beckmann@amd.com# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 206908SBrad.Beckmann@amd.com# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 216908SBrad.Beckmann@amd.com# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 226908SBrad.Beckmann@amd.com# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 236908SBrad.Beckmann@amd.com# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 246908SBrad.Beckmann@amd.com# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 256908SBrad.Beckmann@amd.com# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 266908SBrad.Beckmann@amd.com# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 276908SBrad.Beckmann@amd.com# 286908SBrad.Beckmann@amd.com# Authors: Brad Beckmann 296908SBrad.Beckmann@amd.com 306908SBrad.Beckmann@amd.comimport math 316908SBrad.Beckmann@amd.comimport m5 326908SBrad.Beckmann@amd.comfrom m5.objects import * 336908SBrad.Beckmann@amd.comfrom m5.defines import buildEnv 349100SBrad.Beckmann@amd.comfrom Ruby import create_topology 356908SBrad.Beckmann@amd.com 366908SBrad.Beckmann@amd.com# 376908SBrad.Beckmann@amd.com# Note: the L1 Cache latency is only used by the sequencer on fast path hits 386908SBrad.Beckmann@amd.com# 396908SBrad.Beckmann@amd.comclass L1Cache(RubyCache): 407551SBrad.Beckmann@amd.com latency = 2 416908SBrad.Beckmann@amd.com 426908SBrad.Beckmann@amd.com# 436908SBrad.Beckmann@amd.com# Note: the L2 Cache latency is not currently used 446908SBrad.Beckmann@amd.com# 456908SBrad.Beckmann@amd.comclass L2Cache(RubyCache): 467551SBrad.Beckmann@amd.com latency = 10 476908SBrad.Beckmann@amd.com 487538SBrad.Beckmann@amd.comdef define_options(parser): 497539SBrad.Beckmann@amd.com parser.add_option("--l1-retries", type="int", default=1, 507539SBrad.Beckmann@amd.com help="Token_CMP: # of l1 retries before going persistent") 517539SBrad.Beckmann@amd.com parser.add_option("--timeout-latency", type="int", default=300, 527539SBrad.Beckmann@amd.com help="Token_CMP: cycles until issuing again"); 537539SBrad.Beckmann@amd.com parser.add_option("--disable-dyn-timeouts", action="store_true", 547539SBrad.Beckmann@amd.com help="Token_CMP: disable dyanimc timeouts, use fixed latency instead") 557561SBrad.Beckmann@amd.com parser.add_option("--allow-atomic-migration", action="store_true", 567561SBrad.Beckmann@amd.com help="allow migratory sharing for atomic only accessed blocks") 577561SBrad.Beckmann@amd.com 588929Snilay@cs.wisc.edudef create_system(options, system, piobus, dma_ports, ruby_system): 596908SBrad.Beckmann@amd.com 606908SBrad.Beckmann@amd.com if buildEnv['PROTOCOL'] != 'MOESI_CMP_token': 616908SBrad.Beckmann@amd.com panic("This script requires the MOESI_CMP_token protocol to be built.") 626908SBrad.Beckmann@amd.com 636908SBrad.Beckmann@amd.com # 646908SBrad.Beckmann@amd.com # number of tokens that the owner passes to requests so that shared blocks can 656908SBrad.Beckmann@amd.com # respond to read requests 666908SBrad.Beckmann@amd.com # 676908SBrad.Beckmann@amd.com n_tokens = options.num_cpus + 1 686908SBrad.Beckmann@amd.com 696908SBrad.Beckmann@amd.com cpu_sequencers = [] 706908SBrad.Beckmann@amd.com 716908SBrad.Beckmann@amd.com # 726908SBrad.Beckmann@amd.com # The ruby network creation expects the list of nodes in the system to be 736908SBrad.Beckmann@amd.com # consistent with the NetDest list. Therefore the l1 controller nodes must be 746908SBrad.Beckmann@amd.com # listed before the directory nodes and directory nodes before dma nodes, etc. 756908SBrad.Beckmann@amd.com # 766908SBrad.Beckmann@amd.com l1_cntrl_nodes = [] 776908SBrad.Beckmann@amd.com l2_cntrl_nodes = [] 786908SBrad.Beckmann@amd.com dir_cntrl_nodes = [] 796908SBrad.Beckmann@amd.com dma_cntrl_nodes = [] 806908SBrad.Beckmann@amd.com 816908SBrad.Beckmann@amd.com # 826908SBrad.Beckmann@amd.com # Must create the individual controllers before the network to ensure the 836908SBrad.Beckmann@amd.com # controller constructors are called before the network constructor 846908SBrad.Beckmann@amd.com # 857564SBrad.Beckmann@amd.com l2_bits = int(math.log(options.num_l2caches, 2)) 868180SBrad.Beckmann@amd.com block_size_bits = int(math.log(options.cacheline_size, 2)) 876908SBrad.Beckmann@amd.com 888257SBrad.Beckmann@amd.com cntrl_count = 0 898257SBrad.Beckmann@amd.com 906908SBrad.Beckmann@amd.com for i in xrange(options.num_cpus): 916908SBrad.Beckmann@amd.com # 926908SBrad.Beckmann@amd.com # First create the Ruby objects associated with this cpu 936908SBrad.Beckmann@amd.com # 946908SBrad.Beckmann@amd.com l1i_cache = L1Cache(size = options.l1i_size, 958180SBrad.Beckmann@amd.com assoc = options.l1i_assoc, 968180SBrad.Beckmann@amd.com start_index_bit = block_size_bits) 976908SBrad.Beckmann@amd.com l1d_cache = L1Cache(size = options.l1d_size, 988180SBrad.Beckmann@amd.com assoc = options.l1d_assoc, 998180SBrad.Beckmann@amd.com start_index_bit = block_size_bits) 1006908SBrad.Beckmann@amd.com 1016908SBrad.Beckmann@amd.com l1_cntrl = L1Cache_Controller(version = i, 1028257SBrad.Beckmann@amd.com cntrl_id = cntrl_count, 1036908SBrad.Beckmann@amd.com L1IcacheMemory = l1i_cache, 1046908SBrad.Beckmann@amd.com L1DcacheMemory = l1d_cache, 1057564SBrad.Beckmann@amd.com l2_select_num_bits = l2_bits, 1067539SBrad.Beckmann@amd.com N_tokens = n_tokens, 1077541SBrad.Beckmann@amd.com retry_threshold = \ 1087541SBrad.Beckmann@amd.com options.l1_retries, 1097539SBrad.Beckmann@amd.com fixed_timeout_latency = \ 1107539SBrad.Beckmann@amd.com options.timeout_latency, 1117539SBrad.Beckmann@amd.com dynamic_timeout_enabled = \ 1127561SBrad.Beckmann@amd.com not options.disable_dyn_timeouts, 1137561SBrad.Beckmann@amd.com no_mig_atomic = not \ 1148436SBrad.Beckmann@amd.com options.allow_atomic_migration, 1158717Snilay@cs.wisc.edu send_evictions = ( 1168717Snilay@cs.wisc.edu options.cpu_type == "detailed"), 1178436SBrad.Beckmann@amd.com ruby_system = ruby_system) 1187539SBrad.Beckmann@amd.com 1198322Ssteve.reinhardt@amd.com cpu_seq = RubySequencer(version = i, 1208322Ssteve.reinhardt@amd.com icache = l1i_cache, 1218322Ssteve.reinhardt@amd.com dcache = l1d_cache, 1228436SBrad.Beckmann@amd.com ruby_system = ruby_system) 1238322Ssteve.reinhardt@amd.com 1248322Ssteve.reinhardt@amd.com l1_cntrl.sequencer = cpu_seq 1258322Ssteve.reinhardt@amd.com 1268322Ssteve.reinhardt@amd.com if piobus != None: 1278845Sandreas.hansson@arm.com cpu_seq.pio_port = piobus.slave 1288322Ssteve.reinhardt@amd.com 1297541SBrad.Beckmann@amd.com exec("system.l1_cntrl%d = l1_cntrl" % i) 1306908SBrad.Beckmann@amd.com # 1316908SBrad.Beckmann@amd.com # Add controllers and sequencers to the appropriate lists 1326908SBrad.Beckmann@amd.com # 1336908SBrad.Beckmann@amd.com cpu_sequencers.append(cpu_seq) 1346908SBrad.Beckmann@amd.com l1_cntrl_nodes.append(l1_cntrl) 1356908SBrad.Beckmann@amd.com 1368257SBrad.Beckmann@amd.com cntrl_count += 1 1378257SBrad.Beckmann@amd.com 1388180SBrad.Beckmann@amd.com l2_index_start = block_size_bits + l2_bits 1398180SBrad.Beckmann@amd.com 1406908SBrad.Beckmann@amd.com for i in xrange(options.num_l2caches): 1416908SBrad.Beckmann@amd.com # 1426908SBrad.Beckmann@amd.com # First create the Ruby objects associated with this cpu 1436908SBrad.Beckmann@amd.com # 1446908SBrad.Beckmann@amd.com l2_cache = L2Cache(size = options.l2_size, 1457564SBrad.Beckmann@amd.com assoc = options.l2_assoc, 1468180SBrad.Beckmann@amd.com start_index_bit = l2_index_start) 1476908SBrad.Beckmann@amd.com 1486908SBrad.Beckmann@amd.com l2_cntrl = L2Cache_Controller(version = i, 1498257SBrad.Beckmann@amd.com cntrl_id = cntrl_count, 1506908SBrad.Beckmann@amd.com L2cacheMemory = l2_cache, 1518436SBrad.Beckmann@amd.com N_tokens = n_tokens, 1528436SBrad.Beckmann@amd.com ruby_system = ruby_system) 1536908SBrad.Beckmann@amd.com 1547541SBrad.Beckmann@amd.com exec("system.l2_cntrl%d = l2_cntrl" % i) 1556908SBrad.Beckmann@amd.com l2_cntrl_nodes.append(l2_cntrl) 1568257SBrad.Beckmann@amd.com 1578257SBrad.Beckmann@amd.com cntrl_count += 1 1586908SBrad.Beckmann@amd.com 1598931Sandreas.hansson@arm.com phys_mem_size = 0 1608931Sandreas.hansson@arm.com for mem in system.memories.unproxy(system): 1618931Sandreas.hansson@arm.com phys_mem_size += long(mem.range.second) - long(mem.range.first) + 1 1626908SBrad.Beckmann@amd.com mem_module_size = phys_mem_size / options.num_dirs 1636908SBrad.Beckmann@amd.com 1646908SBrad.Beckmann@amd.com for i in xrange(options.num_dirs): 1656908SBrad.Beckmann@amd.com # 1666908SBrad.Beckmann@amd.com # Create the Ruby objects associated with the directory controller 1676908SBrad.Beckmann@amd.com # 1686908SBrad.Beckmann@amd.com 1699154Spower.jg@gmail.com mem_cntrl = RubyMemoryControl(version = i, 1709154Spower.jg@gmail.com ruby_system = ruby_system) 1716908SBrad.Beckmann@amd.com 1726908SBrad.Beckmann@amd.com dir_size = MemorySize('0B') 1736908SBrad.Beckmann@amd.com dir_size.value = mem_module_size 1746908SBrad.Beckmann@amd.com 1756908SBrad.Beckmann@amd.com dir_cntrl = Directory_Controller(version = i, 1768257SBrad.Beckmann@amd.com cntrl_id = cntrl_count, 1776908SBrad.Beckmann@amd.com directory = \ 1786908SBrad.Beckmann@amd.com RubyDirectoryMemory(version = i, 1798436SBrad.Beckmann@amd.com size = dir_size), 1806908SBrad.Beckmann@amd.com memBuffer = mem_cntrl, 1818436SBrad.Beckmann@amd.com l2_select_num_bits = l2_bits, 1828436SBrad.Beckmann@amd.com ruby_system = ruby_system) 1836908SBrad.Beckmann@amd.com 1847541SBrad.Beckmann@amd.com exec("system.dir_cntrl%d = dir_cntrl" % i) 1856908SBrad.Beckmann@amd.com dir_cntrl_nodes.append(dir_cntrl) 1866908SBrad.Beckmann@amd.com 1878257SBrad.Beckmann@amd.com cntrl_count += 1 1888257SBrad.Beckmann@amd.com 1898929Snilay@cs.wisc.edu for i, dma_port in enumerate(dma_ports): 1906908SBrad.Beckmann@amd.com # 1916908SBrad.Beckmann@amd.com # Create the Ruby objects associated with the dma controller 1926908SBrad.Beckmann@amd.com # 1936908SBrad.Beckmann@amd.com dma_seq = DMASequencer(version = i, 1948477Snilay@cs.wisc.edu ruby_system = ruby_system) 1956908SBrad.Beckmann@amd.com 1966908SBrad.Beckmann@amd.com dma_cntrl = DMA_Controller(version = i, 1978257SBrad.Beckmann@amd.com cntrl_id = cntrl_count, 1988477Snilay@cs.wisc.edu dma_sequencer = dma_seq, 1998477Snilay@cs.wisc.edu ruby_system = ruby_system) 2006908SBrad.Beckmann@amd.com 2017541SBrad.Beckmann@amd.com exec("system.dma_cntrl%d = dma_cntrl" % i) 2028929Snilay@cs.wisc.edu exec("system.dma_cntrl%d.dma_sequencer.slave = dma_port" % i) 2036908SBrad.Beckmann@amd.com dma_cntrl_nodes.append(dma_cntrl) 2048257SBrad.Beckmann@amd.com cntrl_count += 1 2058257SBrad.Beckmann@amd.com 2066908SBrad.Beckmann@amd.com all_cntrls = l1_cntrl_nodes + \ 2076908SBrad.Beckmann@amd.com l2_cntrl_nodes + \ 2086908SBrad.Beckmann@amd.com dir_cntrl_nodes + \ 2096908SBrad.Beckmann@amd.com dma_cntrl_nodes 2106908SBrad.Beckmann@amd.com 2119100SBrad.Beckmann@amd.com topology = create_topology(all_cntrls, options) 2129100SBrad.Beckmann@amd.com 2139100SBrad.Beckmann@amd.com return (cpu_sequencers, dir_cntrl_nodes, topology) 214