112647Santhony.gutierrez@amd.com# Copyright (c) 2011-2015 Advanced Micro Devices, Inc.
212647Santhony.gutierrez@amd.com# All rights reserved.
311308Santhony.gutierrez@amd.com#
412647Santhony.gutierrez@amd.com# For use for simulation and test purposes only
511308Santhony.gutierrez@amd.com#
612647Santhony.gutierrez@amd.com# Redistribution and use in source and binary forms, with or without
712647Santhony.gutierrez@amd.com# modification, are permitted provided that the following conditions are met:
811308Santhony.gutierrez@amd.com#
912647Santhony.gutierrez@amd.com# 1. Redistributions of source code must retain the above copyright notice,
1012647Santhony.gutierrez@amd.com# this list of conditions and the following disclaimer.
1111308Santhony.gutierrez@amd.com#
1212647Santhony.gutierrez@amd.com# 2. Redistributions in binary form must reproduce the above copyright notice,
1312647Santhony.gutierrez@amd.com# this list of conditions and the following disclaimer in the documentation
1412647Santhony.gutierrez@amd.com# and/or other materials provided with the distribution.
1511308Santhony.gutierrez@amd.com#
1612647Santhony.gutierrez@amd.com# 3. Neither the name of the copyright holder nor the names of its
1712647Santhony.gutierrez@amd.com# contributors may be used to endorse or promote products derived from this
1812647Santhony.gutierrez@amd.com# software without specific prior written permission.
1911308Santhony.gutierrez@amd.com#
2012647Santhony.gutierrez@amd.com# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
2112647Santhony.gutierrez@amd.com# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
2212647Santhony.gutierrez@amd.com# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
2312647Santhony.gutierrez@amd.com# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
2412647Santhony.gutierrez@amd.com# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
2512647Santhony.gutierrez@amd.com# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
2612647Santhony.gutierrez@amd.com# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
2712647Santhony.gutierrez@amd.com# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
2812647Santhony.gutierrez@amd.com# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
2912647Santhony.gutierrez@amd.com# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
3012647Santhony.gutierrez@amd.com# POSSIBILITY OF SUCH DAMAGE.
3111308Santhony.gutierrez@amd.com#
3212647Santhony.gutierrez@amd.com# Authors: Lisa Hsu
3311308Santhony.gutierrez@amd.com
3411308Santhony.gutierrez@amd.comimport math
3511308Santhony.gutierrez@amd.comimport m5
3611308Santhony.gutierrez@amd.comfrom m5.objects import *
3711308Santhony.gutierrez@amd.comfrom m5.defines import buildEnv
3813400Sodanrc@yahoo.com.brfrom m5.util import addToPath
3911308Santhony.gutierrez@amd.comfrom Ruby import create_topology
4011308Santhony.gutierrez@amd.comfrom Ruby import send_evicts
4111308Santhony.gutierrez@amd.com
4213400Sodanrc@yahoo.com.braddToPath('../')
4313400Sodanrc@yahoo.com.br
4411670Sandreas.hansson@arm.comfrom topologies.Cluster import Cluster
4511670Sandreas.hansson@arm.comfrom topologies.Crossbar import Crossbar
4611308Santhony.gutierrez@amd.com
4711308Santhony.gutierrez@amd.comclass CntrlBase:
4811308Santhony.gutierrez@amd.com    _seqs = 0
4911308Santhony.gutierrez@amd.com    @classmethod
5011308Santhony.gutierrez@amd.com    def seqCount(cls):
5111308Santhony.gutierrez@amd.com        # Use SeqCount not class since we need global count
5211308Santhony.gutierrez@amd.com        CntrlBase._seqs += 1
5311308Santhony.gutierrez@amd.com        return CntrlBase._seqs - 1
5411308Santhony.gutierrez@amd.com
5511308Santhony.gutierrez@amd.com    _cntrls = 0
5611308Santhony.gutierrez@amd.com    @classmethod
5711308Santhony.gutierrez@amd.com    def cntrlCount(cls):
5811308Santhony.gutierrez@amd.com        # Use CntlCount not class since we need global count
5911308Santhony.gutierrez@amd.com        CntrlBase._cntrls += 1
6011308Santhony.gutierrez@amd.com        return CntrlBase._cntrls - 1
6111308Santhony.gutierrez@amd.com
6211308Santhony.gutierrez@amd.com    _version = 0
6311308Santhony.gutierrez@amd.com    @classmethod
6411308Santhony.gutierrez@amd.com    def versionCount(cls):
6511308Santhony.gutierrez@amd.com        cls._version += 1 # Use count for this particular type
6611308Santhony.gutierrez@amd.com        return cls._version - 1
6711308Santhony.gutierrez@amd.com
6811308Santhony.gutierrez@amd.comclass L1Cache(RubyCache):
6911308Santhony.gutierrez@amd.com    resourceStalls = False
7011308Santhony.gutierrez@amd.com    dataArrayBanks = 2
7111308Santhony.gutierrez@amd.com    tagArrayBanks = 2
7211308Santhony.gutierrez@amd.com    dataAccessLatency = 1
7311308Santhony.gutierrez@amd.com    tagAccessLatency = 1
7411308Santhony.gutierrez@amd.com    def create(self, size, assoc, options):
7511308Santhony.gutierrez@amd.com        self.size = MemorySize(size)
7611308Santhony.gutierrez@amd.com        self.assoc = assoc
7711308Santhony.gutierrez@amd.com        self.replacement_policy = PseudoLRUReplacementPolicy()
7811308Santhony.gutierrez@amd.com
7911308Santhony.gutierrez@amd.comclass L2Cache(RubyCache):
8011308Santhony.gutierrez@amd.com    resourceStalls = False
8111308Santhony.gutierrez@amd.com    assoc = 16
8211308Santhony.gutierrez@amd.com    dataArrayBanks = 16
8311308Santhony.gutierrez@amd.com    tagArrayBanks = 16
8411308Santhony.gutierrez@amd.com    def create(self, size, assoc, options):
8511308Santhony.gutierrez@amd.com        self.size = MemorySize(size)
8611308Santhony.gutierrez@amd.com        self.assoc = assoc
8711308Santhony.gutierrez@amd.com        self.replacement_policy = PseudoLRUReplacementPolicy()
8811308Santhony.gutierrez@amd.com
8911308Santhony.gutierrez@amd.comclass CPCntrl(CorePair_Controller, CntrlBase):
9011308Santhony.gutierrez@amd.com
9111308Santhony.gutierrez@amd.com    def create(self, options, ruby_system, system):
9211308Santhony.gutierrez@amd.com        self.version = self.versionCount()
9311308Santhony.gutierrez@amd.com
9411308Santhony.gutierrez@amd.com        self.L1Icache = L1Cache()
9511308Santhony.gutierrez@amd.com        self.L1Icache.create(options.l1i_size, options.l1i_assoc, options)
9611308Santhony.gutierrez@amd.com        self.L1D0cache = L1Cache()
9711308Santhony.gutierrez@amd.com        self.L1D0cache.create(options.l1d_size, options.l1d_assoc, options)
9811308Santhony.gutierrez@amd.com        self.L1D1cache = L1Cache()
9911308Santhony.gutierrez@amd.com        self.L1D1cache.create(options.l1d_size, options.l1d_assoc, options)
10011308Santhony.gutierrez@amd.com        self.L2cache = L2Cache()
10111308Santhony.gutierrez@amd.com        self.L2cache.create(options.l2_size, options.l2_assoc, options)
10211308Santhony.gutierrez@amd.com
10311308Santhony.gutierrez@amd.com        self.sequencer = RubySequencer()
10411308Santhony.gutierrez@amd.com        self.sequencer.version = self.seqCount()
10511308Santhony.gutierrez@amd.com        self.sequencer.icache = self.L1Icache
10611308Santhony.gutierrez@amd.com        self.sequencer.dcache = self.L1D0cache
10711308Santhony.gutierrez@amd.com        self.sequencer.ruby_system = ruby_system
10811308Santhony.gutierrez@amd.com        self.sequencer.coreid = 0
10911308Santhony.gutierrez@amd.com        self.sequencer.is_cpu_sequencer = True
11011308Santhony.gutierrez@amd.com
11111308Santhony.gutierrez@amd.com        self.sequencer1 = RubySequencer()
11211308Santhony.gutierrez@amd.com        self.sequencer1.version = self.seqCount()
11311308Santhony.gutierrez@amd.com        self.sequencer1.icache = self.L1Icache
11411308Santhony.gutierrez@amd.com        self.sequencer1.dcache = self.L1D1cache
11511308Santhony.gutierrez@amd.com        self.sequencer1.ruby_system = ruby_system
11611308Santhony.gutierrez@amd.com        self.sequencer1.coreid = 1
11711308Santhony.gutierrez@amd.com        self.sequencer1.is_cpu_sequencer = True
11811308Santhony.gutierrez@amd.com
11911308Santhony.gutierrez@amd.com        self.issue_latency = options.cpu_to_dir_latency
12011308Santhony.gutierrez@amd.com        self.send_evictions = send_evicts(options)
12111308Santhony.gutierrez@amd.com
12211308Santhony.gutierrez@amd.com        self.ruby_system = ruby_system
12311308Santhony.gutierrez@amd.com
12411308Santhony.gutierrez@amd.com        if options.recycle_latency:
12511308Santhony.gutierrez@amd.com            self.recycle_latency = options.recycle_latency
12611308Santhony.gutierrez@amd.com
12711308Santhony.gutierrez@amd.comclass TCPCache(RubyCache):
12811308Santhony.gutierrez@amd.com    size = "16kB"
12911308Santhony.gutierrez@amd.com    assoc = 16
13011308Santhony.gutierrez@amd.com    dataArrayBanks = 16 #number of data banks
13111308Santhony.gutierrez@amd.com    tagArrayBanks = 16  #number of tag banks
13211308Santhony.gutierrez@amd.com    dataAccessLatency = 4
13311308Santhony.gutierrez@amd.com    tagAccessLatency = 1
13411308Santhony.gutierrez@amd.com    def create(self, options):
13511308Santhony.gutierrez@amd.com        self.size = MemorySize(options.tcp_size)
13611308Santhony.gutierrez@amd.com        self.assoc = options.tcp_assoc
13711308Santhony.gutierrez@amd.com        self.resourceStalls = options.no_tcc_resource_stalls
13811308Santhony.gutierrez@amd.com        self.replacement_policy = PseudoLRUReplacementPolicy()
13911308Santhony.gutierrez@amd.com
14011308Santhony.gutierrez@amd.comclass TCPCntrl(TCP_Controller, CntrlBase):
14111308Santhony.gutierrez@amd.com
14211308Santhony.gutierrez@amd.com    def create(self, options, ruby_system, system):
14311308Santhony.gutierrez@amd.com        self.version = self.versionCount()
14411308Santhony.gutierrez@amd.com
14511308Santhony.gutierrez@amd.com        self.L1cache = TCPCache(tagAccessLatency = options.TCP_latency,
14611308Santhony.gutierrez@amd.com                                dataAccessLatency = options.TCP_latency)
14711308Santhony.gutierrez@amd.com        self.L1cache.resourceStalls = options.no_resource_stalls
14811308Santhony.gutierrez@amd.com        self.L1cache.create(options)
14911308Santhony.gutierrez@amd.com        self.issue_latency = 1
15011308Santhony.gutierrez@amd.com
15111308Santhony.gutierrez@amd.com        self.coalescer = VIPERCoalescer()
15211308Santhony.gutierrez@amd.com        self.coalescer.version = self.seqCount()
15311308Santhony.gutierrez@amd.com        self.coalescer.icache = self.L1cache
15411308Santhony.gutierrez@amd.com        self.coalescer.dcache = self.L1cache
15511308Santhony.gutierrez@amd.com        self.coalescer.ruby_system = ruby_system
15611308Santhony.gutierrez@amd.com        self.coalescer.support_inst_reqs = False
15711308Santhony.gutierrez@amd.com        self.coalescer.is_cpu_sequencer = False
15811308Santhony.gutierrez@amd.com
15911308Santhony.gutierrez@amd.com        self.sequencer = RubySequencer()
16011308Santhony.gutierrez@amd.com        self.sequencer.version = self.seqCount()
16111308Santhony.gutierrez@amd.com        self.sequencer.icache = self.L1cache
16211308Santhony.gutierrez@amd.com        self.sequencer.dcache = self.L1cache
16311308Santhony.gutierrez@amd.com        self.sequencer.ruby_system = ruby_system
16411308Santhony.gutierrez@amd.com        self.sequencer.is_cpu_sequencer = True
16511308Santhony.gutierrez@amd.com
16611308Santhony.gutierrez@amd.com        self.use_seq_not_coal = False
16711308Santhony.gutierrez@amd.com
16811308Santhony.gutierrez@amd.com        self.ruby_system = ruby_system
16911308Santhony.gutierrez@amd.com
17011308Santhony.gutierrez@amd.com        if options.recycle_latency:
17111308Santhony.gutierrez@amd.com            self.recycle_latency = options.recycle_latency
17211308Santhony.gutierrez@amd.com
17311308Santhony.gutierrez@amd.com    def createCP(self, options, ruby_system, system):
17411308Santhony.gutierrez@amd.com        self.version = self.versionCount()
17511308Santhony.gutierrez@amd.com
17611308Santhony.gutierrez@amd.com        self.L1cache = TCPCache(tagAccessLatency = options.TCP_latency,
17711308Santhony.gutierrez@amd.com                                dataAccessLatency = options.TCP_latency)
17811308Santhony.gutierrez@amd.com        self.L1cache.resourceStalls = options.no_resource_stalls
17911308Santhony.gutierrez@amd.com        self.L1cache.create(options)
18011308Santhony.gutierrez@amd.com        self.issue_latency = 1
18111308Santhony.gutierrez@amd.com
18211308Santhony.gutierrez@amd.com        self.coalescer = VIPERCoalescer()
18311308Santhony.gutierrez@amd.com        self.coalescer.version = self.seqCount()
18411308Santhony.gutierrez@amd.com        self.coalescer.icache = self.L1cache
18511308Santhony.gutierrez@amd.com        self.coalescer.dcache = self.L1cache
18611308Santhony.gutierrez@amd.com        self.coalescer.ruby_system = ruby_system
18711308Santhony.gutierrez@amd.com        self.coalescer.support_inst_reqs = False
18811308Santhony.gutierrez@amd.com        self.coalescer.is_cpu_sequencer = False
18911308Santhony.gutierrez@amd.com
19011308Santhony.gutierrez@amd.com        self.sequencer = RubySequencer()
19111308Santhony.gutierrez@amd.com        self.sequencer.version = self.seqCount()
19211308Santhony.gutierrez@amd.com        self.sequencer.icache = self.L1cache
19311308Santhony.gutierrez@amd.com        self.sequencer.dcache = self.L1cache
19411308Santhony.gutierrez@amd.com        self.sequencer.ruby_system = ruby_system
19511308Santhony.gutierrez@amd.com        self.sequencer.is_cpu_sequencer = True
19611308Santhony.gutierrez@amd.com
19711308Santhony.gutierrez@amd.com        self.use_seq_not_coal = True
19811308Santhony.gutierrez@amd.com
19911308Santhony.gutierrez@amd.com        self.ruby_system = ruby_system
20011308Santhony.gutierrez@amd.com
20111308Santhony.gutierrez@amd.com        if options.recycle_latency:
20211308Santhony.gutierrez@amd.com            self.recycle_latency = options.recycle_latency
20311308Santhony.gutierrez@amd.com
20411308Santhony.gutierrez@amd.comclass SQCCache(RubyCache):
20511308Santhony.gutierrez@amd.com    dataArrayBanks = 8
20611308Santhony.gutierrez@amd.com    tagArrayBanks = 8
20711308Santhony.gutierrez@amd.com    dataAccessLatency = 1
20811308Santhony.gutierrez@amd.com    tagAccessLatency = 1
20911308Santhony.gutierrez@amd.com
21011308Santhony.gutierrez@amd.com    def create(self, options):
21111308Santhony.gutierrez@amd.com        self.size = MemorySize(options.sqc_size)
21211308Santhony.gutierrez@amd.com        self.assoc = options.sqc_assoc
21311308Santhony.gutierrez@amd.com        self.replacement_policy = PseudoLRUReplacementPolicy()
21411308Santhony.gutierrez@amd.com
21511308Santhony.gutierrez@amd.comclass SQCCntrl(SQC_Controller, CntrlBase):
21611308Santhony.gutierrez@amd.com
21711308Santhony.gutierrez@amd.com    def create(self, options, ruby_system, system):
21811308Santhony.gutierrez@amd.com        self.version = self.versionCount()
21911308Santhony.gutierrez@amd.com
22011308Santhony.gutierrez@amd.com        self.L1cache = SQCCache()
22111308Santhony.gutierrez@amd.com        self.L1cache.create(options)
22211308Santhony.gutierrez@amd.com        self.L1cache.resourceStalls = options.no_resource_stalls
22311308Santhony.gutierrez@amd.com
22411308Santhony.gutierrez@amd.com        self.sequencer = RubySequencer()
22511308Santhony.gutierrez@amd.com
22611308Santhony.gutierrez@amd.com        self.sequencer.version = self.seqCount()
22711308Santhony.gutierrez@amd.com        self.sequencer.icache = self.L1cache
22811308Santhony.gutierrez@amd.com        self.sequencer.dcache = self.L1cache
22911308Santhony.gutierrez@amd.com        self.sequencer.ruby_system = ruby_system
23011308Santhony.gutierrez@amd.com        self.sequencer.support_data_reqs = False
23111308Santhony.gutierrez@amd.com        self.sequencer.is_cpu_sequencer = False
23211308Santhony.gutierrez@amd.com
23311308Santhony.gutierrez@amd.com        self.ruby_system = ruby_system
23411308Santhony.gutierrez@amd.com
23511308Santhony.gutierrez@amd.com        if options.recycle_latency:
23611308Santhony.gutierrez@amd.com            self.recycle_latency = options.recycle_latency
23711308Santhony.gutierrez@amd.com
23811308Santhony.gutierrez@amd.comclass TCC(RubyCache):
23911308Santhony.gutierrez@amd.com    size = MemorySize("256kB")
24011308Santhony.gutierrez@amd.com    assoc = 16
24111308Santhony.gutierrez@amd.com    dataAccessLatency = 8
24211308Santhony.gutierrez@amd.com    tagAccessLatency = 2
24311308Santhony.gutierrez@amd.com    resourceStalls = True
24411308Santhony.gutierrez@amd.com    def create(self, options):
24511308Santhony.gutierrez@amd.com        self.assoc = options.tcc_assoc
24611308Santhony.gutierrez@amd.com        if hasattr(options, 'bw_scalor') and options.bw_scalor > 0:
24711308Santhony.gutierrez@amd.com          s = options.num_compute_units
24811308Santhony.gutierrez@amd.com          tcc_size = s * 128
24911308Santhony.gutierrez@amd.com          tcc_size = str(tcc_size)+'kB'
25011308Santhony.gutierrez@amd.com          self.size = MemorySize(tcc_size)
25111308Santhony.gutierrez@amd.com          self.dataArrayBanks = 64
25211308Santhony.gutierrez@amd.com          self.tagArrayBanks = 64
25311308Santhony.gutierrez@amd.com        else:
25411308Santhony.gutierrez@amd.com          self.size = MemorySize(options.tcc_size)
25511308Santhony.gutierrez@amd.com          self.dataArrayBanks = 256 / options.num_tccs #number of data banks
25611308Santhony.gutierrez@amd.com          self.tagArrayBanks = 256 / options.num_tccs #number of tag banks
25711308Santhony.gutierrez@amd.com        self.size.value = self.size.value / options.num_tccs
25811308Santhony.gutierrez@amd.com        if ((self.size.value / long(self.assoc)) < 128):
25911308Santhony.gutierrez@amd.com            self.size.value = long(128 * self.assoc)
26011308Santhony.gutierrez@amd.com        self.start_index_bit = math.log(options.cacheline_size, 2) + \
26111308Santhony.gutierrez@amd.com                               math.log(options.num_tccs, 2)
26211308Santhony.gutierrez@amd.com        self.replacement_policy = PseudoLRUReplacementPolicy()
26311308Santhony.gutierrez@amd.com
26411308Santhony.gutierrez@amd.com
26511308Santhony.gutierrez@amd.comclass TCCCntrl(TCC_Controller, CntrlBase):
26611308Santhony.gutierrez@amd.com    def create(self, options, ruby_system, system):
26711308Santhony.gutierrez@amd.com        self.version = self.versionCount()
26811308Santhony.gutierrez@amd.com        self.L2cache = TCC()
26911308Santhony.gutierrez@amd.com        self.L2cache.create(options)
27011308Santhony.gutierrez@amd.com        self.L2cache.resourceStalls = options.no_tcc_resource_stalls
27111308Santhony.gutierrez@amd.com
27211308Santhony.gutierrez@amd.com        self.ruby_system = ruby_system
27311308Santhony.gutierrez@amd.com
27411308Santhony.gutierrez@amd.com        if options.recycle_latency:
27511308Santhony.gutierrez@amd.com            self.recycle_latency = options.recycle_latency
27611308Santhony.gutierrez@amd.com
27711308Santhony.gutierrez@amd.comclass L3Cache(RubyCache):
27811308Santhony.gutierrez@amd.com    dataArrayBanks = 16
27911308Santhony.gutierrez@amd.com    tagArrayBanks = 16
28011308Santhony.gutierrez@amd.com
28111308Santhony.gutierrez@amd.com    def create(self, options, ruby_system, system):
28211308Santhony.gutierrez@amd.com        self.size = MemorySize(options.l3_size)
28311308Santhony.gutierrez@amd.com        self.size.value /= options.num_dirs
28411308Santhony.gutierrez@amd.com        self.assoc = options.l3_assoc
28511308Santhony.gutierrez@amd.com        self.dataArrayBanks /= options.num_dirs
28611308Santhony.gutierrez@amd.com        self.tagArrayBanks /= options.num_dirs
28711308Santhony.gutierrez@amd.com        self.dataArrayBanks /= options.num_dirs
28811308Santhony.gutierrez@amd.com        self.tagArrayBanks /= options.num_dirs
28911308Santhony.gutierrez@amd.com        self.dataAccessLatency = options.l3_data_latency
29011308Santhony.gutierrez@amd.com        self.tagAccessLatency = options.l3_tag_latency
29111308Santhony.gutierrez@amd.com        self.resourceStalls = False
29211308Santhony.gutierrez@amd.com        self.replacement_policy = PseudoLRUReplacementPolicy()
29311308Santhony.gutierrez@amd.com
29411308Santhony.gutierrez@amd.comclass L3Cntrl(L3Cache_Controller, CntrlBase):
29511308Santhony.gutierrez@amd.com    def create(self, options, ruby_system, system):
29611308Santhony.gutierrez@amd.com        self.version = self.versionCount()
29711308Santhony.gutierrez@amd.com        self.L3cache = L3Cache()
29811308Santhony.gutierrez@amd.com        self.L3cache.create(options, ruby_system, system)
29911308Santhony.gutierrez@amd.com
30011308Santhony.gutierrez@amd.com        self.l3_response_latency = max(self.L3cache.dataAccessLatency, self.L3cache.tagAccessLatency)
30111308Santhony.gutierrez@amd.com        self.ruby_system = ruby_system
30211308Santhony.gutierrez@amd.com
30311308Santhony.gutierrez@amd.com        if options.recycle_latency:
30411308Santhony.gutierrez@amd.com            self.recycle_latency = options.recycle_latency
30511308Santhony.gutierrez@amd.com
30611308Santhony.gutierrez@amd.com    def connectWireBuffers(self, req_to_dir, resp_to_dir, l3_unblock_to_dir,
30711308Santhony.gutierrez@amd.com                           req_to_l3, probe_to_l3, resp_to_l3):
30811308Santhony.gutierrez@amd.com        self.reqToDir = req_to_dir
30911308Santhony.gutierrez@amd.com        self.respToDir = resp_to_dir
31011308Santhony.gutierrez@amd.com        self.l3UnblockToDir = l3_unblock_to_dir
31111308Santhony.gutierrez@amd.com        self.reqToL3 = req_to_l3
31211308Santhony.gutierrez@amd.com        self.probeToL3 = probe_to_l3
31311308Santhony.gutierrez@amd.com        self.respToL3 = resp_to_l3
31411308Santhony.gutierrez@amd.com
31511308Santhony.gutierrez@amd.comclass DirMem(RubyDirectoryMemory, CntrlBase):
31611308Santhony.gutierrez@amd.com    def create(self, options, ruby_system, system):
31711308Santhony.gutierrez@amd.com        self.version = self.versionCount()
31811308Santhony.gutierrez@amd.com
31911308Santhony.gutierrez@amd.com        phys_mem_size = AddrRange(options.mem_size).size()
32011308Santhony.gutierrez@amd.com        mem_module_size = phys_mem_size / options.num_dirs
32111308Santhony.gutierrez@amd.com        dir_size = MemorySize('0B')
32211308Santhony.gutierrez@amd.com        dir_size.value = mem_module_size
32311308Santhony.gutierrez@amd.com        self.size = dir_size
32411308Santhony.gutierrez@amd.com
32511308Santhony.gutierrez@amd.comclass DirCntrl(Directory_Controller, CntrlBase):
32611308Santhony.gutierrez@amd.com    def create(self, options, ruby_system, system):
32711308Santhony.gutierrez@amd.com        self.version = self.versionCount()
32811308Santhony.gutierrez@amd.com
32911308Santhony.gutierrez@amd.com        self.response_latency = 30
33011308Santhony.gutierrez@amd.com
33111308Santhony.gutierrez@amd.com        self.directory = DirMem()
33211308Santhony.gutierrez@amd.com        self.directory.create(options, ruby_system, system)
33311308Santhony.gutierrez@amd.com
33411308Santhony.gutierrez@amd.com        self.L3CacheMemory = L3Cache()
33511308Santhony.gutierrez@amd.com        self.L3CacheMemory.create(options, ruby_system, system)
33611308Santhony.gutierrez@amd.com
33711308Santhony.gutierrez@amd.com        self.l3_hit_latency = max(self.L3CacheMemory.dataAccessLatency,
33811308Santhony.gutierrez@amd.com                                  self.L3CacheMemory.tagAccessLatency)
33911308Santhony.gutierrez@amd.com
34011308Santhony.gutierrez@amd.com        self.number_of_TBEs = options.num_tbes
34111308Santhony.gutierrez@amd.com
34211308Santhony.gutierrez@amd.com        self.ruby_system = ruby_system
34311308Santhony.gutierrez@amd.com
34411308Santhony.gutierrez@amd.com        if options.recycle_latency:
34511308Santhony.gutierrez@amd.com            self.recycle_latency = options.recycle_latency
34611308Santhony.gutierrez@amd.com
34711308Santhony.gutierrez@amd.com    def connectWireBuffers(self, req_to_dir, resp_to_dir, l3_unblock_to_dir,
34811308Santhony.gutierrez@amd.com                           req_to_l3, probe_to_l3, resp_to_l3):
34911308Santhony.gutierrez@amd.com        self.reqToDir = req_to_dir
35011308Santhony.gutierrez@amd.com        self.respToDir = resp_to_dir
35111308Santhony.gutierrez@amd.com        self.l3UnblockToDir = l3_unblock_to_dir
35211308Santhony.gutierrez@amd.com        self.reqToL3 = req_to_l3
35311308Santhony.gutierrez@amd.com        self.probeToL3 = probe_to_l3
35411308Santhony.gutierrez@amd.com        self.respToL3 = resp_to_l3
35511308Santhony.gutierrez@amd.com
35611308Santhony.gutierrez@amd.comdef define_options(parser):
35711308Santhony.gutierrez@amd.com    parser.add_option("--num-subcaches", type = "int", default = 4)
35811308Santhony.gutierrez@amd.com    parser.add_option("--l3-data-latency", type = "int", default = 20)
35911308Santhony.gutierrez@amd.com    parser.add_option("--l3-tag-latency", type = "int", default = 15)
36011308Santhony.gutierrez@amd.com    parser.add_option("--cpu-to-dir-latency", type = "int", default = 120)
36111308Santhony.gutierrez@amd.com    parser.add_option("--gpu-to-dir-latency", type = "int", default = 120)
36211308Santhony.gutierrez@amd.com    parser.add_option("--no-resource-stalls", action = "store_false",
36311308Santhony.gutierrez@amd.com                      default = True)
36411308Santhony.gutierrez@amd.com    parser.add_option("--no-tcc-resource-stalls", action = "store_false",
36511308Santhony.gutierrez@amd.com                      default = True)
36611308Santhony.gutierrez@amd.com    parser.add_option("--use-L3-on-WT", action = "store_true", default = False)
36711308Santhony.gutierrez@amd.com    parser.add_option("--num-tbes", type = "int", default = 256)
36811308Santhony.gutierrez@amd.com    parser.add_option("--l2-latency", type = "int", default = 50)  # load to use
36911308Santhony.gutierrez@amd.com    parser.add_option("--num-tccs", type = "int", default = 1,
37011308Santhony.gutierrez@amd.com                      help = "number of TCC banks in the GPU")
37111308Santhony.gutierrez@amd.com    parser.add_option("--sqc-size", type = 'string', default = '32kB',
37211308Santhony.gutierrez@amd.com                      help = "SQC cache size")
37311308Santhony.gutierrez@amd.com    parser.add_option("--sqc-assoc", type = 'int', default = 8,
37411308Santhony.gutierrez@amd.com                      help = "SQC cache assoc")
37511308Santhony.gutierrez@amd.com    parser.add_option("--WB_L1", action = "store_true", default = False,
37611308Santhony.gutierrez@amd.com                      help = "writeback L1")
37711308Santhony.gutierrez@amd.com    parser.add_option("--WB_L2", action = "store_true", default = False,
37811308Santhony.gutierrez@amd.com                      help = "writeback L2")
37911308Santhony.gutierrez@amd.com    parser.add_option("--TCP_latency", type = "int", default = 4,
38011308Santhony.gutierrez@amd.com                      help = "TCP latency")
38111308Santhony.gutierrez@amd.com    parser.add_option("--TCC_latency", type = "int", default = 16,
38211308Santhony.gutierrez@amd.com                      help = "TCC latency")
38311308Santhony.gutierrez@amd.com    parser.add_option("--tcc-size", type = 'string', default = '256kB',
38411308Santhony.gutierrez@amd.com                      help = "agregate tcc size")
38511308Santhony.gutierrez@amd.com    parser.add_option("--tcc-assoc", type = 'int', default = 16,
38611308Santhony.gutierrez@amd.com                      help = "tcc assoc")
38711308Santhony.gutierrez@amd.com    parser.add_option("--tcp-size", type = 'string', default = '16kB',
38811308Santhony.gutierrez@amd.com                      help = "tcp size")
38911308Santhony.gutierrez@amd.com    parser.add_option("--tcp-assoc", type = 'int', default = 16,
39011308Santhony.gutierrez@amd.com                      help = "tcp assoc")
39111308Santhony.gutierrez@amd.com    parser.add_option("--noL1", action = "store_true", default = False,
39211308Santhony.gutierrez@amd.com                      help = "bypassL1")
39311308Santhony.gutierrez@amd.com
39412598Snikos.nikoleris@arm.comdef create_system(options, full_system, system, dma_devices, bootmem,
39512598Snikos.nikoleris@arm.com                  ruby_system):
39611308Santhony.gutierrez@amd.com    if buildEnv['PROTOCOL'] != 'GPU_VIPER':
39711308Santhony.gutierrez@amd.com        panic("This script requires the GPU_VIPER protocol to be built.")
39811308Santhony.gutierrez@amd.com
39911308Santhony.gutierrez@amd.com    cpu_sequencers = []
40011308Santhony.gutierrez@amd.com
40111308Santhony.gutierrez@amd.com    #
40211308Santhony.gutierrez@amd.com    # The ruby network creation expects the list of nodes in the system to be
40311308Santhony.gutierrez@amd.com    # consistent with the NetDest list.  Therefore the l1 controller nodes
40411308Santhony.gutierrez@amd.com    # must be listed before the directory nodes and directory nodes before
40511308Santhony.gutierrez@amd.com    # dma nodes, etc.
40611308Santhony.gutierrez@amd.com    #
40711308Santhony.gutierrez@amd.com    cp_cntrl_nodes = []
40811308Santhony.gutierrez@amd.com    tcp_cntrl_nodes = []
40911308Santhony.gutierrez@amd.com    sqc_cntrl_nodes = []
41011308Santhony.gutierrez@amd.com    tcc_cntrl_nodes = []
41111308Santhony.gutierrez@amd.com    dir_cntrl_nodes = []
41211308Santhony.gutierrez@amd.com    l3_cntrl_nodes = []
41311308Santhony.gutierrez@amd.com
41411308Santhony.gutierrez@amd.com    #
41511308Santhony.gutierrez@amd.com    # Must create the individual controllers before the network to ensure the
41611308Santhony.gutierrez@amd.com    # controller constructors are called before the network constructor
41711308Santhony.gutierrez@amd.com    #
41811308Santhony.gutierrez@amd.com
41911308Santhony.gutierrez@amd.com    # For an odd number of CPUs, still create the right number of controllers
42011308Santhony.gutierrez@amd.com    TCC_bits = int(math.log(options.num_tccs, 2))
42111308Santhony.gutierrez@amd.com
42211308Santhony.gutierrez@amd.com    # This is the base crossbar that connects the L3s, Dirs, and cpu/gpu
42311308Santhony.gutierrez@amd.com    # Clusters
42411308Santhony.gutierrez@amd.com    crossbar_bw = None
42511308Santhony.gutierrez@amd.com    mainCluster = None
42611308Santhony.gutierrez@amd.com    if hasattr(options, 'bw_scalor') and options.bw_scalor > 0:
42711308Santhony.gutierrez@amd.com        #Assuming a 2GHz clock
42811308Santhony.gutierrez@amd.com        crossbar_bw = 16 * options.num_compute_units * options.bw_scalor
42911308Santhony.gutierrez@amd.com        mainCluster = Cluster(intBW=crossbar_bw)
43011308Santhony.gutierrez@amd.com    else:
43111308Santhony.gutierrez@amd.com        mainCluster = Cluster(intBW=8) # 16 GB/s
43213731Sandreas.sandberg@arm.com    for i in range(options.num_dirs):
43311308Santhony.gutierrez@amd.com
43411308Santhony.gutierrez@amd.com        dir_cntrl = DirCntrl(noTCCdir = True, TCC_select_num_bits = TCC_bits)
43511308Santhony.gutierrez@amd.com        dir_cntrl.create(options, ruby_system, system)
43611308Santhony.gutierrez@amd.com        dir_cntrl.number_of_TBEs = options.num_tbes
43711308Santhony.gutierrez@amd.com        dir_cntrl.useL3OnWT = options.use_L3_on_WT
43811308Santhony.gutierrez@amd.com        # the number_of_TBEs is inclusive of TBEs below
43911308Santhony.gutierrez@amd.com
44011308Santhony.gutierrez@amd.com        # Connect the Directory controller to the ruby network
44111308Santhony.gutierrez@amd.com        dir_cntrl.requestFromCores = MessageBuffer(ordered = True)
44211308Santhony.gutierrez@amd.com        dir_cntrl.requestFromCores.slave = ruby_system.network.master
44311308Santhony.gutierrez@amd.com
44411308Santhony.gutierrez@amd.com        dir_cntrl.responseFromCores = MessageBuffer()
44511308Santhony.gutierrez@amd.com        dir_cntrl.responseFromCores.slave = ruby_system.network.master
44611308Santhony.gutierrez@amd.com
44711308Santhony.gutierrez@amd.com        dir_cntrl.unblockFromCores = MessageBuffer()
44811308Santhony.gutierrez@amd.com        dir_cntrl.unblockFromCores.slave = ruby_system.network.master
44911308Santhony.gutierrez@amd.com
45011308Santhony.gutierrez@amd.com        dir_cntrl.probeToCore = MessageBuffer()
45111308Santhony.gutierrez@amd.com        dir_cntrl.probeToCore.master = ruby_system.network.slave
45211308Santhony.gutierrez@amd.com
45311308Santhony.gutierrez@amd.com        dir_cntrl.responseToCore = MessageBuffer()
45411308Santhony.gutierrez@amd.com        dir_cntrl.responseToCore.master = ruby_system.network.slave
45511308Santhony.gutierrez@amd.com
45611308Santhony.gutierrez@amd.com        dir_cntrl.triggerQueue = MessageBuffer(ordered = True)
45711308Santhony.gutierrez@amd.com        dir_cntrl.L3triggerQueue = MessageBuffer(ordered = True)
45811308Santhony.gutierrez@amd.com        dir_cntrl.responseFromMemory = MessageBuffer()
45911308Santhony.gutierrez@amd.com
46011308Santhony.gutierrez@amd.com        exec("ruby_system.dir_cntrl%d = dir_cntrl" % i)
46111308Santhony.gutierrez@amd.com        dir_cntrl_nodes.append(dir_cntrl)
46211308Santhony.gutierrez@amd.com
46311308Santhony.gutierrez@amd.com        mainCluster.add(dir_cntrl)
46411308Santhony.gutierrez@amd.com
46511308Santhony.gutierrez@amd.com    cpuCluster = None
46611308Santhony.gutierrez@amd.com    if hasattr(options, 'bw_scalor') and options.bw_scalor > 0:
46711308Santhony.gutierrez@amd.com        cpuCluster = Cluster(extBW = crossbar_bw, intBW = crossbar_bw)
46811308Santhony.gutierrez@amd.com    else:
46911308Santhony.gutierrez@amd.com        cpuCluster = Cluster(extBW = 8, intBW = 8) # 16 GB/s
47013731Sandreas.sandberg@arm.com    for i in range((options.num_cpus + 1) // 2):
47111308Santhony.gutierrez@amd.com
47211308Santhony.gutierrez@amd.com        cp_cntrl = CPCntrl()
47311308Santhony.gutierrez@amd.com        cp_cntrl.create(options, ruby_system, system)
47411308Santhony.gutierrez@amd.com
47511308Santhony.gutierrez@amd.com        exec("ruby_system.cp_cntrl%d = cp_cntrl" % i)
47611308Santhony.gutierrez@amd.com        #
47711308Santhony.gutierrez@amd.com        # Add controllers and sequencers to the appropriate lists
47811308Santhony.gutierrez@amd.com        #
47911308Santhony.gutierrez@amd.com        cpu_sequencers.extend([cp_cntrl.sequencer, cp_cntrl.sequencer1])
48011308Santhony.gutierrez@amd.com
48111308Santhony.gutierrez@amd.com        # Connect the CP controllers and the network
48211308Santhony.gutierrez@amd.com        cp_cntrl.requestFromCore = MessageBuffer()
48311308Santhony.gutierrez@amd.com        cp_cntrl.requestFromCore.master = ruby_system.network.slave
48411308Santhony.gutierrez@amd.com
48511308Santhony.gutierrez@amd.com        cp_cntrl.responseFromCore = MessageBuffer()
48611308Santhony.gutierrez@amd.com        cp_cntrl.responseFromCore.master = ruby_system.network.slave
48711308Santhony.gutierrez@amd.com
48811308Santhony.gutierrez@amd.com        cp_cntrl.unblockFromCore = MessageBuffer()
48911308Santhony.gutierrez@amd.com        cp_cntrl.unblockFromCore.master = ruby_system.network.slave
49011308Santhony.gutierrez@amd.com
49111308Santhony.gutierrez@amd.com        cp_cntrl.probeToCore = MessageBuffer()
49211308Santhony.gutierrez@amd.com        cp_cntrl.probeToCore.slave = ruby_system.network.master
49311308Santhony.gutierrez@amd.com
49411308Santhony.gutierrez@amd.com        cp_cntrl.responseToCore = MessageBuffer()
49511308Santhony.gutierrez@amd.com        cp_cntrl.responseToCore.slave = ruby_system.network.master
49611308Santhony.gutierrez@amd.com
49711308Santhony.gutierrez@amd.com        cp_cntrl.mandatoryQueue = MessageBuffer()
49811308Santhony.gutierrez@amd.com        cp_cntrl.triggerQueue = MessageBuffer(ordered = True)
49911308Santhony.gutierrez@amd.com
50011308Santhony.gutierrez@amd.com        cpuCluster.add(cp_cntrl)
50111308Santhony.gutierrez@amd.com
50213885Sdavid.hashe@amd.com    # Register CPUs and caches for each CorePair and directory (SE mode only)
50313885Sdavid.hashe@amd.com    if not full_system:
50413885Sdavid.hashe@amd.com        for i in xrange((options.num_cpus + 1) // 2):
50513885Sdavid.hashe@amd.com            FileSystemConfig.register_cpu(physical_package_id = 0,
50613885Sdavid.hashe@amd.com                                          core_siblings = \
50713885Sdavid.hashe@amd.com                                            xrange(options.num_cpus),
50813885Sdavid.hashe@amd.com                                          core_id = i*2,
50913885Sdavid.hashe@amd.com                                          thread_siblings = [])
51013885Sdavid.hashe@amd.com
51113885Sdavid.hashe@amd.com            FileSystemConfig.register_cpu(physical_package_id = 0,
51213885Sdavid.hashe@amd.com                                          core_siblings = \
51313885Sdavid.hashe@amd.com                                            xrange(options.num_cpus),
51413885Sdavid.hashe@amd.com                                          core_id = i*2+1,
51513885Sdavid.hashe@amd.com                                          thread_siblings = [])
51613885Sdavid.hashe@amd.com
51713885Sdavid.hashe@amd.com            FileSystemConfig.register_cache(level = 0,
51813885Sdavid.hashe@amd.com                                            idu_type = 'Instruction',
51913885Sdavid.hashe@amd.com                                            size = options.l1i_size,
52013885Sdavid.hashe@amd.com                                            line_size = options.cacheline_size,
52113885Sdavid.hashe@amd.com                                            assoc = options.l1i_assoc,
52213885Sdavid.hashe@amd.com                                            cpus = [i*2, i*2+1])
52313885Sdavid.hashe@amd.com
52413885Sdavid.hashe@amd.com            FileSystemConfig.register_cache(level = 0,
52513885Sdavid.hashe@amd.com                                            idu_type = 'Data',
52613885Sdavid.hashe@amd.com                                            size = options.l1d_size,
52713885Sdavid.hashe@amd.com                                            line_size = options.cacheline_size,
52813885Sdavid.hashe@amd.com                                            assoc = options.l1d_assoc,
52913885Sdavid.hashe@amd.com                                            cpus = [i*2])
53013885Sdavid.hashe@amd.com
53113885Sdavid.hashe@amd.com            FileSystemConfig.register_cache(level = 0,
53213885Sdavid.hashe@amd.com                                            idu_type = 'Data',
53313885Sdavid.hashe@amd.com                                            size = options.l1d_size,
53413885Sdavid.hashe@amd.com                                            line_size = options.cacheline_size,
53513885Sdavid.hashe@amd.com                                            assoc = options.l1d_assoc,
53613885Sdavid.hashe@amd.com                                            cpus = [i*2+1])
53713885Sdavid.hashe@amd.com
53813885Sdavid.hashe@amd.com            FileSystemConfig.register_cache(level = 1,
53913885Sdavid.hashe@amd.com                                            idu_type = 'Unified',
54013885Sdavid.hashe@amd.com                                            size = options.l2_size,
54113885Sdavid.hashe@amd.com                                            line_size = options.cacheline_size,
54213885Sdavid.hashe@amd.com                                            assoc = options.l2_assoc,
54313885Sdavid.hashe@amd.com                                            cpus = [i*2, i*2+1])
54413885Sdavid.hashe@amd.com
54513885Sdavid.hashe@amd.com        for i in range(options.num_dirs):
54613885Sdavid.hashe@amd.com            FileSystemConfig.register_cache(level = 2,
54713885Sdavid.hashe@amd.com                                            idu_type = 'Unified',
54813885Sdavid.hashe@amd.com                                            size = options.l3_size,
54913885Sdavid.hashe@amd.com                                            line_size = options.cacheline_size,
55013885Sdavid.hashe@amd.com                                            assoc = options.l3_assoc,
55113885Sdavid.hashe@amd.com                                            cpus = [n for n in
55213885Sdavid.hashe@amd.com                                                xrange(options.num_cpus)])
55313885Sdavid.hashe@amd.com
55411308Santhony.gutierrez@amd.com    gpuCluster = None
55511308Santhony.gutierrez@amd.com    if hasattr(options, 'bw_scalor') and options.bw_scalor > 0:
55611308Santhony.gutierrez@amd.com      gpuCluster = Cluster(extBW = crossbar_bw, intBW = crossbar_bw)
55711308Santhony.gutierrez@amd.com    else:
55811308Santhony.gutierrez@amd.com      gpuCluster = Cluster(extBW = 8, intBW = 8) # 16 GB/s
55913731Sandreas.sandberg@arm.com    for i in range(options.num_compute_units):
56011308Santhony.gutierrez@amd.com
56111308Santhony.gutierrez@amd.com        tcp_cntrl = TCPCntrl(TCC_select_num_bits = TCC_bits,
56211308Santhony.gutierrez@amd.com                             issue_latency = 1,
56311308Santhony.gutierrez@amd.com                             number_of_TBEs = 2560)
56411308Santhony.gutierrez@amd.com        # TBEs set to max outstanding requests
56511308Santhony.gutierrez@amd.com        tcp_cntrl.create(options, ruby_system, system)
56611308Santhony.gutierrez@amd.com        tcp_cntrl.WB = options.WB_L1
56711308Santhony.gutierrez@amd.com        tcp_cntrl.disableL1 = options.noL1
56811308Santhony.gutierrez@amd.com        tcp_cntrl.L1cache.tagAccessLatency = options.TCP_latency
56911308Santhony.gutierrez@amd.com        tcp_cntrl.L1cache.dataAccessLatency = options.TCP_latency
57011308Santhony.gutierrez@amd.com
57111308Santhony.gutierrez@amd.com        exec("ruby_system.tcp_cntrl%d = tcp_cntrl" % i)
57211308Santhony.gutierrez@amd.com        #
57311308Santhony.gutierrez@amd.com        # Add controllers and sequencers to the appropriate lists
57411308Santhony.gutierrez@amd.com        #
57511308Santhony.gutierrez@amd.com        cpu_sequencers.append(tcp_cntrl.coalescer)
57611308Santhony.gutierrez@amd.com        tcp_cntrl_nodes.append(tcp_cntrl)
57711308Santhony.gutierrez@amd.com
57811308Santhony.gutierrez@amd.com        # Connect the TCP controller to the ruby network
57911308Santhony.gutierrez@amd.com        tcp_cntrl.requestFromTCP = MessageBuffer(ordered = True)
58011308Santhony.gutierrez@amd.com        tcp_cntrl.requestFromTCP.master = ruby_system.network.slave
58111308Santhony.gutierrez@amd.com
58211308Santhony.gutierrez@amd.com        tcp_cntrl.responseFromTCP = MessageBuffer(ordered = True)
58311308Santhony.gutierrez@amd.com        tcp_cntrl.responseFromTCP.master = ruby_system.network.slave
58411308Santhony.gutierrez@amd.com
58511308Santhony.gutierrez@amd.com        tcp_cntrl.unblockFromCore = MessageBuffer()
58611308Santhony.gutierrez@amd.com        tcp_cntrl.unblockFromCore.master = ruby_system.network.slave
58711308Santhony.gutierrez@amd.com
58811308Santhony.gutierrez@amd.com        tcp_cntrl.probeToTCP = MessageBuffer(ordered = True)
58911308Santhony.gutierrez@amd.com        tcp_cntrl.probeToTCP.slave = ruby_system.network.master
59011308Santhony.gutierrez@amd.com
59111308Santhony.gutierrez@amd.com        tcp_cntrl.responseToTCP = MessageBuffer(ordered = True)
59211308Santhony.gutierrez@amd.com        tcp_cntrl.responseToTCP.slave = ruby_system.network.master
59311308Santhony.gutierrez@amd.com
59411308Santhony.gutierrez@amd.com        tcp_cntrl.mandatoryQueue = MessageBuffer()
59511308Santhony.gutierrez@amd.com
59611308Santhony.gutierrez@amd.com        gpuCluster.add(tcp_cntrl)
59711308Santhony.gutierrez@amd.com
59813731Sandreas.sandberg@arm.com    for i in range(options.num_sqc):
59911308Santhony.gutierrez@amd.com
60011308Santhony.gutierrez@amd.com        sqc_cntrl = SQCCntrl(TCC_select_num_bits = TCC_bits)
60111308Santhony.gutierrez@amd.com        sqc_cntrl.create(options, ruby_system, system)
60211308Santhony.gutierrez@amd.com
60311308Santhony.gutierrez@amd.com        exec("ruby_system.sqc_cntrl%d = sqc_cntrl" % i)
60411308Santhony.gutierrez@amd.com        #
60511308Santhony.gutierrez@amd.com        # Add controllers and sequencers to the appropriate lists
60611308Santhony.gutierrez@amd.com        #
60711308Santhony.gutierrez@amd.com        cpu_sequencers.append(sqc_cntrl.sequencer)
60811308Santhony.gutierrez@amd.com
60911308Santhony.gutierrez@amd.com        # Connect the SQC controller to the ruby network
61011308Santhony.gutierrez@amd.com        sqc_cntrl.requestFromSQC = MessageBuffer(ordered = True)
61111308Santhony.gutierrez@amd.com        sqc_cntrl.requestFromSQC.master = ruby_system.network.slave
61211308Santhony.gutierrez@amd.com
61311308Santhony.gutierrez@amd.com        sqc_cntrl.probeToSQC = MessageBuffer(ordered = True)
61411308Santhony.gutierrez@amd.com        sqc_cntrl.probeToSQC.slave = ruby_system.network.master
61511308Santhony.gutierrez@amd.com
61611308Santhony.gutierrez@amd.com        sqc_cntrl.responseToSQC = MessageBuffer(ordered = True)
61711308Santhony.gutierrez@amd.com        sqc_cntrl.responseToSQC.slave = ruby_system.network.master
61811308Santhony.gutierrez@amd.com
61911308Santhony.gutierrez@amd.com        sqc_cntrl.mandatoryQueue = MessageBuffer()
62011308Santhony.gutierrez@amd.com
62111308Santhony.gutierrez@amd.com        # SQC also in GPU cluster
62211308Santhony.gutierrez@amd.com        gpuCluster.add(sqc_cntrl)
62311308Santhony.gutierrez@amd.com
62413731Sandreas.sandberg@arm.com    for i in range(options.num_cp):
62511308Santhony.gutierrez@amd.com
62611308Santhony.gutierrez@amd.com        tcp_ID = options.num_compute_units + i
62711308Santhony.gutierrez@amd.com        sqc_ID = options.num_sqc + i
62811308Santhony.gutierrez@amd.com
62911308Santhony.gutierrez@amd.com        tcp_cntrl = TCPCntrl(TCC_select_num_bits = TCC_bits,
63011308Santhony.gutierrez@amd.com                             issue_latency = 1,
63111308Santhony.gutierrez@amd.com                             number_of_TBEs = 2560)
63211308Santhony.gutierrez@amd.com        # TBEs set to max outstanding requests
63311308Santhony.gutierrez@amd.com        tcp_cntrl.createCP(options, ruby_system, system)
63411308Santhony.gutierrez@amd.com        tcp_cntrl.WB = options.WB_L1
63511308Santhony.gutierrez@amd.com        tcp_cntrl.disableL1 = options.noL1
63611308Santhony.gutierrez@amd.com        tcp_cntrl.L1cache.tagAccessLatency = options.TCP_latency
63711308Santhony.gutierrez@amd.com        tcp_cntrl.L1cache.dataAccessLatency = options.TCP_latency
63811308Santhony.gutierrez@amd.com
63911308Santhony.gutierrez@amd.com        exec("ruby_system.tcp_cntrl%d = tcp_cntrl" % tcp_ID)
64011308Santhony.gutierrez@amd.com        #
64111308Santhony.gutierrez@amd.com        # Add controllers and sequencers to the appropriate lists
64211308Santhony.gutierrez@amd.com        #
64311308Santhony.gutierrez@amd.com        cpu_sequencers.append(tcp_cntrl.sequencer)
64411308Santhony.gutierrez@amd.com        tcp_cntrl_nodes.append(tcp_cntrl)
64511308Santhony.gutierrez@amd.com
64611308Santhony.gutierrez@amd.com        # Connect the CP (TCP) controllers to the ruby network
64711308Santhony.gutierrez@amd.com        tcp_cntrl.requestFromTCP = MessageBuffer(ordered = True)
64811308Santhony.gutierrez@amd.com        tcp_cntrl.requestFromTCP.master = ruby_system.network.slave
64911308Santhony.gutierrez@amd.com
65011308Santhony.gutierrez@amd.com        tcp_cntrl.responseFromTCP = MessageBuffer(ordered = True)
65111308Santhony.gutierrez@amd.com        tcp_cntrl.responseFromTCP.master = ruby_system.network.slave
65211308Santhony.gutierrez@amd.com
65311308Santhony.gutierrez@amd.com        tcp_cntrl.unblockFromCore = MessageBuffer(ordered = True)
65411308Santhony.gutierrez@amd.com        tcp_cntrl.unblockFromCore.master = ruby_system.network.slave
65511308Santhony.gutierrez@amd.com
65611308Santhony.gutierrez@amd.com        tcp_cntrl.probeToTCP = MessageBuffer(ordered = True)
65711308Santhony.gutierrez@amd.com        tcp_cntrl.probeToTCP.slave = ruby_system.network.master
65811308Santhony.gutierrez@amd.com
65911308Santhony.gutierrez@amd.com        tcp_cntrl.responseToTCP = MessageBuffer(ordered = True)
66011308Santhony.gutierrez@amd.com        tcp_cntrl.responseToTCP.slave = ruby_system.network.master
66111308Santhony.gutierrez@amd.com
66211308Santhony.gutierrez@amd.com        tcp_cntrl.mandatoryQueue = MessageBuffer()
66311308Santhony.gutierrez@amd.com
66411308Santhony.gutierrez@amd.com        gpuCluster.add(tcp_cntrl)
66511308Santhony.gutierrez@amd.com
66611308Santhony.gutierrez@amd.com        sqc_cntrl = SQCCntrl(TCC_select_num_bits = TCC_bits)
66711308Santhony.gutierrez@amd.com        sqc_cntrl.create(options, ruby_system, system)
66811308Santhony.gutierrez@amd.com
66911308Santhony.gutierrez@amd.com        exec("ruby_system.sqc_cntrl%d = sqc_cntrl" % sqc_ID)
67011308Santhony.gutierrez@amd.com        #
67111308Santhony.gutierrez@amd.com        # Add controllers and sequencers to the appropriate lists
67211308Santhony.gutierrez@amd.com        #
67311308Santhony.gutierrez@amd.com        cpu_sequencers.append(sqc_cntrl.sequencer)
67411308Santhony.gutierrez@amd.com
67511308Santhony.gutierrez@amd.com        # SQC also in GPU cluster
67611308Santhony.gutierrez@amd.com        gpuCluster.add(sqc_cntrl)
67711308Santhony.gutierrez@amd.com
67813731Sandreas.sandberg@arm.com    for i in range(options.num_tccs):
67911308Santhony.gutierrez@amd.com
68011308Santhony.gutierrez@amd.com        tcc_cntrl = TCCCntrl(l2_response_latency = options.TCC_latency)
68111308Santhony.gutierrez@amd.com        tcc_cntrl.create(options, ruby_system, system)
68211308Santhony.gutierrez@amd.com        tcc_cntrl.l2_request_latency = options.gpu_to_dir_latency
68311308Santhony.gutierrez@amd.com        tcc_cntrl.l2_response_latency = options.TCC_latency
68411308Santhony.gutierrez@amd.com        tcc_cntrl_nodes.append(tcc_cntrl)
68511308Santhony.gutierrez@amd.com        tcc_cntrl.WB = options.WB_L2
68611308Santhony.gutierrez@amd.com        tcc_cntrl.number_of_TBEs = 2560 * options.num_compute_units
68711308Santhony.gutierrez@amd.com        # the number_of_TBEs is inclusive of TBEs below
68811308Santhony.gutierrez@amd.com
68911308Santhony.gutierrez@amd.com        # Connect the TCC controllers to the ruby network
69011308Santhony.gutierrez@amd.com        tcc_cntrl.requestFromTCP = MessageBuffer(ordered = True)
69111308Santhony.gutierrez@amd.com        tcc_cntrl.requestFromTCP.slave = ruby_system.network.master
69211308Santhony.gutierrez@amd.com
69311308Santhony.gutierrez@amd.com        tcc_cntrl.responseToCore = MessageBuffer(ordered = True)
69411308Santhony.gutierrez@amd.com        tcc_cntrl.responseToCore.master = ruby_system.network.slave
69511308Santhony.gutierrez@amd.com
69611308Santhony.gutierrez@amd.com        tcc_cntrl.probeFromNB = MessageBuffer()
69711308Santhony.gutierrez@amd.com        tcc_cntrl.probeFromNB.slave = ruby_system.network.master
69811308Santhony.gutierrez@amd.com
69911308Santhony.gutierrez@amd.com        tcc_cntrl.responseFromNB = MessageBuffer()
70011308Santhony.gutierrez@amd.com        tcc_cntrl.responseFromNB.slave = ruby_system.network.master
70111308Santhony.gutierrez@amd.com
70211308Santhony.gutierrez@amd.com        tcc_cntrl.requestToNB = MessageBuffer(ordered = True)
70311308Santhony.gutierrez@amd.com        tcc_cntrl.requestToNB.master = ruby_system.network.slave
70411308Santhony.gutierrez@amd.com
70511308Santhony.gutierrez@amd.com        tcc_cntrl.responseToNB = MessageBuffer()
70611308Santhony.gutierrez@amd.com        tcc_cntrl.responseToNB.master = ruby_system.network.slave
70711308Santhony.gutierrez@amd.com
70811308Santhony.gutierrez@amd.com        tcc_cntrl.unblockToNB = MessageBuffer()
70911308Santhony.gutierrez@amd.com        tcc_cntrl.unblockToNB.master = ruby_system.network.slave
71011308Santhony.gutierrez@amd.com
71111308Santhony.gutierrez@amd.com        tcc_cntrl.triggerQueue = MessageBuffer(ordered = True)
71211308Santhony.gutierrez@amd.com
71311308Santhony.gutierrez@amd.com        exec("ruby_system.tcc_cntrl%d = tcc_cntrl" % i)
71411308Santhony.gutierrez@amd.com
71511308Santhony.gutierrez@amd.com        # connect all of the wire buffers between L3 and dirs up
71611308Santhony.gutierrez@amd.com        # TCC cntrls added to the GPU cluster
71711308Santhony.gutierrez@amd.com        gpuCluster.add(tcc_cntrl)
71811308Santhony.gutierrez@amd.com
71911308Santhony.gutierrez@amd.com    # Assuming no DMA devices
72011308Santhony.gutierrez@amd.com    assert(len(dma_devices) == 0)
72111308Santhony.gutierrez@amd.com
72211308Santhony.gutierrez@amd.com    # Add cpu/gpu clusters to main cluster
72311308Santhony.gutierrez@amd.com    mainCluster.add(cpuCluster)
72411308Santhony.gutierrez@amd.com    mainCluster.add(gpuCluster)
72511308Santhony.gutierrez@amd.com
72611308Santhony.gutierrez@amd.com    ruby_system.network.number_of_virtual_networks = 10
72711308Santhony.gutierrez@amd.com
72811308Santhony.gutierrez@amd.com    return (cpu_sequencers, dir_cntrl_nodes, mainCluster)
729