simple_ruby.py revision 13774:a1be2a0c55f2
1# -*- coding: utf-8 -*-
2# Copyright (c) 2015 Jason Power
3# All rights reserved.
4#
5# Redistribution and use in source and binary forms, with or without
6# modification, are permitted provided that the following conditions are
7# met: redistributions of source code must retain the above copyright
8# notice, this list of conditions and the following disclaimer;
9# redistributions in binary form must reproduce the above copyright
10# notice, this list of conditions and the following disclaimer in the
11# documentation and/or other materials provided with the distribution;
12# neither the name of the copyright holders nor the names of its
13# contributors may be used to endorse or promote products derived from
14# this software without specific prior written permission.
15#
16# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27#
28# Authors: Jason Lowe-Power
29
30""" This file creates a system with Ruby caches and executes 'threads', a
31simple multi-threaded application with false sharing to stress the Ruby
32protocol.
33
34See Part 3 in the Learning gem5 book: learning.gem5.org/book/part3
35
36IMPORTANT: If you modify this file, it's likely that the Learning gem5 book
37           also needs to be updated. For now, email Jason <jason@lowepower.com>
38
39"""
40from __future__ import print_function
41from __future__ import absolute_import
42
43# import the m5 (gem5) library created when gem5 is built
44import m5
45# import all of the SimObjects
46from m5.objects import *
47
48# You can import ruby_caches_MI_example to use the MI_example protocol instead
49# of the MSI protocol
50from .msi_caches import MyCacheSystem
51
52# create the system we are going to simulate
53system = System()
54
55# Set the clock fequency of the system (and all of its children)
56system.clk_domain = SrcClockDomain()
57system.clk_domain.clock = '1GHz'
58system.clk_domain.voltage_domain = VoltageDomain()
59
60# Set up the system
61system.mem_mode = 'timing'               # Use timing accesses
62system.mem_ranges = [AddrRange('512MB')] # Create an address range
63
64# Create a pair of simple CPUs
65system.cpu = [TimingSimpleCPU() for i in range(2)]
66
67# Create a DDR3 memory controller and connect it to the membus
68system.mem_ctrl = DDR3_1600_8x8()
69system.mem_ctrl.range = system.mem_ranges[0]
70
71# create the interrupt controller for the CPU and connect to the membus
72for cpu in system.cpu:
73    cpu.createInterruptController()
74
75# Create the Ruby System
76system.caches = MyCacheSystem()
77system.caches.setup(system, system.cpu, [system.mem_ctrl])
78
79# get ISA for the binary to run.
80isa = str(m5.defines.buildEnv['TARGET_ISA']).lower()
81
82# Run application and use the compiled ISA to find the binary
83binary = 'tests/test-progs/threads/bin/' + isa + '/linux/threads'
84
85# Create a process for a simple "multi-threaded" application
86process = Process()
87# Set the command
88# cmd is a list which begins with the executable (like argv)
89process.cmd = [binary]
90# Set the cpu to use the process as its workload and create thread contexts
91for cpu in system.cpu:
92    cpu.workload = process
93    cpu.createThreads()
94
95# set up the root SimObject and start the simulation
96root = Root(full_system = False, system = system)
97# instantiate all of the objects we've created above
98m5.instantiate()
99
100print("Beginning simulation!")
101exit_event = m5.simulate()
102print('Exiting @ tick {} because {}'.format(
103         m5.curTick(), exit_event.getCause())
104     )
105