simple.py revision 12564
1# -*- coding: utf-8 -*- 2# Copyright (c) 2015 Jason Power 3# All rights reserved. 4# 5# Redistribution and use in source and binary forms, with or without 6# modification, are permitted provided that the following conditions are 7# met: redistributions of source code must retain the above copyright 8# notice, this list of conditions and the following disclaimer; 9# redistributions in binary form must reproduce the above copyright 10# notice, this list of conditions and the following disclaimer in the 11# documentation and/or other materials provided with the distribution; 12# neither the name of the copyright holders nor the names of its 13# contributors may be used to endorse or promote products derived from 14# this software without specific prior written permission. 15# 16# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27# 28# Authors: Jason Power 29 30""" This file creates a barebones system and executes 'hello', a simple Hello 31World application. 32See Part 1, Chapter 2: Creating a simple configuration script in the 33learning_gem5 book for more information about this script. 34 35IMPORTANT: If you modify this file, it's likely that the Learning gem5 book 36 also needs to be updated. For now, email Jason <power.jg@gmail.com> 37 38""" 39 40from __future__ import print_function 41 42# import the m5 (gem5) library created when gem5 is built 43import m5 44# import all of the SimObjects 45from m5.objects import * 46 47# create the system we are going to simulate 48system = System() 49 50# Set the clock fequency of the system (and all of its children) 51system.clk_domain = SrcClockDomain() 52system.clk_domain.clock = '1GHz' 53system.clk_domain.voltage_domain = VoltageDomain() 54 55# Set up the system 56system.mem_mode = 'timing' # Use timing accesses 57system.mem_ranges = [AddrRange('512MB')] # Create an address range 58 59# Create a simple CPU 60system.cpu = TimingSimpleCPU() 61 62# Create a memory bus, a system crossbar, in this case 63system.membus = SystemXBar() 64 65# Hook the CPU ports up to the membus 66system.cpu.icache_port = system.membus.slave 67system.cpu.dcache_port = system.membus.slave 68 69# create the interrupt controller for the CPU and connect to the membus 70system.cpu.createInterruptController() 71 72# For x86 only, make sure the interrupts are connected to the memory 73# Note: these are directly connected to the memory bus and are not cached 74if m5.defines.buildEnv['TARGET_ISA'] == "x86": 75 system.cpu.interrupts[0].pio = system.membus.master 76 system.cpu.interrupts[0].int_master = system.membus.slave 77 system.cpu.interrupts[0].int_slave = system.membus.master 78 79# Create a DDR3 memory controller and connect it to the membus 80system.mem_ctrl = DDR3_1600_8x8() 81system.mem_ctrl.range = system.mem_ranges[0] 82system.mem_ctrl.port = system.membus.master 83 84# Connect the system up to the membus 85system.system_port = system.membus.slave 86 87# get ISA for the binary to run. 88isa = str(m5.defines.buildEnv['TARGET_ISA']).lower() 89 90# Run 'hello' and use the compiled ISA to find the binary 91binary = 'tests/test-progs/hello/bin/' + isa + '/linux/hello' 92 93# Create a process for a simple "Hello World" application 94process = Process() 95# Set the command 96# cmd is a list which begins with the executable (like argv) 97process.cmd = [binary] 98# Set the cpu to use the process as its workload and create thread contexts 99system.cpu.workload = process 100system.cpu.createThreads() 101 102# set up the root SimObject and start the simulation 103root = Root(full_system = False, system = system) 104# instantiate all of the objects we've created above 105m5.instantiate() 106 107print("Beginning simulation!") 108exit_event = m5.simulate() 109print('Exiting @ tick %i because %s' % (m5.curTick(), exit_event.getCause())) 110