se.py revision 8169
15369Ssaidi@eecs.umich.edu# Copyright (c) 2006-2008 The Regents of The University of Michigan
23005Sstever@eecs.umich.edu# All rights reserved.
33005Sstever@eecs.umich.edu#
43005Sstever@eecs.umich.edu# Redistribution and use in source and binary forms, with or without
53005Sstever@eecs.umich.edu# modification, are permitted provided that the following conditions are
63005Sstever@eecs.umich.edu# met: redistributions of source code must retain the above copyright
73005Sstever@eecs.umich.edu# notice, this list of conditions and the following disclaimer;
83005Sstever@eecs.umich.edu# redistributions in binary form must reproduce the above copyright
93005Sstever@eecs.umich.edu# notice, this list of conditions and the following disclaimer in the
103005Sstever@eecs.umich.edu# documentation and/or other materials provided with the distribution;
113005Sstever@eecs.umich.edu# neither the name of the copyright holders nor the names of its
123005Sstever@eecs.umich.edu# contributors may be used to endorse or promote products derived from
133005Sstever@eecs.umich.edu# this software without specific prior written permission.
143005Sstever@eecs.umich.edu#
153005Sstever@eecs.umich.edu# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
163005Sstever@eecs.umich.edu# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
173005Sstever@eecs.umich.edu# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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253005Sstever@eecs.umich.edu# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
263005Sstever@eecs.umich.edu#
273005Sstever@eecs.umich.edu# Authors: Steve Reinhardt
283005Sstever@eecs.umich.edu
292710SN/A# Simple test script
302710SN/A#
313005Sstever@eecs.umich.edu# "m5 test.py"
322889SN/A
336654Snate@binkert.orgimport os
346654Snate@binkert.orgimport optparse
356654Snate@binkert.orgimport sys
366654Snate@binkert.orgfrom os.path import join as joinpath
376654Snate@binkert.org
382667SN/Aimport m5
396654Snate@binkert.orgfrom m5.defines import buildEnv
406654Snate@binkert.orgfrom m5.objects import *
416654Snate@binkert.orgfrom m5.util import addToPath, fatal
425457Ssaidi@eecs.umich.edu
436654Snate@binkert.orgif buildEnv['FULL_SYSTEM']:
446654Snate@binkert.org    fatal("This script requires syscall emulation mode (*_SE).")
455457Ssaidi@eecs.umich.edu
466654Snate@binkert.orgaddToPath('../common')
478169SLisa.Hsu@amd.comaddToPath('../ruby')
488169SLisa.Hsu@amd.com
498169SLisa.Hsu@amd.comimport Ruby
506654Snate@binkert.org
513395Shsul@eecs.umich.eduimport Simulation
526981SLisa.Hsu@amd.comimport CacheConfig
533448Shsul@eecs.umich.edufrom Caches import *
545369Ssaidi@eecs.umich.edufrom cpu2000 import *
553394Shsul@eecs.umich.edu
563444Sktlim@umich.edu# Get paths we might need.  It's expected this file is in m5/configs/example.
573444Sktlim@umich.educonfig_path = os.path.dirname(os.path.abspath(__file__))
583444Sktlim@umich.educonfig_root = os.path.dirname(config_path)
593444Sktlim@umich.edum5_root = os.path.dirname(config_root)
602424SN/A
612957SN/Aparser = optparse.OptionParser()
622957SN/A
633323Shsul@eecs.umich.edu# Benchmark options
643005Sstever@eecs.umich.eduparser.add_option("-c", "--cmd",
657787SAli.Saidi@ARM.com    default=joinpath(m5_root, "tests/test-progs/hello/bin/%s/linux/hello" % \
667787SAli.Saidi@ARM.com            buildEnv['TARGET_ISA']),
675514SMichael.Adler@intel.com    help="The binary to run in syscall emulation mode.")
682957SN/Aparser.add_option("-o", "--options", default="",
695514SMichael.Adler@intel.com    help='The options to pass to the binary, use " " around the entire string')
705514SMichael.Adler@intel.comparser.add_option("-i", "--input", default="", help="Read stdin from a file.")
715514SMichael.Adler@intel.comparser.add_option("--output", default="", help="Redirect stdout to a file.")
725514SMichael.Adler@intel.comparser.add_option("--errout", default="", help="Redirect stderr to a file.")
738169SLisa.Hsu@amd.comparser.add_option("--ruby", action="store_true")
743323Shsul@eecs.umich.edu
753444Sktlim@umich.eduexecfile(os.path.join(config_root, "common", "Options.py"))
762957SN/A
772957SN/A(options, args) = parser.parse_args()
782957SN/A
798169SLisa.Hsu@amd.comif options.ruby:
808169SLisa.Hsu@amd.com    Ruby.define_options(parser)
818169SLisa.Hsu@amd.com    (options, args) = parser.parse_args()
828169SLisa.Hsu@amd.com
832957SN/Aif args:
842957SN/A    print "Error: script doesn't take any positional arguments"
852957SN/A    sys.exit(1)
862957SN/A
878167SLisa.Hsu@amd.commultiprocesses = []
888167SLisa.Hsu@amd.comapps = []
898167SLisa.Hsu@amd.com
905369Ssaidi@eecs.umich.eduif options.bench:
918167SLisa.Hsu@amd.com    apps = options.bench.split("-")
928167SLisa.Hsu@amd.com    if len(apps) != options.num_cpus:
938167SLisa.Hsu@amd.com        print "number of benchmarks not equal to set num_cpus!"
948167SLisa.Hsu@amd.com        sys.exit(1)
958167SLisa.Hsu@amd.com
968167SLisa.Hsu@amd.com    for app in apps:
978167SLisa.Hsu@amd.com        try:
988168SLisa.Hsu@amd.com            if buildEnv['TARGET_ISA'] == 'alpha':
998168SLisa.Hsu@amd.com                exec("workload = %s('alpha', 'tru64', 'ref')" % app)
1008168SLisa.Hsu@amd.com            else:
1018168SLisa.Hsu@amd.com                exec("workload = %s(buildEnv['TARGET_ISA'], 'linux', 'ref')" % app)
1028167SLisa.Hsu@amd.com            multiprocesses.append(workload.makeLiveProcess())
1038167SLisa.Hsu@amd.com        except:
1048168SLisa.Hsu@amd.com            print >>sys.stderr, "Unable to find workload for %s: %s" % (buildEnv['TARGET_ISA'], app)
1055369Ssaidi@eecs.umich.edu            sys.exit(1)
1065369Ssaidi@eecs.umich.eduelse:
1075369Ssaidi@eecs.umich.edu    process = LiveProcess()
1085369Ssaidi@eecs.umich.edu    process.executable = options.cmd
1095369Ssaidi@eecs.umich.edu    process.cmd = [options.cmd] + options.options.split()
1108167SLisa.Hsu@amd.com    multiprocesses.append(process)
1115369Ssaidi@eecs.umich.edu
1125369Ssaidi@eecs.umich.edu
1132801SN/Aif options.input != "":
1142801SN/A    process.input = options.input
1155514SMichael.Adler@intel.comif options.output != "":
1165514SMichael.Adler@intel.com    process.output = options.output
1175514SMichael.Adler@intel.comif options.errout != "":
1185514SMichael.Adler@intel.com    process.errout = options.errout
1192418SN/A
1206391Sksewell@umich.edu
1216391Sksewell@umich.edu# By default, set workload to path of user-specified binary
1226391Sksewell@umich.eduworkloads = options.cmd
1236642Sksewell@umich.edunumThreads = 1
1246391Sksewell@umich.edu
1256642Sksewell@umich.eduif options.detailed or options.inorder:
1262833SN/A    #check for SMT workload
1272833SN/A    workloads = options.cmd.split(';')
1282833SN/A    if len(workloads) > 1:
1292833SN/A        process = []
1302833SN/A        smt_idx = 0
1312833SN/A        inputs = []
1325514SMichael.Adler@intel.com        outputs = []
1335514SMichael.Adler@intel.com        errouts = []
1342833SN/A
1352833SN/A        if options.input != "":
1362833SN/A            inputs = options.input.split(';')
1375514SMichael.Adler@intel.com        if options.output != "":
1385514SMichael.Adler@intel.com            outputs = options.output.split(';')
1395514SMichael.Adler@intel.com        if options.errout != "":
1405514SMichael.Adler@intel.com            errouts = options.errout.split(';')
1412833SN/A
1422833SN/A        for wrkld in workloads:
1432833SN/A            smt_process = LiveProcess()
1443005Sstever@eecs.umich.edu            smt_process.executable = wrkld
1452833SN/A            smt_process.cmd = wrkld + " " + options.options
1462833SN/A            if inputs and inputs[smt_idx]:
1472833SN/A                smt_process.input = inputs[smt_idx]
1485514SMichael.Adler@intel.com            if outputs and outputs[smt_idx]:
1495514SMichael.Adler@intel.com                smt_process.output = outputs[smt_idx]
1505514SMichael.Adler@intel.com            if errouts and errouts[smt_idx]:
1515514SMichael.Adler@intel.com                smt_process.errout = errouts[smt_idx]
1522833SN/A            process += [smt_process, ]
1532833SN/A            smt_idx += 1
1546642Sksewell@umich.edu    numThreads = len(workloads)
1556642Sksewell@umich.edu
1568169SLisa.Hsu@amd.comif options.ruby:
1578169SLisa.Hsu@amd.com    if options.detailed:
1588169SLisa.Hsu@amd.com        print >> sys.stderr, "Ruby only works with TimingSimpleCPU!!"
1598169SLisa.Hsu@amd.com        sys.exit(1)
1608169SLisa.Hsu@amd.com    elif not options.timing:
1618169SLisa.Hsu@amd.com        print >> sys.stderr, "****WARN:  using Timing CPU since it's needed by Ruby"
1628169SLisa.Hsu@amd.com
1638169SLisa.Hsu@amd.com    class CPUClass(TimingSimpleCPU): pass
1648169SLisa.Hsu@amd.com    test_mem_mode = 'timing'
1658169SLisa.Hsu@amd.com    FutureClass = None
1668169SLisa.Hsu@amd.comelse:
1678169SLisa.Hsu@amd.com    (CPUClass, test_mem_mode, FutureClass) = Simulation.setCPUClass(options)
1682957SN/A
1693395Shsul@eecs.umich.eduCPUClass.clock = '2GHz'
1706642Sksewell@umich.eduCPUClass.numThreads = numThreads;
1713005Sstever@eecs.umich.edu
1723395Shsul@eecs.umich.edunp = options.num_cpus
1733395Shsul@eecs.umich.edu
1743395Shsul@eecs.umich.edusystem = System(cpu = [CPUClass(cpu_id=i) for i in xrange(np)],
1753323Shsul@eecs.umich.edu                physmem = PhysicalMemory(range=AddrRange("512MB")),
1763395Shsul@eecs.umich.edu                membus = Bus(), mem_mode = test_mem_mode)
1773395Shsul@eecs.umich.edu
1788169SLisa.Hsu@amd.comif options.ruby:
1798169SLisa.Hsu@amd.com    options.use_map = True
1808169SLisa.Hsu@amd.com    system.ruby = Ruby.create_system(options, system)
1818169SLisa.Hsu@amd.com    assert(options.num_cpus == len(system.ruby.cpu_ruby_ports))
1828169SLisa.Hsu@amd.comelse:
1838169SLisa.Hsu@amd.com    system.physmem.port = system.membus.port
1848169SLisa.Hsu@amd.com    CacheConfig.config_cache(options, system)
1855056Ssaidi@eecs.umich.edu
1863395Shsul@eecs.umich.edufor i in xrange(np):
1878167SLisa.Hsu@amd.com    system.cpu[i].workload = multiprocesses[i]
1883005Sstever@eecs.umich.edu
1898169SLisa.Hsu@amd.com    if options.ruby:
1908169SLisa.Hsu@amd.com        system.cpu[i].icache_port = system.ruby.cpu_ruby_ports[i].port
1918169SLisa.Hsu@amd.com        system.cpu[i].dcache_port = system.ruby.cpu_ruby_ports[i].port
1928169SLisa.Hsu@amd.com
1934968Sacolyte@umich.edu    if options.fastmem:
1944968Sacolyte@umich.edu        system.cpu[0].physmem_port = system.physmem.port
1954968Sacolyte@umich.edu
1963005Sstever@eecs.umich.eduroot = Root(system = system)
1972902SN/A
1983481Shsul@eecs.umich.eduSimulation.run(options, root, system, FutureClass)
199