se.py revision 8167
15369Ssaidi@eecs.umich.edu# Copyright (c) 2006-2008 The Regents of The University of Michigan
23005Sstever@eecs.umich.edu# All rights reserved.
33005Sstever@eecs.umich.edu#
43005Sstever@eecs.umich.edu# Redistribution and use in source and binary forms, with or without
53005Sstever@eecs.umich.edu# modification, are permitted provided that the following conditions are
63005Sstever@eecs.umich.edu# met: redistributions of source code must retain the above copyright
73005Sstever@eecs.umich.edu# notice, this list of conditions and the following disclaimer;
83005Sstever@eecs.umich.edu# redistributions in binary form must reproduce the above copyright
93005Sstever@eecs.umich.edu# notice, this list of conditions and the following disclaimer in the
103005Sstever@eecs.umich.edu# documentation and/or other materials provided with the distribution;
113005Sstever@eecs.umich.edu# neither the name of the copyright holders nor the names of its
123005Sstever@eecs.umich.edu# contributors may be used to endorse or promote products derived from
133005Sstever@eecs.umich.edu# this software without specific prior written permission.
143005Sstever@eecs.umich.edu#
153005Sstever@eecs.umich.edu# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
163005Sstever@eecs.umich.edu# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
173005Sstever@eecs.umich.edu# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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253005Sstever@eecs.umich.edu# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
263005Sstever@eecs.umich.edu#
273005Sstever@eecs.umich.edu# Authors: Steve Reinhardt
283005Sstever@eecs.umich.edu
292710SN/A# Simple test script
302710SN/A#
313005Sstever@eecs.umich.edu# "m5 test.py"
322889SN/A
336654Snate@binkert.orgimport os
346654Snate@binkert.orgimport optparse
356654Snate@binkert.orgimport sys
366654Snate@binkert.orgfrom os.path import join as joinpath
376654Snate@binkert.org
382667SN/Aimport m5
396654Snate@binkert.orgfrom m5.defines import buildEnv
406654Snate@binkert.orgfrom m5.objects import *
416654Snate@binkert.orgfrom m5.util import addToPath, fatal
425457Ssaidi@eecs.umich.edu
436654Snate@binkert.orgif buildEnv['FULL_SYSTEM']:
446654Snate@binkert.org    fatal("This script requires syscall emulation mode (*_SE).")
455457Ssaidi@eecs.umich.edu
466654Snate@binkert.orgaddToPath('../common')
476654Snate@binkert.org
483395Shsul@eecs.umich.eduimport Simulation
496981SLisa.Hsu@amd.comimport CacheConfig
503448Shsul@eecs.umich.edufrom Caches import *
515369Ssaidi@eecs.umich.edufrom cpu2000 import *
523394Shsul@eecs.umich.edu
533444Sktlim@umich.edu# Get paths we might need.  It's expected this file is in m5/configs/example.
543444Sktlim@umich.educonfig_path = os.path.dirname(os.path.abspath(__file__))
553444Sktlim@umich.educonfig_root = os.path.dirname(config_path)
563444Sktlim@umich.edum5_root = os.path.dirname(config_root)
572424SN/A
582957SN/Aparser = optparse.OptionParser()
592957SN/A
603323Shsul@eecs.umich.edu# Benchmark options
613005Sstever@eecs.umich.eduparser.add_option("-c", "--cmd",
627787SAli.Saidi@ARM.com    default=joinpath(m5_root, "tests/test-progs/hello/bin/%s/linux/hello" % \
637787SAli.Saidi@ARM.com            buildEnv['TARGET_ISA']),
645514SMichael.Adler@intel.com    help="The binary to run in syscall emulation mode.")
652957SN/Aparser.add_option("-o", "--options", default="",
665514SMichael.Adler@intel.com    help='The options to pass to the binary, use " " around the entire string')
675514SMichael.Adler@intel.comparser.add_option("-i", "--input", default="", help="Read stdin from a file.")
685514SMichael.Adler@intel.comparser.add_option("--output", default="", help="Redirect stdout to a file.")
695514SMichael.Adler@intel.comparser.add_option("--errout", default="", help="Redirect stderr to a file.")
703323Shsul@eecs.umich.edu
713444Sktlim@umich.eduexecfile(os.path.join(config_root, "common", "Options.py"))
722957SN/A
732957SN/A(options, args) = parser.parse_args()
742957SN/A
752957SN/Aif args:
762957SN/A    print "Error: script doesn't take any positional arguments"
772957SN/A    sys.exit(1)
782957SN/A
798167SLisa.Hsu@amd.commultiprocesses = []
808167SLisa.Hsu@amd.comapps = []
818167SLisa.Hsu@amd.com
825369Ssaidi@eecs.umich.eduif options.bench:
838167SLisa.Hsu@amd.com    apps = options.bench.split("-")
848167SLisa.Hsu@amd.com    if len(apps) != options.num_cpus:
858167SLisa.Hsu@amd.com        print "number of benchmarks not equal to set num_cpus!"
868167SLisa.Hsu@amd.com        sys.exit(1)
878167SLisa.Hsu@amd.com
888167SLisa.Hsu@amd.com    for app in apps:
898167SLisa.Hsu@amd.com        try:
908167SLisa.Hsu@amd.com            if buildEnv['TARGET_ISA'] != 'alpha':
918167SLisa.Hsu@amd.com                print >>sys.stderr, "Simpoints code only works for Alpha ISA at this time"
928167SLisa.Hsu@amd.com                sys.exit(1)
938167SLisa.Hsu@amd.com            exec("workload = %s('alpha', 'tru64', 'ref')" % app)
948167SLisa.Hsu@amd.com            multiprocesses.append(workload.makeLiveProcess())
958167SLisa.Hsu@amd.com        except:
968167SLisa.Hsu@amd.com            print >>sys.stderr, "Unable to find workload for %s" % app
975369Ssaidi@eecs.umich.edu            sys.exit(1)
985369Ssaidi@eecs.umich.eduelse:
995369Ssaidi@eecs.umich.edu    process = LiveProcess()
1005369Ssaidi@eecs.umich.edu    process.executable = options.cmd
1015369Ssaidi@eecs.umich.edu    process.cmd = [options.cmd] + options.options.split()
1028167SLisa.Hsu@amd.com    multiprocesses.append(process)
1035369Ssaidi@eecs.umich.edu
1045369Ssaidi@eecs.umich.edu
1052801SN/Aif options.input != "":
1062801SN/A    process.input = options.input
1075514SMichael.Adler@intel.comif options.output != "":
1085514SMichael.Adler@intel.com    process.output = options.output
1095514SMichael.Adler@intel.comif options.errout != "":
1105514SMichael.Adler@intel.com    process.errout = options.errout
1112418SN/A
1126391Sksewell@umich.edu
1136391Sksewell@umich.edu# By default, set workload to path of user-specified binary
1146391Sksewell@umich.eduworkloads = options.cmd
1156642Sksewell@umich.edunumThreads = 1
1166391Sksewell@umich.edu
1176642Sksewell@umich.eduif options.detailed or options.inorder:
1182833SN/A    #check for SMT workload
1192833SN/A    workloads = options.cmd.split(';')
1202833SN/A    if len(workloads) > 1:
1212833SN/A        process = []
1222833SN/A        smt_idx = 0
1232833SN/A        inputs = []
1245514SMichael.Adler@intel.com        outputs = []
1255514SMichael.Adler@intel.com        errouts = []
1262833SN/A
1272833SN/A        if options.input != "":
1282833SN/A            inputs = options.input.split(';')
1295514SMichael.Adler@intel.com        if options.output != "":
1305514SMichael.Adler@intel.com            outputs = options.output.split(';')
1315514SMichael.Adler@intel.com        if options.errout != "":
1325514SMichael.Adler@intel.com            errouts = options.errout.split(';')
1332833SN/A
1342833SN/A        for wrkld in workloads:
1352833SN/A            smt_process = LiveProcess()
1363005Sstever@eecs.umich.edu            smt_process.executable = wrkld
1372833SN/A            smt_process.cmd = wrkld + " " + options.options
1382833SN/A            if inputs and inputs[smt_idx]:
1392833SN/A                smt_process.input = inputs[smt_idx]
1405514SMichael.Adler@intel.com            if outputs and outputs[smt_idx]:
1415514SMichael.Adler@intel.com                smt_process.output = outputs[smt_idx]
1425514SMichael.Adler@intel.com            if errouts and errouts[smt_idx]:
1435514SMichael.Adler@intel.com                smt_process.errout = errouts[smt_idx]
1442833SN/A            process += [smt_process, ]
1452833SN/A            smt_idx += 1
1466642Sksewell@umich.edu    numThreads = len(workloads)
1476642Sksewell@umich.edu
1483481Shsul@eecs.umich.edu(CPUClass, test_mem_mode, FutureClass) = Simulation.setCPUClass(options)
1492957SN/A
1503395Shsul@eecs.umich.eduCPUClass.clock = '2GHz'
1516642Sksewell@umich.eduCPUClass.numThreads = numThreads;
1523005Sstever@eecs.umich.edu
1533395Shsul@eecs.umich.edunp = options.num_cpus
1543395Shsul@eecs.umich.edu
1553395Shsul@eecs.umich.edusystem = System(cpu = [CPUClass(cpu_id=i) for i in xrange(np)],
1563323Shsul@eecs.umich.edu                physmem = PhysicalMemory(range=AddrRange("512MB")),
1573395Shsul@eecs.umich.edu                membus = Bus(), mem_mode = test_mem_mode)
1583395Shsul@eecs.umich.edu
1593005Sstever@eecs.umich.edusystem.physmem.port = system.membus.port
1603395Shsul@eecs.umich.edu
1616981SLisa.Hsu@amd.comCacheConfig.config_cache(options, system)
1625056Ssaidi@eecs.umich.edu
1633395Shsul@eecs.umich.edufor i in xrange(np):
1648167SLisa.Hsu@amd.com    system.cpu[i].workload = multiprocesses[i]
1653005Sstever@eecs.umich.edu
1664968Sacolyte@umich.edu    if options.fastmem:
1674968Sacolyte@umich.edu        system.cpu[0].physmem_port = system.physmem.port
1684968Sacolyte@umich.edu
1693005Sstever@eecs.umich.eduroot = Root(system = system)
1702902SN/A
1713481Shsul@eecs.umich.eduSimulation.run(options, root, system, FutureClass)
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