ruby_gpu_random_test.py revision 11662:004d34b65092
1#
2#  Copyright (c) 2010-2015 Advanced Micro Devices, Inc.
3#  All rights reserved.
4#
5#  For use for simulation and test purposes only
6#
7#  Redistribution and use in source and binary forms, with or without
8#  modification, are permitted provided that the following conditions are met:
9#
10#  1. Redistributions of source code must retain the above copyright notice,
11#  this list of conditions and the following disclaimer.
12#
13#  2. Redistributions in binary form must reproduce the above copyright notice,
14#  this list of conditions and the following disclaimer in the documentation
15#  and/or other materials provided with the distribution.
16#
17#  3. Neither the name of the copyright holder nor the names of its contributors
18#  may be used to endorse or promote products derived from this software
19#  without specific prior written permission.
20#
21#  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
22#  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23#  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24#  ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
25#  LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26#  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27#  SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28#  INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29#  CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30#  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31#  POSSIBILITY OF SUCH DAMAGE.
32#
33#  Author: Brad Beckmann
34#
35
36import m5
37from m5.objects import *
38from m5.defines import buildEnv
39from m5.util import addToPath
40import os, optparse, sys
41addToPath('../common')
42addToPath('../ruby')
43addToPath('../network')
44addToPath('../topologies')
45
46import Options
47import Ruby
48import Network
49
50# Get paths we might need.
51config_path = os.path.dirname(os.path.abspath(__file__))
52config_root = os.path.dirname(config_path)
53m5_root = os.path.dirname(config_root)
54
55parser = optparse.OptionParser()
56Options.addCommonOptions(parser)
57
58parser.add_option("--maxloads", metavar="N", default=100,
59                  help="Stop after N loads")
60parser.add_option("-f", "--wakeup_freq", metavar="N", default=10,
61                  help="Wakeup every N cycles")
62parser.add_option("-u", "--num-compute-units", type="int", default=1,
63                  help="number of compute units in the GPU")
64parser.add_option("--num-cp", type="int", default=0,
65                  help="Number of GPU Command Processors (CP)")
66# not super important now, but to avoid putting the number 4 everywhere, make
67# it an option/knob
68parser.add_option("--cu-per-sqc", type="int", default=4, help="number of CUs \
69                  sharing an SQC (icache, and thus icache TLB)")
70parser.add_option("--simds-per-cu", type="int", default=4, help="SIMD units" \
71                  "per CU")
72parser.add_option("--wf-size", type="int", default=64,
73                  help="Wavefront size(in workitems)")
74parser.add_option("--wfs-per-simd", type="int", default=10, help="Number of " \
75                  "WF slots per SIMD")
76
77#
78# Add the ruby specific and protocol specific options
79#
80Ruby.define_options(parser)
81Network.define_options(parser)
82
83execfile(os.path.join(config_root, "common", "Options.py"))
84
85(options, args) = parser.parse_args()
86
87#
88# Set the default cache size and associativity to be very small to encourage
89# races between requests and writebacks.
90#
91options.l1d_size="256B"
92options.l1i_size="256B"
93options.l2_size="512B"
94options.l3_size="1kB"
95options.l1d_assoc=2
96options.l1i_assoc=2
97options.l2_assoc=2
98options.l3_assoc=2
99
100# This file can support multiple compute units
101assert(options.num_compute_units >= 1)
102n_cu = options.num_compute_units
103
104options.num_sqc = int((n_cu + options.cu_per_sqc - 1) / options.cu_per_sqc)
105
106if args:
107     print "Error: script doesn't take any positional arguments"
108     sys.exit(1)
109
110#
111# Create the ruby random tester
112#
113
114# Check to for the GPU_RfO protocol.  Other GPU protocols are non-SC and will
115# not work with the Ruby random tester.
116assert(buildEnv['PROTOCOL'] == 'GPU_RfO')
117
118# The GPU_RfO protocol does not support cache flushes
119check_flush = False
120
121tester = RubyTester(check_flush=check_flush,
122                    checks_to_complete=options.maxloads,
123                    wakeup_frequency=options.wakeup_freq,
124                    deadlock_threshold=1000000)
125
126#
127# Create the M5 system.  Note that the Memory Object isn't
128# actually used by the rubytester, but is included to support the
129# M5 memory size == Ruby memory size checks
130#
131system = System(cpu=tester, mem_ranges=[AddrRange(options.mem_size)])
132
133# Create a top-level voltage domain and clock domain
134system.voltage_domain = VoltageDomain(voltage=options.sys_voltage)
135
136system.clk_domain = SrcClockDomain(clock=options.sys_clock,
137                                   voltage_domain=system.voltage_domain)
138
139Ruby.create_system(options, False, system)
140
141# Create a seperate clock domain for Ruby
142system.ruby.clk_domain = SrcClockDomain(clock=options.ruby_clock,
143                                       voltage_domain=system.voltage_domain)
144
145tester.num_cpus = len(system.ruby._cpu_ports)
146
147#
148# The tester is most effective when randomization is turned on and
149# artifical delay is randomly inserted on messages
150#
151system.ruby.randomization = True
152
153for ruby_port in system.ruby._cpu_ports:
154
155    #
156    # Tie the ruby tester ports to the ruby cpu read and write ports
157    #
158    if ruby_port.support_data_reqs and ruby_port.support_inst_reqs:
159        tester.cpuInstDataPort = ruby_port.slave
160    elif ruby_port.support_data_reqs:
161        tester.cpuDataPort = ruby_port.slave
162    elif ruby_port.support_inst_reqs:
163        tester.cpuInstPort = ruby_port.slave
164
165    # Do not automatically retry stalled Ruby requests
166    ruby_port.no_retry_on_stall = True
167
168    #
169    # Tell each sequencer this is the ruby tester so that it
170    # copies the subblock back to the checker
171    #
172    ruby_port.using_ruby_tester = True
173
174# -----------------------
175# run simulation
176# -----------------------
177
178root = Root( full_system = False, system = system )
179root.system.mem_mode = 'timing'
180
181# Not much point in this being higher than the L1 latency
182m5.ticks.setGlobalFrequency('1ns')
183
184# instantiate configuration
185m5.instantiate()
186
187# simulate until program terminates
188exit_event = m5.simulate(options.abs_max_tick)
189
190print 'Exiting @ tick', m5.curTick(), 'because', exit_event.getCause()
191