fs.py revision 7586:da93206873dc
17584SN/A# Copyright (c) 2010 ARM Limited
28869SAli.Saidi@ARM.com# All rights reserved.
37584SN/A#
47584SN/A# The license below extends only to copyright in the software and shall
57584SN/A# not be construed as granting a license to any other intellectual
67584SN/A# property including but not limited to intellectual property relating
77584SN/A# to a hardware implementation of the functionality of the software
87584SN/A# licensed hereunder.  You may use the software subject to the license
97584SN/A# terms below provided that you ensure that this notice is replicated
107584SN/A# unmodified and in its entirety in all distributions of the software,
117584SN/A# modified or unmodified, in source code or in binary form.
127584SN/A#
137584SN/A# Copyright (c) 2006-2007 The Regents of The University of Michigan
147584SN/A# All rights reserved.
157584SN/A#
167584SN/A# Redistribution and use in source and binary forms, with or without
177584SN/A# modification, are permitted provided that the following conditions are
187584SN/A# met: redistributions of source code must retain the above copyright
197584SN/A# notice, this list of conditions and the following disclaimer;
207584SN/A# redistributions in binary form must reproduce the above copyright
217584SN/A# notice, this list of conditions and the following disclaimer in the
227584SN/A# documentation and/or other materials provided with the distribution;
237584SN/A# neither the name of the copyright holders nor the names of its
247584SN/A# contributors may be used to endorse or promote products derived from
257584SN/A# this software without specific prior written permission.
267584SN/A#
277584SN/A# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
287584SN/A# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
297584SN/A# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
307584SN/A# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
317584SN/A# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
327584SN/A# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
337584SN/A# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
347584SN/A# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
357584SN/A# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
367584SN/A# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
377584SN/A# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
387584SN/A#
397584SN/A# Authors: Ali Saidi
408869SAli.Saidi@ARM.com
418869SAli.Saidi@ARM.comimport optparse
427584SN/Aimport os
437584SN/Aimport sys
447584SN/A
458869SAli.Saidi@ARM.comimport m5
467584SN/Afrom m5.defines import buildEnv
477584SN/Afrom m5.objects import *
488869SAli.Saidi@ARM.comfrom m5.util import addToPath, fatal
497584SN/A
507584SN/Aif not buildEnv['FULL_SYSTEM']:
518869SAli.Saidi@ARM.com    fatal("This script requires full-system mode (*_FS).")
527584SN/A
537584SN/AaddToPath('../common')
548869SAli.Saidi@ARM.com
558869SAli.Saidi@ARM.comfrom FSConfig import *
568869SAli.Saidi@ARM.comfrom SysPaths import *
578869SAli.Saidi@ARM.comfrom Benchmarks import *
588869SAli.Saidi@ARM.comimport Simulation
598869SAli.Saidi@ARM.comimport CacheConfig
608869SAli.Saidi@ARM.comfrom Caches import *
618869SAli.Saidi@ARM.com
628869SAli.Saidi@ARM.com# Get paths we might need.  It's expected this file is in m5/configs/example.
637584SN/Aconfig_path = os.path.dirname(os.path.abspath(__file__))
647584SN/Aconfig_root = os.path.dirname(config_path)
658869SAli.Saidi@ARM.com
668869SAli.Saidi@ARM.comparser = optparse.OptionParser()
678869SAli.Saidi@ARM.com
687584SN/A# System options
698869SAli.Saidi@ARM.comparser.add_option("--kernel", action="store", type="string")
708869SAli.Saidi@ARM.comparser.add_option("--script", action="store", type="string")
718869SAli.Saidi@ARM.comif buildEnv['TARGET_ISA'] == "arm":
728869SAli.Saidi@ARM.com    parser.add_option("--bare-metal", action="store_true",
738869SAli.Saidi@ARM.com               help="Provide the raw system without the linux specific bits")
748869SAli.Saidi@ARM.com    parser.add_option("--machine-type", action="store", type="choice",
758869SAli.Saidi@ARM.com            choices=ArmMachineType.map.keys(), default="RealView_PBX")
768869SAli.Saidi@ARM.com# Benchmark options
778869SAli.Saidi@ARM.comparser.add_option("--dual", action="store_true",
788869SAli.Saidi@ARM.com                  help="Simulate two systems attached with an ethernet link")
798869SAli.Saidi@ARM.comparser.add_option("-b", "--benchmark", action="store", type="string",
808869SAli.Saidi@ARM.com                  dest="benchmark",
818869SAli.Saidi@ARM.com                  help="Specify the benchmark to run. Available benchmarks: %s"\
828869SAli.Saidi@ARM.com                  % DefinedBenchmarks)
838869SAli.Saidi@ARM.com
848869SAli.Saidi@ARM.com# Metafile options
858869SAli.Saidi@ARM.comparser.add_option("--etherdump", action="store", type="string", dest="etherdump",
868869SAli.Saidi@ARM.com                  help="Specify the filename to dump a pcap capture of the" \
878869SAli.Saidi@ARM.com                  "ethernet traffic")
888869SAli.Saidi@ARM.com
898869SAli.Saidi@ARM.comexecfile(os.path.join(config_root, "common", "Options.py"))
908869SAli.Saidi@ARM.com
918869SAli.Saidi@ARM.com(options, args) = parser.parse_args()
928869SAli.Saidi@ARM.com
938869SAli.Saidi@ARM.comif args:
948869SAli.Saidi@ARM.com    print "Error: script doesn't take any positional arguments"
958869SAli.Saidi@ARM.com    sys.exit(1)
968869SAli.Saidi@ARM.com
978869SAli.Saidi@ARM.com# driver system CPU is always simple... note this is an assignment of
988869SAli.Saidi@ARM.com# a class, not an instance.
998869SAli.Saidi@ARM.comDriveCPUClass = AtomicSimpleCPU
1008869SAli.Saidi@ARM.comdrive_mem_mode = 'atomic'
1017584SN/A
1027584SN/A# system under test can be any CPU
1038869SAli.Saidi@ARM.com(TestCPUClass, test_mem_mode, FutureClass) = Simulation.setCPUClass(options)
1047584SN/A
1057584SN/ATestCPUClass.clock = '2GHz'
1067584SN/ADriveCPUClass.clock = '2GHz'
1077584SN/A
1087584SN/Aif options.benchmark:
1097584SN/A    try:
1107584SN/A        bm = Benchmarks[options.benchmark]
1117584SN/A    except KeyError:
1127584SN/A        print "Error benchmark %s has not been defined." % options.benchmark
1138869SAli.Saidi@ARM.com        print "Valid benchmarks are: %s" % DefinedBenchmarks
1147584SN/A        sys.exit(1)
1157584SN/Aelse:
1167584SN/A    if options.dual:
1177584SN/A        bm = [SysConfig(), SysConfig()]
1187584SN/A    else:
1197584SN/A        bm = [SysConfig()]
1207584SN/A
1217584SN/Anp = options.num_cpus
1227584SN/A
1238869SAli.Saidi@ARM.comif buildEnv['TARGET_ISA'] == "alpha":
1247584SN/A    test_sys = makeLinuxAlphaSystem(test_mem_mode, bm[0])
1257584SN/Aelif buildEnv['TARGET_ISA'] == "mips":
1267584SN/A    test_sys = makeLinuxMipsSystem(test_mem_mode, bm[0])
1277584SN/Aelif buildEnv['TARGET_ISA'] == "sparc":
1287584SN/A    test_sys = makeSparcSystem(test_mem_mode, bm[0])
1297584SN/Aelif buildEnv['TARGET_ISA'] == "x86":
1307584SN/A    test_sys = makeLinuxX86System(test_mem_mode, np, bm[0])
1317584SN/Aelif buildEnv['TARGET_ISA'] == "arm":
1327584SN/A    test_sys = makeLinuxArmSystem(test_mem_mode, bm[0],
1337584SN/A            bare_metal=options.bare_metal, machine_type=options.machine_type)
1347584SN/Aelse:
1358869SAli.Saidi@ARM.com    fatal("incapable of building non-alpha or non-sparc full system!")
1367584SN/A
137if options.kernel is not None:
138    test_sys.kernel = binary(options.kernel)
139
140if options.script is not None:
141    test_sys.readfile = options.script
142
143test_sys.cpu = [TestCPUClass(cpu_id=i) for i in xrange(np)]
144
145CacheConfig.config_cache(options, test_sys)
146
147if options.caches or options.l2cache:
148    if bm[0]:
149        mem_size = bm[0].mem()
150    else:
151        mem_size = SysConfig().mem()
152    test_sys.bridge.filter_ranges_a=[AddrRange(0, Addr.max)]
153    test_sys.bridge.filter_ranges_b=[AddrRange(mem_size)]
154    test_sys.iocache = IOCache(addr_range=mem_size)
155    test_sys.iocache.cpu_side = test_sys.iobus.port
156    test_sys.iocache.mem_side = test_sys.membus.port
157
158for i in xrange(np):
159    if options.fastmem:
160        test_sys.cpu[i].physmem_port = test_sys.physmem.port
161
162if buildEnv['TARGET_ISA'] == 'mips':
163    setMipsOptions(TestCPUClass)
164
165if len(bm) == 2:
166    if buildEnv['TARGET_ISA'] == 'alpha':
167        drive_sys = makeLinuxAlphaSystem(drive_mem_mode, bm[1])
168    elif buildEnv['TARGET_ISA'] == 'mips':
169        drive_sys = makeLinuxMipsSystem(drive_mem_mode, bm[1])
170    elif buildEnv['TARGET_ISA'] == 'sparc':
171        drive_sys = makeSparcSystem(drive_mem_mode, bm[1])
172    elif buildEnv['TARGET_ISA'] == 'x86':
173        drive_sys = makeX86System(drive_mem_mode, np, bm[1])
174    elif buildEnv['TARGET_ISA'] == 'arm':
175        drive_sys = makeLinuxArmSystem(drive_mem_mode, bm[1])
176    drive_sys.cpu = DriveCPUClass(cpu_id=0)
177    drive_sys.cpu.connectMemPorts(drive_sys.membus)
178    if options.fastmem:
179        drive_sys.cpu.physmem_port = drive_sys.physmem.port
180    if options.kernel is not None:
181        drive_sys.kernel = binary(options.kernel)
182
183    root = makeDualRoot(test_sys, drive_sys, options.etherdump)
184elif len(bm) == 1:
185    root = Root(system=test_sys)
186else:
187    print "Error I don't know how to create more than 2 systems."
188    sys.exit(1)
189
190Simulation.run(options, root, test_sys, FutureClass)
191