fs.py revision 6654:4c84e771cca7
15390SN/A# Copyright (c) 2006-2007 The Regents of The University of Michigan 25443SN/A# All rights reserved. 35390SN/A# 45390SN/A# Redistribution and use in source and binary forms, with or without 55390SN/A# modification, are permitted provided that the following conditions are 65390SN/A# met: redistributions of source code must retain the above copyright 75390SN/A# notice, this list of conditions and the following disclaimer; 85390SN/A# redistributions in binary form must reproduce the above copyright 95390SN/A# notice, this list of conditions and the following disclaimer in the 105390SN/A# documentation and/or other materials provided with the distribution; 115390SN/A# neither the name of the copyright holders nor the names of its 125390SN/A# contributors may be used to endorse or promote products derived from 135390SN/A# this software without specific prior written permission. 145390SN/A# 155390SN/A# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 165390SN/A# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 175390SN/A# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 185390SN/A# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 195390SN/A# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 205390SN/A# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 215390SN/A# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 225390SN/A# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 235390SN/A# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 245390SN/A# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 255390SN/A# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 265390SN/A# 275390SN/A# Authors: Ali Saidi 285390SN/A 295390SN/Aimport optparse 305390SN/Aimport os 315636Sgblack@eecs.umich.eduimport sys 325636Sgblack@eecs.umich.edu 335390SN/Aimport m5 345443SN/Afrom m5.defines import buildEnv 355636Sgblack@eecs.umich.edufrom m5.objects import * 365636Sgblack@eecs.umich.edufrom m5.util import addToPath, fatal 375443SN/A 385390SN/Aif not buildEnv['FULL_SYSTEM']: 395390SN/A fatal("This script requires full-system mode (*_FS).") 405390SN/A 415827Sgblack@eecs.umich.eduaddToPath('../common') 425636Sgblack@eecs.umich.edu 435636Sgblack@eecs.umich.edufrom FSConfig import * 445390SN/Afrom SysPaths import * 455636Sgblack@eecs.umich.edufrom Benchmarks import * 465636Sgblack@eecs.umich.eduimport Simulation 475642Sgblack@eecs.umich.edufrom Caches import * 485642Sgblack@eecs.umich.edu 495642Sgblack@eecs.umich.edu# Get paths we might need. It's expected this file is in m5/configs/example. 505642Sgblack@eecs.umich.educonfig_path = os.path.dirname(os.path.abspath(__file__)) 515642Sgblack@eecs.umich.educonfig_root = os.path.dirname(config_path) 525642Sgblack@eecs.umich.edu 535642Sgblack@eecs.umich.eduparser = optparse.OptionParser() 545642Sgblack@eecs.umich.edu 555642Sgblack@eecs.umich.edu# System options 565642Sgblack@eecs.umich.eduparser.add_option("--kernel", action="store", type="string") 575642Sgblack@eecs.umich.eduparser.add_option("--script", action="store", type="string") 585642Sgblack@eecs.umich.edu 595642Sgblack@eecs.umich.edu# Benchmark options 605642Sgblack@eecs.umich.eduparser.add_option("--dual", action="store_true", 615642Sgblack@eecs.umich.edu help="Simulate two systems attached with an ethernet link") 625642Sgblack@eecs.umich.eduparser.add_option("-b", "--benchmark", action="store", type="string", 635642Sgblack@eecs.umich.edu dest="benchmark", 645642Sgblack@eecs.umich.edu help="Specify the benchmark to run. Available benchmarks: %s"\ 655642Sgblack@eecs.umich.edu % DefinedBenchmarks) 665390SN/A 675827Sgblack@eecs.umich.edu# Metafile options 685642Sgblack@eecs.umich.eduparser.add_option("--etherdump", action="store", type="string", dest="etherdump", 695642Sgblack@eecs.umich.edu help="Specify the filename to dump a pcap capture of the" \ 705390SN/A "ethernet traffic") 715636Sgblack@eecs.umich.edu 725636Sgblack@eecs.umich.eduexecfile(os.path.join(config_root, "common", "Options.py")) 735636Sgblack@eecs.umich.edu 745636Sgblack@eecs.umich.edu(options, args) = parser.parse_args() 755636Sgblack@eecs.umich.edu 765636Sgblack@eecs.umich.eduif args: 775636Sgblack@eecs.umich.edu print "Error: script doesn't take any positional arguments" 785636Sgblack@eecs.umich.edu sys.exit(1) 795636Sgblack@eecs.umich.edu 809808Sstever@gmail.com# driver system CPU is always simple... note this is an assignment of 815642Sgblack@eecs.umich.edu# a class, not an instance. 825636Sgblack@eecs.umich.eduDriveCPUClass = AtomicSimpleCPU 835636Sgblack@eecs.umich.edudrive_mem_mode = 'atomic' 845390SN/A 855390SN/A# system under test can be any CPU 865390SN/A(TestCPUClass, test_mem_mode, FutureClass) = Simulation.setCPUClass(options) 875636Sgblack@eecs.umich.edu 885636Sgblack@eecs.umich.eduTestCPUClass.clock = '2GHz' 895636Sgblack@eecs.umich.eduDriveCPUClass.clock = '2GHz' 905636Sgblack@eecs.umich.edu 915636Sgblack@eecs.umich.eduif options.benchmark: 925636Sgblack@eecs.umich.edu try: 935636Sgblack@eecs.umich.edu bm = Benchmarks[options.benchmark] 945636Sgblack@eecs.umich.edu except KeyError: 955636Sgblack@eecs.umich.edu print "Error benchmark %s has not been defined." % options.benchmark 965636Sgblack@eecs.umich.edu print "Valid benchmarks are: %s" % DefinedBenchmarks 975636Sgblack@eecs.umich.edu sys.exit(1) 985636Sgblack@eecs.umich.eduelse: 995636Sgblack@eecs.umich.edu if options.dual: 1005636Sgblack@eecs.umich.edu bm = [SysConfig(), SysConfig()] 1015636Sgblack@eecs.umich.edu else: 1025636Sgblack@eecs.umich.edu bm = [SysConfig()] 1035636Sgblack@eecs.umich.edu 1045636Sgblack@eecs.umich.edunp = options.num_cpus 1055636Sgblack@eecs.umich.edu 1065636Sgblack@eecs.umich.eduif buildEnv['TARGET_ISA'] == "alpha": 1075636Sgblack@eecs.umich.edu test_sys = makeLinuxAlphaSystem(test_mem_mode, bm[0]) 1085636Sgblack@eecs.umich.eduelif buildEnv['TARGET_ISA'] == "mips": 1095636Sgblack@eecs.umich.edu test_sys = makeLinuxMipsSystem(test_mem_mode, bm[0]) 1105636Sgblack@eecs.umich.eduelif buildEnv['TARGET_ISA'] == "sparc": 1117903Shestness@cs.utexas.edu test_sys = makeSparcSystem(test_mem_mode, bm[0]) 11211168Sandreas.hansson@arm.comelif buildEnv['TARGET_ISA'] == "x86": 11311168Sandreas.hansson@arm.com test_sys = makeLinuxX86System(test_mem_mode, np, bm[0]) 11410905Sandreas.sandberg@arm.comelse: 11510642Scdirik@micron.com fatal("incapable of building non-alpha or non-sparc full system!") 1167903Shestness@cs.utexas.edu 1175390SN/Aif options.kernel is not None: 1185390SN/A test_sys.kernel = binary(options.kernel) 1197811Ssteve.reinhardt@amd.com 1205390SN/Aif options.script is not None: 1215390SN/A test_sys.readfile = options.script 122 123if options.l2cache: 124 test_sys.l2 = L2Cache(size = '2MB') 125 test_sys.tol2bus = Bus() 126 test_sys.l2.cpu_side = test_sys.tol2bus.port 127 test_sys.l2.mem_side = test_sys.membus.port 128 129test_sys.cpu = [TestCPUClass(cpu_id=i) for i in xrange(np)] 130 131if options.caches or options.l2cache: 132 test_sys.bridge.filter_ranges_a=[AddrRange(0, Addr.max)] 133 test_sys.bridge.filter_ranges_b=[AddrRange(0, size='8GB')] 134 test_sys.iocache = IOCache(addr_range=AddrRange(0, size='8GB')) 135 test_sys.iocache.cpu_side = test_sys.iobus.port 136 test_sys.iocache.mem_side = test_sys.membus.port 137 138for i in xrange(np): 139 if options.caches: 140 test_sys.cpu[i].addPrivateSplitL1Caches(L1Cache(size = '32kB'), 141 L1Cache(size = '64kB')) 142 if options.l2cache: 143 test_sys.cpu[i].connectMemPorts(test_sys.tol2bus) 144 else: 145 test_sys.cpu[i].connectMemPorts(test_sys.membus) 146 147 if options.fastmem: 148 test_sys.cpu[i].physmem_port = test_sys.physmem.port 149 150if buildEnv['TARGET_ISA'] == 'mips': 151 setMipsOptions(TestCPUClass) 152 153if len(bm) == 2: 154 if buildEnv['TARGET_ISA'] == 'alpha': 155 drive_sys = makeLinuxAlphaSystem(drive_mem_mode, bm[1]) 156 elif buildEnv['TARGET_ISA'] == 'mips': 157 drive_sys = makeLinuxMipsSystem(drive_mem_mode, bm[1]) 158 elif buildEnv['TARGET_ISA'] == 'sparc': 159 drive_sys = makeSparcSystem(drive_mem_mode, bm[1]) 160 elif buildEnv['TARGET_ISA'] == 'x86': 161 drive_sys = makeX86System(drive_mem_mode, np, bm[1]) 162 drive_sys.cpu = DriveCPUClass(cpu_id=0) 163 drive_sys.cpu.connectMemPorts(drive_sys.membus) 164 if options.fastmem: 165 drive_sys.cpu.physmem_port = drive_sys.physmem.port 166 if options.kernel is not None: 167 drive_sys.kernel = binary(options.kernel) 168 169 root = makeDualRoot(test_sys, drive_sys, options.etherdump) 170elif len(bm) == 1: 171 root = Root(system=test_sys) 172else: 173 print "Error I don't know how to create more than 2 systems." 174 sys.exit(1) 175 176Simulation.run(options, root, test_sys, FutureClass) 177