fs.py revision 2902 
1import optparse, os, sys
2
3import m5
4from m5.objects import *
5from SysPaths import *
6
7parser = optparse.OptionParser()
8
9parser.add_option("-t", "--timing", action="store_true")
10
11(options, args) = parser.parse_args()
12
13if args:
14    print "Error: script doesn't take any positional arguments"
15    sys.exit(1)
16
17# Base for tests is directory containing this file.
18test_base = os.path.dirname(__file__)
19
20script.dir =  '/z/saidi/work/m5.newmem/configs/boot'
21
22linux_image = env.get('LINUX_IMAGE', disk('linux-latest.img'))
23
24class IdeControllerPciData(PciConfigData):
25    VendorID = 0x8086
26    DeviceID = 0x7111
27    Command = 0x0
28    Status = 0x280
29    Revision = 0x0
30    ClassCode = 0x01
31    SubClassCode = 0x01
32    ProgIF = 0x85
33    BAR0 = 0x00000001
34    BAR1 = 0x00000001
35    BAR2 = 0x00000001
36    BAR3 = 0x00000001
37    BAR4 = 0x00000001
38    BAR5 = 0x00000001
39    InterruptLine = 0x1f
40    InterruptPin = 0x01
41    BAR0Size = '8B'
42    BAR1Size = '4B'
43    BAR2Size = '8B'
44    BAR3Size = '4B'
45    BAR4Size = '16B'
46
47class SinicPciData(PciConfigData):
48    VendorID = 0x1291
49    DeviceID = 0x1293
50    Status = 0x0290
51    SubClassCode = 0x00
52    ClassCode = 0x02
53    ProgIF = 0x00
54    BAR0 = 0x00000000
55    BAR1 = 0x00000000
56    BAR2 = 0x00000000
57    BAR3 = 0x00000000
58    BAR4 = 0x00000000
59    BAR5 = 0x00000000
60    MaximumLatency = 0x34
61    MinimumGrant = 0xb0
62    InterruptLine = 0x1e
63    InterruptPin = 0x01
64    BAR0Size = '64kB'
65
66class NSGigEPciData(PciConfigData):
67    VendorID = 0x100B
68    DeviceID = 0x0022
69    Status = 0x0290
70    SubClassCode = 0x00
71    ClassCode = 0x02
72    ProgIF = 0x00
73    BAR0 = 0x00000001
74    BAR1 = 0x00000000
75    BAR2 = 0x00000000
76    BAR3 = 0x00000000
77    BAR4 = 0x00000000
78    BAR5 = 0x00000000
79    MaximumLatency = 0x34
80    MinimumGrant = 0xb0
81    InterruptLine = 0x1e
82    InterruptPin = 0x01
83    BAR0Size = '256B'
84    BAR1Size = '4kB'
85
86class LinuxRootDisk(IdeDisk):
87    raw_image = RawDiskImage(image_file=linux_image, read_only=True)
88    image = CowDiskImage(child=Parent.raw_image, read_only=False)
89
90class LinuxSwapDisk(IdeDisk):
91    raw_image = RawDiskImage(image_file = disk('linux-bigswap2.img'),
92                                  read_only=True)
93    image = CowDiskImage(child = Parent.raw_image, read_only=False)
94
95class SpecwebFilesetDisk(IdeDisk):
96    raw_image = RawDiskImage(image_file = disk('specweb-fileset.img'),
97                                  read_only=True)
98    image = CowDiskImage(child = Parent.raw_image, read_only=False)
99
100class BaseTsunami(Tsunami):
101    cchip = TsunamiCChip(pio_addr=0x801a0000000)
102    pchip = TsunamiPChip(pio_addr=0x80180000000)
103    pciconfig = PciConfigAll()
104    fake_sm_chip = IsaFake(pio_addr=0x801fc000370)
105
106    fake_uart1 = IsaFake(pio_addr=0x801fc0002f8)
107    fake_uart2 = IsaFake(pio_addr=0x801fc0003e8)
108    fake_uart3 = IsaFake(pio_addr=0x801fc0002e8)
109    fake_uart4 = IsaFake(pio_addr=0x801fc0003f0)
110
111    fake_ppc = IsaFake(pio_addr=0x801fc0003bc)
112
113    fake_OROM = IsaFake(pio_addr=0x800000a0000, pio_size=0x60000)
114
115    fake_pnp_addr = IsaFake(pio_addr=0x801fc000279)
116    fake_pnp_write = IsaFake(pio_addr=0x801fc000a79)
117    fake_pnp_read0 = IsaFake(pio_addr=0x801fc000203)
118    fake_pnp_read1 = IsaFake(pio_addr=0x801fc000243)
119    fake_pnp_read2 = IsaFake(pio_addr=0x801fc000283)
120    fake_pnp_read3 = IsaFake(pio_addr=0x801fc0002c3)
121    fake_pnp_read4 = IsaFake(pio_addr=0x801fc000303)
122    fake_pnp_read5 = IsaFake(pio_addr=0x801fc000343)
123    fake_pnp_read6 = IsaFake(pio_addr=0x801fc000383)
124    fake_pnp_read7 = IsaFake(pio_addr=0x801fc0003c3)
125
126    fake_ata0 = IsaFake(pio_addr=0x801fc0001f0)
127    fake_ata1 = IsaFake(pio_addr=0x801fc000170)
128
129    fb = BadDevice(pio_addr=0x801fc0003d0, devicename='FrameBuffer')
130    io = TsunamiIO(pio_addr=0x801fc000000)
131    uart = Uart8250(pio_addr=0x801fc0003f8)
132    ethernet = NSGigE(configdata=NSGigEPciData(),
133                      pci_bus=0, pci_dev=1, pci_func=0)
134    etherint = NSGigEInt(device=Parent.ethernet)
135    console = AlphaConsole(pio_addr=0x80200000000, disk=Parent.simple_disk)
136
137class LinuxTsunami(BaseTsunami):
138    disk0 = LinuxRootDisk(driveID='master')
139    disk1 = SpecwebFilesetDisk(driveID='slave')
140    disk2 = LinuxSwapDisk(driveID='master')
141    ide = IdeController(disks=[Parent.disk0, Parent.disk1, Parent.disk2],
142                        configdata=IdeControllerPciData(),
143                        pci_func=0, pci_dev=0, pci_bus=0)
144
145class MyLinuxAlphaSystem(LinuxAlphaSystem):
146    magicbus = Bus(bus_id=0)
147    magicbus2 = Bus(bus_id=1)
148    bridge = Bridge()
149    physmem = PhysicalMemory(range = AddrRange('128MB'))
150    bridge.side_a = magicbus.port
151    bridge.side_b = magicbus2.port
152    physmem.port = magicbus2.port
153    tsunami = LinuxTsunami()
154    tsunami.cchip.pio = magicbus.port
155    tsunami.pchip.pio = magicbus.port
156    tsunami.pciconfig.pio = magicbus.default
157    tsunami.fake_sm_chip.pio = magicbus.port
158    tsunami.ethernet.pio = magicbus.port
159    tsunami.ethernet.dma = magicbus.port
160    tsunami.ethernet.config = magicbus.port
161    tsunami.fake_uart1.pio = magicbus.port
162    tsunami.fake_uart2.pio = magicbus.port
163    tsunami.fake_uart3.pio = magicbus.port
164    tsunami.fake_uart4.pio = magicbus.port
165    tsunami.ide.pio = magicbus.port
166    tsunami.ide.dma = magicbus.port
167    tsunami.ide.config = magicbus.port
168    tsunami.fake_ppc.pio = magicbus.port
169    tsunami.fake_OROM.pio = magicbus.port
170    tsunami.fake_pnp_addr.pio = magicbus.port
171    tsunami.fake_pnp_write.pio = magicbus.port
172    tsunami.fake_pnp_read0.pio = magicbus.port
173    tsunami.fake_pnp_read1.pio = magicbus.port
174    tsunami.fake_pnp_read2.pio = magicbus.port
175    tsunami.fake_pnp_read3.pio = magicbus.port
176    tsunami.fake_pnp_read4.pio = magicbus.port
177    tsunami.fake_pnp_read5.pio = magicbus.port
178    tsunami.fake_pnp_read6.pio = magicbus.port
179    tsunami.fake_pnp_read7.pio = magicbus.port
180    tsunami.fake_ata0.pio = magicbus.port
181    tsunami.fake_ata1.pio = magicbus.port
182    tsunami.fb.pio = magicbus.port
183    tsunami.io.pio = magicbus.port
184    tsunami.uart.pio = magicbus.port
185    tsunami.console.pio = magicbus.port
186    raw_image = RawDiskImage(image_file=disk('linux-latest.img'),
187                             read_only=True)
188    simple_disk = SimpleDisk(disk=Parent.raw_image)
189    intrctrl = IntrControl()
190    if options.timing:
191        cpu = TimingSimpleCPU()
192        mem_mode = 'timing'
193    else:
194        cpu = AtomicSimpleCPU()
195    cpu.mem = magicbus2
196    cpu.icache_port = magicbus2.port
197    cpu.dcache_port = magicbus2.port
198    cpu.itb = AlphaITB()
199    cpu.dtb = AlphaDTB()
200    cpu.clock = '2GHz'
201    sim_console = SimConsole(listener=ConsoleListener(port=3456))
202    kernel = binary('vmlinux')
203    pal = binary('ts_osfpal')
204    console = binary('console')
205    boot_osflags = 'root=/dev/hda1 console=ttyS0'
206#    readfile = os.path.join(test_base, 'halt.sh')
207
208
209
210class TsunamiRoot(System):
211    pass
212
213
214def DualRoot(clientSystem, serverSystem):
215    self = Root()
216    self.client = clientSystem
217    self.server = serverSystem
218
219    self.etherdump = EtherDump(file='ethertrace')
220    self.etherlink = EtherLink(int1 = Parent.client.tsunami.etherint[0],
221                               int2 = Parent.server.tsunami.etherint[0],
222                               dump = Parent.etherdump)
223    self.clock = '1THz'
224    return self
225
226root = DualRoot(
227    MyLinuxAlphaSystem(readfile=script('netperf-stream-nt-client.rcS')),
228    MyLinuxAlphaSystem(readfile=script('netperf-server.rcS')))
229
230m5.instantiate(root)
231
232#exit_event = m5.simulate(2600000000000)
233#if exit_event.getCause() != "user interrupt received":
234#    m5.checkpoint(root, 'cpt')
235#    exit_event = m5.simulate(300000000000)
236#    if exit_event.getCause() != "user interrupt received":
237#        m5.checkpoint(root, 'cptA')
238
239
240exit_event = m5.simulate()
241
242print 'Exiting @ cycle', m5.curTick(), 'because', exit_event.getCause()
243