starter_se.py revision 13774
112151Sgabor.dozsa@arm.com# Copyright (c) 2016-2017 ARM Limited 212151Sgabor.dozsa@arm.com# All rights reserved. 312151Sgabor.dozsa@arm.com# 412151Sgabor.dozsa@arm.com# The license below extends only to copyright in the software and shall 512151Sgabor.dozsa@arm.com# not be construed as granting a license to any other intellectual 612151Sgabor.dozsa@arm.com# property including but not limited to intellectual property relating 712151Sgabor.dozsa@arm.com# to a hardware implementation of the functionality of the software 812151Sgabor.dozsa@arm.com# licensed hereunder. You may use the software subject to the license 912151Sgabor.dozsa@arm.com# terms below provided that you ensure that this notice is replicated 1012151Sgabor.dozsa@arm.com# unmodified and in its entirety in all distributions of the software, 1112151Sgabor.dozsa@arm.com# modified or unmodified, in source code or in binary form. 1212151Sgabor.dozsa@arm.com# 1312151Sgabor.dozsa@arm.com# Redistribution and use in source and binary forms, with or without 1412151Sgabor.dozsa@arm.com# modification, are permitted provided that the following conditions are 1512151Sgabor.dozsa@arm.com# met: redistributions of source code must retain the above copyright 1612151Sgabor.dozsa@arm.com# notice, this list of conditions and the following disclaimer; 1712151Sgabor.dozsa@arm.com# redistributions in binary form must reproduce the above copyright 1812151Sgabor.dozsa@arm.com# notice, this list of conditions and the following disclaimer in the 1912151Sgabor.dozsa@arm.com# documentation and/or other materials provided with the distribution; 2012151Sgabor.dozsa@arm.com# neither the name of the copyright holders nor the names of its 2112151Sgabor.dozsa@arm.com# contributors may be used to endorse or promote products derived from 2212151Sgabor.dozsa@arm.com# this software without specific prior written permission. 2312151Sgabor.dozsa@arm.com# 2412151Sgabor.dozsa@arm.com# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 2512151Sgabor.dozsa@arm.com# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 2612151Sgabor.dozsa@arm.com# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 2712151Sgabor.dozsa@arm.com# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 2812151Sgabor.dozsa@arm.com# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 2912151Sgabor.dozsa@arm.com# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 3012151Sgabor.dozsa@arm.com# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 3112151Sgabor.dozsa@arm.com# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 3212151Sgabor.dozsa@arm.com# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 3312151Sgabor.dozsa@arm.com# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 3412151Sgabor.dozsa@arm.com# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 3512151Sgabor.dozsa@arm.com# 3612151Sgabor.dozsa@arm.com# Authors: Andreas Sandberg 3712151Sgabor.dozsa@arm.com# Chuan Zhu 3812151Sgabor.dozsa@arm.com# Gabor Dozsa 3912151Sgabor.dozsa@arm.com# 4012151Sgabor.dozsa@arm.com 4112151Sgabor.dozsa@arm.com"""This script is the syscall emulation example script from the ARM 4212151Sgabor.dozsa@arm.comResearch Starter Kit on System Modeling. More information can be found 4312151Sgabor.dozsa@arm.comat: http://www.arm.com/ResearchEnablement/SystemModeling 4412151Sgabor.dozsa@arm.com""" 4512151Sgabor.dozsa@arm.com 4612564Sgabeblack@google.comfrom __future__ import print_function 4713774Sandreas.sandberg@arm.comfrom __future__ import absolute_import 4812564Sgabeblack@google.com 4912151Sgabor.dozsa@arm.comimport os 5012151Sgabor.dozsa@arm.comimport m5 5112151Sgabor.dozsa@arm.comfrom m5.util import addToPath 5212151Sgabor.dozsa@arm.comfrom m5.objects import * 5312151Sgabor.dozsa@arm.comimport argparse 5412151Sgabor.dozsa@arm.comimport shlex 5512151Sgabor.dozsa@arm.com 5612151Sgabor.dozsa@arm.comm5.util.addToPath('../..') 5712151Sgabor.dozsa@arm.com 5812151Sgabor.dozsa@arm.comfrom common import MemConfig 5912151Sgabor.dozsa@arm.comfrom common.cores.arm import HPI 6012151Sgabor.dozsa@arm.com 6112151Sgabor.dozsa@arm.comimport devices 6212151Sgabor.dozsa@arm.com 6312151Sgabor.dozsa@arm.com 6412151Sgabor.dozsa@arm.com 6512151Sgabor.dozsa@arm.com# Pre-defined CPU configurations. Each tuple must be ordered as : (cpu_class, 6612151Sgabor.dozsa@arm.com# l1_icache_class, l1_dcache_class, walk_cache_class, l2_Cache_class). Any of 6712151Sgabor.dozsa@arm.com# the cache class may be 'None' if the particular cache is not present. 6812151Sgabor.dozsa@arm.comcpu_types = { 6912151Sgabor.dozsa@arm.com "atomic" : ( AtomicSimpleCPU, None, None, None, None), 7012151Sgabor.dozsa@arm.com "minor" : (MinorCPU, 7112151Sgabor.dozsa@arm.com devices.L1I, devices.L1D, 7212151Sgabor.dozsa@arm.com devices.WalkCache, 7312151Sgabor.dozsa@arm.com devices.L2), 7412151Sgabor.dozsa@arm.com "hpi" : ( HPI.HPI, 7512151Sgabor.dozsa@arm.com HPI.HPI_ICache, HPI.HPI_DCache, 7612151Sgabor.dozsa@arm.com HPI.HPI_WalkCache, 7712151Sgabor.dozsa@arm.com HPI.HPI_L2) 7812151Sgabor.dozsa@arm.com} 7912151Sgabor.dozsa@arm.com 8012151Sgabor.dozsa@arm.com 8112151Sgabor.dozsa@arm.comclass SimpleSeSystem(System): 8212151Sgabor.dozsa@arm.com ''' 8312151Sgabor.dozsa@arm.com Example system class for syscall emulation mode 8412151Sgabor.dozsa@arm.com ''' 8512151Sgabor.dozsa@arm.com 8612151Sgabor.dozsa@arm.com # Use a fixed cache line size of 64 bytes 8712151Sgabor.dozsa@arm.com cache_line_size = 64 8812151Sgabor.dozsa@arm.com 8912151Sgabor.dozsa@arm.com def __init__(self, args, **kwargs): 9012151Sgabor.dozsa@arm.com super(SimpleSeSystem, self).__init__(**kwargs) 9112151Sgabor.dozsa@arm.com 9212151Sgabor.dozsa@arm.com # Setup book keeping to be able to use CpuClusters from the 9312151Sgabor.dozsa@arm.com # devices module. 9412151Sgabor.dozsa@arm.com self._clusters = [] 9512151Sgabor.dozsa@arm.com self._num_cpus = 0 9612151Sgabor.dozsa@arm.com 9712151Sgabor.dozsa@arm.com # Create a voltage and clock domain for system components 9812151Sgabor.dozsa@arm.com self.voltage_domain = VoltageDomain(voltage="3.3V") 9912151Sgabor.dozsa@arm.com self.clk_domain = SrcClockDomain(clock="1GHz", 10012151Sgabor.dozsa@arm.com voltage_domain=self.voltage_domain) 10112151Sgabor.dozsa@arm.com 10212151Sgabor.dozsa@arm.com # Create the off-chip memory bus. 10312151Sgabor.dozsa@arm.com self.membus = SystemXBar() 10412151Sgabor.dozsa@arm.com 10512151Sgabor.dozsa@arm.com # Wire up the system port that gem5 uses to load the kernel 10612151Sgabor.dozsa@arm.com # and to perform debug accesses. 10712151Sgabor.dozsa@arm.com self.system_port = self.membus.slave 10812151Sgabor.dozsa@arm.com 10912151Sgabor.dozsa@arm.com 11012151Sgabor.dozsa@arm.com # Add CPUs to the system. A cluster of CPUs typically have 11112151Sgabor.dozsa@arm.com # private L1 caches and a shared L2 cache. 11212151Sgabor.dozsa@arm.com self.cpu_cluster = devices.CpuCluster(self, 11312151Sgabor.dozsa@arm.com args.num_cores, 11412151Sgabor.dozsa@arm.com args.cpu_freq, "1.2V", 11512151Sgabor.dozsa@arm.com *cpu_types[args.cpu]) 11612151Sgabor.dozsa@arm.com 11712151Sgabor.dozsa@arm.com # Create a cache hierarchy (unless we are simulating a 11812151Sgabor.dozsa@arm.com # functional CPU in atomic memory mode) for the CPU cluster 11912151Sgabor.dozsa@arm.com # and connect it to the shared memory bus. 12012151Sgabor.dozsa@arm.com if self.cpu_cluster.memoryMode() == "timing": 12112151Sgabor.dozsa@arm.com self.cpu_cluster.addL1() 12212151Sgabor.dozsa@arm.com self.cpu_cluster.addL2(self.cpu_cluster.clk_domain) 12312151Sgabor.dozsa@arm.com self.cpu_cluster.connectMemSide(self.membus) 12412151Sgabor.dozsa@arm.com 12512151Sgabor.dozsa@arm.com # Tell gem5 about the memory mode used by the CPUs we are 12612151Sgabor.dozsa@arm.com # simulating. 12712151Sgabor.dozsa@arm.com self.mem_mode = self.cpu_cluster.memoryMode() 12812151Sgabor.dozsa@arm.com 12912151Sgabor.dozsa@arm.com def numCpuClusters(self): 13012151Sgabor.dozsa@arm.com return len(self._clusters) 13112151Sgabor.dozsa@arm.com 13212151Sgabor.dozsa@arm.com def addCpuCluster(self, cpu_cluster, num_cpus): 13312151Sgabor.dozsa@arm.com assert cpu_cluster not in self._clusters 13412151Sgabor.dozsa@arm.com assert num_cpus > 0 13512151Sgabor.dozsa@arm.com self._clusters.append(cpu_cluster) 13612151Sgabor.dozsa@arm.com self._num_cpus += num_cpus 13712151Sgabor.dozsa@arm.com 13812151Sgabor.dozsa@arm.com def numCpus(self): 13912151Sgabor.dozsa@arm.com return self._num_cpus 14012151Sgabor.dozsa@arm.com 14112151Sgabor.dozsa@arm.comdef get_processes(cmd): 14212151Sgabor.dozsa@arm.com """Interprets commands to run and returns a list of processes""" 14312151Sgabor.dozsa@arm.com 14412151Sgabor.dozsa@arm.com cwd = os.getcwd() 14512151Sgabor.dozsa@arm.com multiprocesses = [] 14612151Sgabor.dozsa@arm.com for idx, c in enumerate(cmd): 14712151Sgabor.dozsa@arm.com argv = shlex.split(c) 14812151Sgabor.dozsa@arm.com 14912151Sgabor.dozsa@arm.com process = Process(pid=100 + idx, cwd=cwd, cmd=argv, executable=argv[0]) 15012151Sgabor.dozsa@arm.com 15112564Sgabeblack@google.com print("info: %d. command and arguments: %s" % (idx + 1, process.cmd)) 15212151Sgabor.dozsa@arm.com multiprocesses.append(process) 15312151Sgabor.dozsa@arm.com 15412151Sgabor.dozsa@arm.com return multiprocesses 15512151Sgabor.dozsa@arm.com 15612151Sgabor.dozsa@arm.com 15712151Sgabor.dozsa@arm.comdef create(args): 15812151Sgabor.dozsa@arm.com ''' Create and configure the system object. ''' 15912151Sgabor.dozsa@arm.com 16012151Sgabor.dozsa@arm.com system = SimpleSeSystem(args) 16112151Sgabor.dozsa@arm.com 16212151Sgabor.dozsa@arm.com # Tell components about the expected physical memory ranges. This 16312151Sgabor.dozsa@arm.com # is, for example, used by the MemConfig helper to determine where 16412151Sgabor.dozsa@arm.com # to map DRAMs in the physical address space. 16512151Sgabor.dozsa@arm.com system.mem_ranges = [ AddrRange(start=0, size=args.mem_size) ] 16612151Sgabor.dozsa@arm.com 16712151Sgabor.dozsa@arm.com # Configure the off-chip memory system. 16812151Sgabor.dozsa@arm.com MemConfig.config_mem(args, system) 16912151Sgabor.dozsa@arm.com 17012151Sgabor.dozsa@arm.com # Parse the command line and get a list of Processes instances 17112151Sgabor.dozsa@arm.com # that we can pass to gem5. 17212151Sgabor.dozsa@arm.com processes = get_processes(args.commands_to_run) 17312151Sgabor.dozsa@arm.com if len(processes) != args.num_cores: 17412564Sgabeblack@google.com print("Error: Cannot map %d command(s) onto %d CPU(s)" % 17512564Sgabeblack@google.com (len(processes), args.num_cores)) 17612151Sgabor.dozsa@arm.com sys.exit(1) 17712151Sgabor.dozsa@arm.com 17812151Sgabor.dozsa@arm.com # Assign one workload to each CPU 17912151Sgabor.dozsa@arm.com for cpu, workload in zip(system.cpu_cluster.cpus, processes): 18012151Sgabor.dozsa@arm.com cpu.workload = workload 18112151Sgabor.dozsa@arm.com 18212151Sgabor.dozsa@arm.com return system 18312151Sgabor.dozsa@arm.com 18412151Sgabor.dozsa@arm.com 18512151Sgabor.dozsa@arm.comdef main(): 18612151Sgabor.dozsa@arm.com parser = argparse.ArgumentParser(epilog=__doc__) 18712151Sgabor.dozsa@arm.com 18812151Sgabor.dozsa@arm.com parser.add_argument("commands_to_run", metavar="command(s)", nargs='*', 18912151Sgabor.dozsa@arm.com help="Command(s) to run") 19012151Sgabor.dozsa@arm.com parser.add_argument("--cpu", type=str, choices=cpu_types.keys(), 19112151Sgabor.dozsa@arm.com default="atomic", 19212151Sgabor.dozsa@arm.com help="CPU model to use") 19312151Sgabor.dozsa@arm.com parser.add_argument("--cpu-freq", type=str, default="4GHz") 19412151Sgabor.dozsa@arm.com parser.add_argument("--num-cores", type=int, default=1, 19512151Sgabor.dozsa@arm.com help="Number of CPU cores") 19612151Sgabor.dozsa@arm.com parser.add_argument("--mem-type", default="DDR3_1600_8x8", 19712151Sgabor.dozsa@arm.com choices=MemConfig.mem_names(), 19812151Sgabor.dozsa@arm.com help = "type of memory to use") 19912151Sgabor.dozsa@arm.com parser.add_argument("--mem-channels", type=int, default=2, 20012151Sgabor.dozsa@arm.com help = "number of memory channels") 20112151Sgabor.dozsa@arm.com parser.add_argument("--mem-ranks", type=int, default=None, 20212151Sgabor.dozsa@arm.com help = "number of memory ranks per channel") 20312151Sgabor.dozsa@arm.com parser.add_argument("--mem-size", action="store", type=str, 20412151Sgabor.dozsa@arm.com default="2GB", 20512151Sgabor.dozsa@arm.com help="Specify the physical memory size") 20612151Sgabor.dozsa@arm.com 20712151Sgabor.dozsa@arm.com args = parser.parse_args() 20812151Sgabor.dozsa@arm.com 20912151Sgabor.dozsa@arm.com # Create a single root node for gem5's object hierarchy. There can 21012151Sgabor.dozsa@arm.com # only exist one root node in the simulator at any given 21112151Sgabor.dozsa@arm.com # time. Tell gem5 that we want to use syscall emulation mode 21212151Sgabor.dozsa@arm.com # instead of full system mode. 21312151Sgabor.dozsa@arm.com root = Root(full_system=False) 21412151Sgabor.dozsa@arm.com 21512151Sgabor.dozsa@arm.com # Populate the root node with a system. A system corresponds to a 21612151Sgabor.dozsa@arm.com # single node with shared memory. 21712151Sgabor.dozsa@arm.com root.system = create(args) 21812151Sgabor.dozsa@arm.com 21912151Sgabor.dozsa@arm.com # Instantiate the C++ object hierarchy. After this point, 22012151Sgabor.dozsa@arm.com # SimObjects can't be instantiated anymore. 22112151Sgabor.dozsa@arm.com m5.instantiate() 22212151Sgabor.dozsa@arm.com 22312151Sgabor.dozsa@arm.com # Start the simulator. This gives control to the C++ world and 22412151Sgabor.dozsa@arm.com # starts the simulator. The returned event tells the simulation 22512151Sgabor.dozsa@arm.com # script why the simulator exited. 22612151Sgabor.dozsa@arm.com event = m5.simulate() 22712151Sgabor.dozsa@arm.com 22812151Sgabor.dozsa@arm.com # Print the reason for the simulation exit. Some exit codes are 22912151Sgabor.dozsa@arm.com # requests for service (e.g., checkpoints) from the simulation 23012151Sgabor.dozsa@arm.com # script. We'll just ignore them here and exit. 23112564Sgabeblack@google.com print(event.getCause(), " @ ", m5.curTick()) 23212151Sgabor.dozsa@arm.com sys.exit(event.getCode()) 23312151Sgabor.dozsa@arm.com 23412151Sgabor.dozsa@arm.com 23512151Sgabor.dozsa@arm.comif __name__ == "__m5_main__": 23612151Sgabor.dozsa@arm.com main() 237