starter_fs.py revision 12564:2778478ca882 
1# Copyright (c) 2016-2017 ARM Limited
2# All rights reserved.
3#
4# The license below extends only to copyright in the software and shall
5# not be construed as granting a license to any other intellectual
6# property including but not limited to intellectual property relating
7# to a hardware implementation of the functionality of the software
8# licensed hereunder.  You may use the software subject to the license
9# terms below provided that you ensure that this notice is replicated
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11# modified or unmodified, in source code or in binary form.
12#
13# Redistribution and use in source and binary forms, with or without
14# modification, are permitted provided that the following conditions are
15# met: redistributions of source code must retain the above copyright
16# notice, this list of conditions and the following disclaimer;
17# redistributions in binary form must reproduce the above copyright
18# notice, this list of conditions and the following disclaimer in the
19# documentation and/or other materials provided with the distribution;
20# neither the name of the copyright holders nor the names of its
21# contributors may be used to endorse or promote products derived from
22# this software without specific prior written permission.
23#
24# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
25# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
26# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
27# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
28# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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30# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
31# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
32# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
33# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
34# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35#
36#  Authors:  Andreas Sandberg
37#            Chuan Zhu
38#            Gabor Dozsa
39#
40
41"""This script is the full system example script from the ARM
42Research Starter Kit on System Modeling. More information can be found
43at: http://www.arm.com/ResearchEnablement/SystemModeling
44"""
45
46from __future__ import print_function
47
48import os
49import m5
50from m5.util import addToPath
51from m5.objects import *
52import argparse
53
54m5.util.addToPath('../..')
55
56from common import SysPaths
57from common import MemConfig
58from common.cores.arm import HPI
59
60import devices
61
62
63default_dist_version = '20170616'
64default_kernel = 'vmlinux.vexpress_gem5_v1_64.' + default_dist_version
65default_disk = 'linaro-minimal-aarch64.img'
66
67
68# Pre-defined CPU configurations. Each tuple must be ordered as : (cpu_class,
69# l1_icache_class, l1_dcache_class, walk_cache_class, l2_Cache_class). Any of
70# the cache class may be 'None' if the particular cache is not present.
71cpu_types = {
72
73    "atomic" : ( AtomicSimpleCPU, None, None, None, None),
74    "minor" : (MinorCPU,
75               devices.L1I, devices.L1D,
76               devices.WalkCache,
77               devices.L2),
78    "hpi" : ( HPI.HPI,
79              HPI.HPI_ICache, HPI.HPI_DCache,
80              HPI.HPI_WalkCache,
81              HPI.HPI_L2)
82}
83
84def create_cow_image(name):
85    """Helper function to create a Copy-on-Write disk image"""
86    image = CowDiskImage()
87    image.child.image_file = SysPaths.disk(name)
88
89    return image;
90
91
92def create(args):
93    ''' Create and configure the system object. '''
94
95    if not args.dtb:
96        dtb_file = SysPaths.binary("armv8_gem5_v1_%icpu.%s.dtb" %
97                                   (args.num_cores, default_dist_version))
98    else:
99        dtb_file = args.dtb
100
101    if args.script and not os.path.isfile(args.script):
102        print("Error: Bootscript %s does not exist" % args.script)
103        sys.exit(1)
104
105    cpu_class = cpu_types[args.cpu][0]
106    mem_mode = cpu_class.memory_mode()
107    # Only simulate caches when using a timing CPU (e.g., the HPI model)
108    want_caches = True if mem_mode == "timing" else False
109
110    system = devices.SimpleSystem(want_caches,
111                                  args.mem_size,
112                                  mem_mode=mem_mode,
113                                  dtb_filename=dtb_file,
114                                  kernel=SysPaths.binary(args.kernel),
115                                  readfile=args.script)
116
117    MemConfig.config_mem(args, system)
118
119    # Add the PCI devices we need for this system. The base system
120    # doesn't have any PCI devices by default since they are assumed
121    # to be added by the configurastion scripts needin them.
122    system.pci_devices = [
123        # Create a VirtIO block device for the system's boot
124        # disk. Attach the disk image using gem5's Copy-on-Write
125        # functionality to avoid writing changes to the stored copy of
126        # the disk image.
127        PciVirtIO(vio=VirtIOBlock(image=create_cow_image(args.disk_image))),
128    ]
129
130    # Attach the PCI devices to the system. The helper method in the
131    # system assigns a unique PCI bus ID to each of the devices and
132    # connects them to the IO bus.
133    for dev in system.pci_devices:
134        system.attach_pci(dev)
135
136    # Wire up the system's memory system
137    system.connect()
138
139    # Add CPU clusters to the system
140    system.cpu_cluster = [
141        devices.CpuCluster(system,
142                           args.num_cores,
143                           args.cpu_freq, "1.0V",
144                           *cpu_types[args.cpu]),
145    ]
146
147    # Create a cache hierarchy for the cluster. We are assuming that
148    # clusters have core-private L1 caches and an L2 that's shared
149    # within the cluster.
150    for cluster in system.cpu_cluster:
151        system.addCaches(want_caches, last_cache_level=2)
152
153    # Setup gem5's minimal Linux boot loader.
154    system.realview.setupBootLoader(system.membus, system, SysPaths.binary)
155
156    # Linux boot command flags
157    kernel_cmd = [
158        # Tell Linux to use the simulated serial port as a console
159        "console=ttyAMA0",
160        # Hard-code timi
161        "lpj=19988480",
162        # Disable address space randomisation to get a consistent
163        # memory layout.
164        "norandmaps",
165        # Tell Linux where to find the root disk image.
166        "root=/dev/vda1",
167        # Mount the root disk read-write by default.
168        "rw",
169        # Tell Linux about the amount of physical memory present.
170        "mem=%s" % args.mem_size,
171    ]
172    system.boot_osflags = " ".join(kernel_cmd)
173
174    return system
175
176
177def run(args):
178    cptdir = m5.options.outdir
179    if args.checkpoint:
180        print("Checkpoint directory: %s" % cptdir)
181
182    while True:
183        event = m5.simulate()
184        exit_msg = event.getCause()
185        if exit_msg == "checkpoint":
186            print("Dropping checkpoint at tick %d" % m5.curTick())
187            cpt_dir = os.path.join(m5.options.outdir, "cpt.%d" % m5.curTick())
188            m5.checkpoint(os.path.join(cpt_dir))
189            print("Checkpoint done.")
190        else:
191            print(exit_msg, " @ ", m5.curTick())
192            break
193
194    sys.exit(event.getCode())
195
196
197def main():
198    parser = argparse.ArgumentParser(epilog=__doc__)
199
200    parser.add_argument("--dtb", type=str, default=None,
201                        help="DTB file to load")
202    parser.add_argument("--kernel", type=str, default=default_kernel,
203                        help="Linux kernel")
204    parser.add_argument("--disk-image", type=str,
205                        default=default_disk,
206                        help="Disk to instantiate")
207    parser.add_argument("--script", type=str, default="",
208                        help = "Linux bootscript")
209    parser.add_argument("--cpu", type=str, choices=cpu_types.keys(),
210                        default="atomic",
211                        help="CPU model to use")
212    parser.add_argument("--cpu-freq", type=str, default="4GHz")
213    parser.add_argument("--num-cores", type=int, default=1,
214                        help="Number of CPU cores")
215    parser.add_argument("--mem-type", default="DDR3_1600_8x8",
216                        choices=MemConfig.mem_names(),
217                        help = "type of memory to use")
218    parser.add_argument("--mem-channels", type=int, default=1,
219                        help = "number of memory channels")
220    parser.add_argument("--mem-ranks", type=int, default=None,
221                        help = "number of memory ranks per channel")
222    parser.add_argument("--mem-size", action="store", type=str,
223                        default="2GB",
224                        help="Specify the physical memory size")
225    parser.add_argument("--checkpoint", action="store_true")
226    parser.add_argument("--restore", type=str, default=None)
227
228
229    args = parser.parse_args()
230
231    root = Root(full_system=True)
232    root.system = create(args)
233
234    if args.restore is not None:
235        m5.instantiate(args.restore)
236    else:
237        m5.instantiate()
238
239    run(args)
240
241
242if __name__ == "__m5_main__":
243    main()
244