starter_fs.py revision 13609
11689SN/A# Copyright (c) 2016-2017 ARM Limited 212109SRekai.GonzalezAlberquilla@arm.com# All rights reserved. 312109SRekai.GonzalezAlberquilla@arm.com# 412109SRekai.GonzalezAlberquilla@arm.com# The license below extends only to copyright in the software and shall 512109SRekai.GonzalezAlberquilla@arm.com# not be construed as granting a license to any other intellectual 612109SRekai.GonzalezAlberquilla@arm.com# property including but not limited to intellectual property relating 712109SRekai.GonzalezAlberquilla@arm.com# to a hardware implementation of the functionality of the software 812109SRekai.GonzalezAlberquilla@arm.com# licensed hereunder. You may use the software subject to the license 912109SRekai.GonzalezAlberquilla@arm.com# terms below provided that you ensure that this notice is replicated 1012109SRekai.GonzalezAlberquilla@arm.com# unmodified and in its entirety in all distributions of the software, 1112109SRekai.GonzalezAlberquilla@arm.com# modified or unmodified, in source code or in binary form. 1212109SRekai.GonzalezAlberquilla@arm.com# 1312109SRekai.GonzalezAlberquilla@arm.com# Redistribution and use in source and binary forms, with or without 141689SN/A# modification, are permitted provided that the following conditions are 159919Ssteve.reinhardt@amd.com# met: redistributions of source code must retain the above copyright 161689SN/A# notice, this list of conditions and the following disclaimer; 171689SN/A# redistributions in binary form must reproduce the above copyright 181689SN/A# notice, this list of conditions and the following disclaimer in the 191689SN/A# documentation and/or other materials provided with the distribution; 201689SN/A# neither the name of the copyright holders nor the names of its 211689SN/A# contributors may be used to endorse or promote products derived from 221689SN/A# this software without specific prior written permission. 231689SN/A# 241689SN/A# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 251689SN/A# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 261689SN/A# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 271689SN/A# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 281689SN/A# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 291689SN/A# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 301689SN/A# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 311689SN/A# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 321689SN/A# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 331689SN/A# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 341689SN/A# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 351689SN/A# 361689SN/A# Authors: Andreas Sandberg 371689SN/A# Chuan Zhu 381689SN/A# Gabor Dozsa 391689SN/A# 402665Ssaidi@eecs.umich.edu 412665Ssaidi@eecs.umich.edu"""This script is the full system example script from the ARM 421689SN/AResearch Starter Kit on System Modeling. More information can be found 431689SN/Aat: http://www.arm.com/ResearchEnablement/SystemModeling 442292SN/A""" 452292SN/A 461060SN/Afrom __future__ import print_function 471060SN/A 481060SN/Aimport os 4912105Snathanael.premillieu@arm.comimport m5 501060SN/Afrom m5.util import addToPath 5112334Sgabeblack@google.comfrom m5.objects import * 521684SN/Afrom m5.options import * 531717SN/Aimport argparse 549919Ssteve.reinhardt@amd.com 558232Snate@binkert.orgm5.util.addToPath('../..') 561060SN/A 571060SN/Afrom common import SysPaths 589919Ssteve.reinhardt@amd.comfrom common import MemConfig 599919Ssteve.reinhardt@amd.comfrom common.cores.arm import HPI 609919Ssteve.reinhardt@amd.com 619919Ssteve.reinhardt@amd.comimport devices 629919Ssteve.reinhardt@amd.com 639919Ssteve.reinhardt@amd.com 649919Ssteve.reinhardt@amd.comdefault_dist_version = '20170616' 659919Ssteve.reinhardt@amd.comdefault_kernel = 'vmlinux.vexpress_gem5_v1_64.' + default_dist_version 669919Ssteve.reinhardt@amd.comdefault_disk = 'linaro-minimal-aarch64.img' 679919Ssteve.reinhardt@amd.com 689919Ssteve.reinhardt@amd.com 6912105Snathanael.premillieu@arm.com# Pre-defined CPU configurations. Each tuple must be ordered as : (cpu_class, 709919Ssteve.reinhardt@amd.com# l1_icache_class, l1_dcache_class, walk_cache_class, l2_Cache_class). Any of 719919Ssteve.reinhardt@amd.com# the cache class may be 'None' if the particular cache is not present. 729919Ssteve.reinhardt@amd.comcpu_types = { 739919Ssteve.reinhardt@amd.com 749919Ssteve.reinhardt@amd.com "atomic" : ( AtomicSimpleCPU, None, None, None, None), 759919Ssteve.reinhardt@amd.com "minor" : (MinorCPU, 7612105Snathanael.premillieu@arm.com devices.L1I, devices.L1D, 779919Ssteve.reinhardt@amd.com devices.WalkCache, 7812109SRekai.GonzalezAlberquilla@arm.com devices.L2), 7912109SRekai.GonzalezAlberquilla@arm.com "hpi" : ( HPI.HPI, 8012109SRekai.GonzalezAlberquilla@arm.com HPI.HPI_ICache, HPI.HPI_DCache, 8112109SRekai.GonzalezAlberquilla@arm.com HPI.HPI_WalkCache, 8212109SRekai.GonzalezAlberquilla@arm.com HPI.HPI_L2) 8312109SRekai.GonzalezAlberquilla@arm.com} 8412109SRekai.GonzalezAlberquilla@arm.com 8512109SRekai.GonzalezAlberquilla@arm.comdef create_cow_image(name): 8612109SRekai.GonzalezAlberquilla@arm.com """Helper function to create a Copy-on-Write disk image""" 8712109SRekai.GonzalezAlberquilla@arm.com image = CowDiskImage() 889919Ssteve.reinhardt@amd.com image.child.image_file = SysPaths.disk(name) 8912105Snathanael.premillieu@arm.com 909919Ssteve.reinhardt@amd.com return image; 919919Ssteve.reinhardt@amd.com 9212105Snathanael.premillieu@arm.com 939919Ssteve.reinhardt@amd.comdef create(args): 949919Ssteve.reinhardt@amd.com ''' Create and configure the system object. ''' 959919Ssteve.reinhardt@amd.com 969919Ssteve.reinhardt@amd.com if args.script and not os.path.isfile(args.script): 979919Ssteve.reinhardt@amd.com print("Error: Bootscript %s does not exist" % args.script) 989919Ssteve.reinhardt@amd.com sys.exit(1) 999919Ssteve.reinhardt@amd.com 1009919Ssteve.reinhardt@amd.com cpu_class = cpu_types[args.cpu][0] 1019919Ssteve.reinhardt@amd.com mem_mode = cpu_class.memory_mode() 1029919Ssteve.reinhardt@amd.com # Only simulate caches when using a timing CPU (e.g., the HPI model) 1039919Ssteve.reinhardt@amd.com want_caches = True if mem_mode == "timing" else False 1049919Ssteve.reinhardt@amd.com 1059919Ssteve.reinhardt@amd.com system = devices.SimpleSystem(want_caches, 1061060SN/A args.mem_size, 1071060SN/A mem_mode=mem_mode, 1081060SN/A kernel=SysPaths.binary(args.kernel), 1091060SN/A readfile=args.script) 1101060SN/A 1111060SN/A MemConfig.config_mem(args, system) 1121060SN/A 1132292SN/A # Add the PCI devices we need for this system. The base system 1142292SN/A # doesn't have any PCI devices by default since they are assumed 1152292SN/A # to be added by the configurastion scripts needin them. 1161060SN/A system.pci_devices = [ 1171060SN/A # Create a VirtIO block device for the system's boot 1189919Ssteve.reinhardt@amd.com # disk. Attach the disk image using gem5's Copy-on-Write 1191060SN/A # functionality to avoid writing changes to the stored copy of 1201060SN/A # the disk image. 1219919Ssteve.reinhardt@amd.com PciVirtIO(vio=VirtIOBlock(image=create_cow_image(args.disk_image))), 1229919Ssteve.reinhardt@amd.com ] 1239919Ssteve.reinhardt@amd.com 1249919Ssteve.reinhardt@amd.com # Attach the PCI devices to the system. The helper method in the 1259919Ssteve.reinhardt@amd.com # system assigns a unique PCI bus ID to each of the devices and 1261060SN/A # connects them to the IO bus. 1279919Ssteve.reinhardt@amd.com for dev in system.pci_devices: 1281060SN/A system.attach_pci(dev) 1291060SN/A 1309919Ssteve.reinhardt@amd.com # Wire up the system's memory system 1311060SN/A system.connect() 13212109SRekai.GonzalezAlberquilla@arm.com 13312109SRekai.GonzalezAlberquilla@arm.com # Add CPU clusters to the system 13412109SRekai.GonzalezAlberquilla@arm.com system.cpu_cluster = [ 13512109SRekai.GonzalezAlberquilla@arm.com devices.CpuCluster(system, 13612109SRekai.GonzalezAlberquilla@arm.com args.num_cores, 13712109SRekai.GonzalezAlberquilla@arm.com args.cpu_freq, "1.0V", 13812109SRekai.GonzalezAlberquilla@arm.com *cpu_types[args.cpu]), 13912109SRekai.GonzalezAlberquilla@arm.com ] 14012109SRekai.GonzalezAlberquilla@arm.com 1419920Syasuko.eckert@amd.com # Create a cache hierarchy for the cluster. We are assuming that 1429920Syasuko.eckert@amd.com # clusters have core-private L1 caches and an L2 that's shared 1439920Syasuko.eckert@amd.com # within the cluster. 1449919Ssteve.reinhardt@amd.com for cluster in system.cpu_cluster: 1459919Ssteve.reinhardt@amd.com system.addCaches(want_caches, last_cache_level=2) 1469919Ssteve.reinhardt@amd.com 1479919Ssteve.reinhardt@amd.com # Setup gem5's minimal Linux boot loader. 1489919Ssteve.reinhardt@amd.com system.realview.setupBootLoader(system.membus, system, SysPaths.binary) 1491060SN/A 1509919Ssteve.reinhardt@amd.com if args.dtb: 1519919Ssteve.reinhardt@amd.com system.dtb_filename = args.dtb 1529919Ssteve.reinhardt@amd.com else: 1539919Ssteve.reinhardt@amd.com # No DTB specified: autogenerate DTB 1549919Ssteve.reinhardt@amd.com system.generateDtb(m5.options.outdir, 'system.dtb') 1559919Ssteve.reinhardt@amd.com 1561060SN/A # Linux boot command flags 1571060SN/A kernel_cmd = [ 1582292SN/A # Tell Linux to use the simulated serial port as a console 1592292SN/A "console=ttyAMA0", 1609919Ssteve.reinhardt@amd.com # Hard-code timi 1619919Ssteve.reinhardt@amd.com "lpj=19988480", 1622292SN/A # Disable address space randomisation to get a consistent 1639919Ssteve.reinhardt@amd.com # memory layout. 1649919Ssteve.reinhardt@amd.com "norandmaps", 1652292SN/A # Tell Linux where to find the root disk image. 1669919Ssteve.reinhardt@amd.com "root=/dev/vda1", 1671060SN/A # Mount the root disk read-write by default. 1682292SN/A "rw", 1699919Ssteve.reinhardt@amd.com # Tell Linux about the amount of physical memory present. 1702292SN/A "mem=%s" % args.mem_size, 1719920Syasuko.eckert@amd.com ] 1729920Syasuko.eckert@amd.com system.boot_osflags = " ".join(kernel_cmd) 1739920Syasuko.eckert@amd.com 1742292SN/A return system 17512105Snathanael.premillieu@arm.com 1761060SN/A 1772292SN/Adef run(args): 17812105Snathanael.premillieu@arm.com cptdir = m5.options.outdir 1791060SN/A if args.checkpoint: 18012109SRekai.GonzalezAlberquilla@arm.com print("Checkpoint directory: %s" % cptdir) 18112109SRekai.GonzalezAlberquilla@arm.com 18212109SRekai.GonzalezAlberquilla@arm.com while True: 18312109SRekai.GonzalezAlberquilla@arm.com event = m5.simulate() 18412109SRekai.GonzalezAlberquilla@arm.com exit_msg = event.getCause() 18512109SRekai.GonzalezAlberquilla@arm.com if exit_msg == "checkpoint": 1869920Syasuko.eckert@amd.com print("Dropping checkpoint at tick %d" % m5.curTick()) 18712105Snathanael.premillieu@arm.com cpt_dir = os.path.join(m5.options.outdir, "cpt.%d" % m5.curTick()) 1889920Syasuko.eckert@amd.com m5.checkpoint(os.path.join(cpt_dir)) 1892292SN/A print("Checkpoint done.") 19012105Snathanael.premillieu@arm.com else: 1911060SN/A print(exit_msg, " @ ", m5.curTick()) 19212109SRekai.GonzalezAlberquilla@arm.com break 19312109SRekai.GonzalezAlberquilla@arm.com 19412109SRekai.GonzalezAlberquilla@arm.com sys.exit(event.getCode()) 19512109SRekai.GonzalezAlberquilla@arm.com 1962292SN/A 19712105Snathanael.premillieu@arm.comdef main(): 1981060SN/A parser = argparse.ArgumentParser(epilog=__doc__) 1992292SN/A 20012105Snathanael.premillieu@arm.com parser.add_argument("--dtb", type=str, default=None, 2011060SN/A help="DTB file to load") 20212109SRekai.GonzalezAlberquilla@arm.com parser.add_argument("--kernel", type=str, default=default_kernel, 20312109SRekai.GonzalezAlberquilla@arm.com help="Linux kernel") 20412109SRekai.GonzalezAlberquilla@arm.com parser.add_argument("--disk-image", type=str, 20512109SRekai.GonzalezAlberquilla@arm.com default=default_disk, 20612109SRekai.GonzalezAlberquilla@arm.com help="Disk to instantiate") 20712109SRekai.GonzalezAlberquilla@arm.com parser.add_argument("--script", type=str, default="", 20812109SRekai.GonzalezAlberquilla@arm.com help = "Linux bootscript") 20912109SRekai.GonzalezAlberquilla@arm.com parser.add_argument("--cpu", type=str, choices=cpu_types.keys(), 2109920Syasuko.eckert@amd.com default="atomic", 21112105Snathanael.premillieu@arm.com help="CPU model to use") 2129920Syasuko.eckert@amd.com parser.add_argument("--cpu-freq", type=str, default="4GHz") 2132292SN/A parser.add_argument("--num-cores", type=int, default=1, 2149919Ssteve.reinhardt@amd.com help="Number of CPU cores") 2151060SN/A parser.add_argument("--mem-type", default="DDR3_1600_8x8", 2162292SN/A choices=MemConfig.mem_names(), 2179919Ssteve.reinhardt@amd.com help = "type of memory to use") 2181060SN/A parser.add_argument("--mem-channels", type=int, default=1, 21912109SRekai.GonzalezAlberquilla@arm.com help = "number of memory channels") 22012109SRekai.GonzalezAlberquilla@arm.com parser.add_argument("--mem-ranks", type=int, default=None, 22112109SRekai.GonzalezAlberquilla@arm.com help = "number of memory ranks per channel") 22212109SRekai.GonzalezAlberquilla@arm.com parser.add_argument("--mem-size", action="store", type=str, 22312109SRekai.GonzalezAlberquilla@arm.com default="2GB", 22412109SRekai.GonzalezAlberquilla@arm.com help="Specify the physical memory size") 2259920Syasuko.eckert@amd.com parser.add_argument("--checkpoint", action="store_true") 2269920Syasuko.eckert@amd.com parser.add_argument("--restore", type=str, default=None) 2279920Syasuko.eckert@amd.com 2282292SN/A 2299919Ssteve.reinhardt@amd.com args = parser.parse_args() 2301060SN/A 2312292SN/A root = Root(full_system=True) 2329919Ssteve.reinhardt@amd.com root.system = create(args) 2339920Syasuko.eckert@amd.com 23412109SRekai.GonzalezAlberquilla@arm.com if args.restore is not None: 23512109SRekai.GonzalezAlberquilla@arm.com m5.instantiate(args.restore) 23612109SRekai.GonzalezAlberquilla@arm.com else: 2379920Syasuko.eckert@amd.com m5.instantiate() 2389920Syasuko.eckert@amd.com 2391060SN/A run(args) 2401060SN/A 24112109SRekai.GonzalezAlberquilla@arm.com 24212109SRekai.GonzalezAlberquilla@arm.comif __name__ == "__m5_main__": 24312109SRekai.GonzalezAlberquilla@arm.com main() 24412109SRekai.GonzalezAlberquilla@arm.com