starter_fs.py revision 12150
18586Sgblack@eecs.umich.edu# Copyright (c) 2016-2017 ARM Limited 28586Sgblack@eecs.umich.edu# All rights reserved. 38586Sgblack@eecs.umich.edu# 48586Sgblack@eecs.umich.edu# The license below extends only to copyright in the software and shall 58586Sgblack@eecs.umich.edu# not be construed as granting a license to any other intellectual 68586Sgblack@eecs.umich.edu# property including but not limited to intellectual property relating 78586Sgblack@eecs.umich.edu# to a hardware implementation of the functionality of the software 88586Sgblack@eecs.umich.edu# licensed hereunder. You may use the software subject to the license 98586Sgblack@eecs.umich.edu# terms below provided that you ensure that this notice is replicated 108586Sgblack@eecs.umich.edu# unmodified and in its entirety in all distributions of the software, 118586Sgblack@eecs.umich.edu# modified or unmodified, in source code or in binary form. 128586Sgblack@eecs.umich.edu# 138586Sgblack@eecs.umich.edu# Redistribution and use in source and binary forms, with or without 148586Sgblack@eecs.umich.edu# modification, are permitted provided that the following conditions are 158586Sgblack@eecs.umich.edu# met: redistributions of source code must retain the above copyright 168586Sgblack@eecs.umich.edu# notice, this list of conditions and the following disclaimer; 178586Sgblack@eecs.umich.edu# redistributions in binary form must reproduce the above copyright 188586Sgblack@eecs.umich.edu# notice, this list of conditions and the following disclaimer in the 198586Sgblack@eecs.umich.edu# documentation and/or other materials provided with the distribution; 208586Sgblack@eecs.umich.edu# neither the name of the copyright holders nor the names of its 218586Sgblack@eecs.umich.edu# contributors may be used to endorse or promote products derived from 228586Sgblack@eecs.umich.edu# this software without specific prior written permission. 238586Sgblack@eecs.umich.edu# 248586Sgblack@eecs.umich.edu# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 258586Sgblack@eecs.umich.edu# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 268586Sgblack@eecs.umich.edu# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 278586Sgblack@eecs.umich.edu# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 288586Sgblack@eecs.umich.edu# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 298586Sgblack@eecs.umich.edu# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 308586Sgblack@eecs.umich.edu# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 318586Sgblack@eecs.umich.edu# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 328586Sgblack@eecs.umich.edu# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 338586Sgblack@eecs.umich.edu# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 348801Sgblack@eecs.umich.edu# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 358586Sgblack@eecs.umich.edu# 368586Sgblack@eecs.umich.edu# Authors: Andreas Sandberg 37# Chuan Zhu 38# Gabor Dozsa 39# 40 41"""This script is the full system example script from the ARM 42Research Starter Kit on System Modeling. More information can be found 43at: http://www.arm.com/ResearchEnablement/SystemModeling 44""" 45 46import os 47import m5 48from m5.util import addToPath 49from m5.objects import * 50import argparse 51 52m5.util.addToPath('../..') 53 54from common import SysPaths 55from common import MemConfig 56from common.cores.arm import HPI 57 58import devices 59 60 61default_dist_version = '20170616' 62default_kernel = 'vmlinux.vexpress_gem5_v1_64.' + default_dist_version 63default_disk = 'linaro-minimal-aarch64.img' 64 65 66# Pre-defined CPU configurations. Each tuple must be ordered as : (cpu_class, 67# l1_icache_class, l1_dcache_class, walk_cache_class, l2_Cache_class). Any of 68# the cache class may be 'None' if the particular cache is not present. 69cpu_types = { 70 71 "atomic" : ( AtomicSimpleCPU, None, None, None, None), 72 "minor" : (MinorCPU, 73 devices.L1I, devices.L1D, 74 devices.WalkCache, 75 devices.L2), 76 "hpi" : ( HPI.HPI, 77 HPI.HPI_ICache, HPI.HPI_DCache, 78 HPI.HPI_WalkCache, 79 HPI.HPI_L2) 80} 81 82def create_cow_image(name): 83 """Helper function to create a Copy-on-Write disk image""" 84 image = CowDiskImage() 85 image.child.image_file = SysPaths.disk(name) 86 87 return image; 88 89 90def create(args): 91 ''' Create and configure the system object. ''' 92 93 if not args.dtb: 94 dtb_file = SysPaths.binary("armv8_gem5_v1_%icpu.%s.dtb" % 95 (args.num_cores, default_dist_version)) 96 else: 97 dtb_file = args.dtb 98 99 if args.script and not os.path.isfile(args.script): 100 print "Error: Bootscript %s does not exist" % args.script 101 sys.exit(1) 102 103 cpu_class = cpu_types[args.cpu][0] 104 mem_mode = cpu_class.memory_mode() 105 # Only simulate caches when using a timing CPU (e.g., the HPI model) 106 want_caches = True if mem_mode == "timing" else False 107 108 system = devices.SimpleSystem(want_caches, 109 args.mem_size, 110 mem_mode=mem_mode, 111 dtb_filename=dtb_file, 112 kernel=SysPaths.binary(args.kernel), 113 readfile=args.script, 114 machine_type="DTOnly") 115 116 MemConfig.config_mem(args, system) 117 118 # Add the PCI devices we need for this system. The base system 119 # doesn't have any PCI devices by default since they are assumed 120 # to be added by the configurastion scripts needin them. 121 system.pci_devices = [ 122 # Create a VirtIO block device for the system's boot 123 # disk. Attach the disk image using gem5's Copy-on-Write 124 # functionality to avoid writing changes to the stored copy of 125 # the disk image. 126 PciVirtIO(vio=VirtIOBlock(image=create_cow_image(args.disk_image))), 127 ] 128 129 # Attach the PCI devices to the system. The helper method in the 130 # system assigns a unique PCI bus ID to each of the devices and 131 # connects them to the IO bus. 132 for dev in system.pci_devices: 133 system.attach_pci(dev) 134 135 # Wire up the system's memory system 136 system.connect() 137 138 # Add CPU clusters to the system 139 system.cpu_cluster = [ 140 devices.CpuCluster(system, 141 args.num_cores, 142 args.cpu_freq, "1.0V", 143 *cpu_types[args.cpu]), 144 ] 145 146 # Create a cache hierarchy for the cluster. We are assuming that 147 # clusters have core-private L1 caches and an L2 that's shared 148 # within the cluster. 149 for cluster in system.cpu_cluster: 150 system.addCaches(want_caches, last_cache_level=2) 151 152 # Setup gem5's minimal Linux boot loader. 153 system.realview.setupBootLoader(system.membus, system, SysPaths.binary) 154 155 # Linux boot command flags 156 kernel_cmd = [ 157 # Tell Linux to use the simulated serial port as a console 158 "console=ttyAMA0", 159 # Hard-code timi 160 "lpj=19988480", 161 # Disable address space randomisation to get a consistent 162 # memory layout. 163 "norandmaps", 164 # Tell Linux where to find the root disk image. 165 "root=/dev/vda1", 166 # Mount the root disk read-write by default. 167 "rw", 168 # Tell Linux about the amount of physical memory present. 169 "mem=%s" % args.mem_size, 170 ] 171 system.boot_osflags = " ".join(kernel_cmd) 172 173 return system 174 175 176def run(args): 177 cptdir = m5.options.outdir 178 if args.checkpoint: 179 print "Checkpoint directory: %s" % cptdir 180 181 while True: 182 event = m5.simulate() 183 exit_msg = event.getCause() 184 if exit_msg == "checkpoint": 185 print "Dropping checkpoint at tick %d" % m5.curTick() 186 cpt_dir = os.path.join(m5.options.outdir, "cpt.%d" % m5.curTick()) 187 m5.checkpoint(os.path.join(cpt_dir)) 188 print "Checkpoint done." 189 else: 190 print exit_msg, " @ ", m5.curTick() 191 break 192 193 sys.exit(event.getCode()) 194 195 196def main(): 197 parser = argparse.ArgumentParser(epilog=__doc__) 198 199 parser.add_argument("--dtb", type=str, default=None, 200 help="DTB file to load") 201 parser.add_argument("--kernel", type=str, default=default_kernel, 202 help="Linux kernel") 203 parser.add_argument("--disk-image", type=str, 204 default=default_disk, 205 help="Disk to instantiate") 206 parser.add_argument("--script", type=str, default="", 207 help = "Linux bootscript") 208 parser.add_argument("--cpu", type=str, choices=cpu_types.keys(), 209 default="atomic", 210 help="CPU model to use") 211 parser.add_argument("--cpu-freq", type=str, default="4GHz") 212 parser.add_argument("--num-cores", type=int, default=1, 213 help="Number of CPU cores") 214 parser.add_argument("--mem-type", default="DDR3_1600_8x8", 215 choices=MemConfig.mem_names(), 216 help = "type of memory to use") 217 parser.add_argument("--mem-channels", type=int, default=1, 218 help = "number of memory channels") 219 parser.add_argument("--mem-ranks", type=int, default=None, 220 help = "number of memory ranks per channel") 221 parser.add_argument("--mem-size", action="store", type=str, 222 default="2GB", 223 help="Specify the physical memory size") 224 parser.add_argument("--checkpoint", action="store_true") 225 parser.add_argument("--restore", type=str, default=None) 226 227 228 args = parser.parse_args() 229 230 root = Root(full_system=True) 231 root.system = create(args) 232 233 if args.restore is not None: 234 m5.instantiate(args.restore) 235 else: 236 m5.instantiate() 237 238 run(args) 239 240 241if __name__ == "__m5_main__": 242 main() 243