112150Sgabor.dozsa@arm.com# Copyright (c) 2016-2017 ARM Limited 212150Sgabor.dozsa@arm.com# All rights reserved. 312150Sgabor.dozsa@arm.com# 412150Sgabor.dozsa@arm.com# The license below extends only to copyright in the software and shall 512150Sgabor.dozsa@arm.com# not be construed as granting a license to any other intellectual 612150Sgabor.dozsa@arm.com# property including but not limited to intellectual property relating 712150Sgabor.dozsa@arm.com# to a hardware implementation of the functionality of the software 812150Sgabor.dozsa@arm.com# licensed hereunder. You may use the software subject to the license 912150Sgabor.dozsa@arm.com# terms below provided that you ensure that this notice is replicated 1012150Sgabor.dozsa@arm.com# unmodified and in its entirety in all distributions of the software, 1112150Sgabor.dozsa@arm.com# modified or unmodified, in source code or in binary form. 1212150Sgabor.dozsa@arm.com# 1312150Sgabor.dozsa@arm.com# Redistribution and use in source and binary forms, with or without 1412150Sgabor.dozsa@arm.com# modification, are permitted provided that the following conditions are 1512150Sgabor.dozsa@arm.com# met: redistributions of source code must retain the above copyright 1612150Sgabor.dozsa@arm.com# notice, this list of conditions and the following disclaimer; 1712150Sgabor.dozsa@arm.com# redistributions in binary form must reproduce the above copyright 1812150Sgabor.dozsa@arm.com# notice, this list of conditions and the following disclaimer in the 1912150Sgabor.dozsa@arm.com# documentation and/or other materials provided with the distribution; 2012150Sgabor.dozsa@arm.com# neither the name of the copyright holders nor the names of its 2112150Sgabor.dozsa@arm.com# contributors may be used to endorse or promote products derived from 2212150Sgabor.dozsa@arm.com# this software without specific prior written permission. 2312150Sgabor.dozsa@arm.com# 2412150Sgabor.dozsa@arm.com# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 2512150Sgabor.dozsa@arm.com# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 2612150Sgabor.dozsa@arm.com# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 2712150Sgabor.dozsa@arm.com# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 2812150Sgabor.dozsa@arm.com# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 2912150Sgabor.dozsa@arm.com# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 3012150Sgabor.dozsa@arm.com# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 3112150Sgabor.dozsa@arm.com# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 3212150Sgabor.dozsa@arm.com# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 3312150Sgabor.dozsa@arm.com# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 3412150Sgabor.dozsa@arm.com# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 3512150Sgabor.dozsa@arm.com# 3612150Sgabor.dozsa@arm.com# Authors: Andreas Sandberg 3712150Sgabor.dozsa@arm.com# Chuan Zhu 3812150Sgabor.dozsa@arm.com# Gabor Dozsa 3912150Sgabor.dozsa@arm.com# 4012150Sgabor.dozsa@arm.com 4112150Sgabor.dozsa@arm.com"""This script is the full system example script from the ARM 4212150Sgabor.dozsa@arm.comResearch Starter Kit on System Modeling. More information can be found 4312150Sgabor.dozsa@arm.comat: http://www.arm.com/ResearchEnablement/SystemModeling 4412150Sgabor.dozsa@arm.com""" 4512150Sgabor.dozsa@arm.com 4612564Sgabeblack@google.comfrom __future__ import print_function 4713774Sandreas.sandberg@arm.comfrom __future__ import absolute_import 4812564Sgabeblack@google.com 4912150Sgabor.dozsa@arm.comimport os 5012150Sgabor.dozsa@arm.comimport m5 5112150Sgabor.dozsa@arm.comfrom m5.util import addToPath 5212150Sgabor.dozsa@arm.comfrom m5.objects import * 5313609Sgiacomo.travaglini@arm.comfrom m5.options import * 5412150Sgabor.dozsa@arm.comimport argparse 5512150Sgabor.dozsa@arm.com 5612150Sgabor.dozsa@arm.comm5.util.addToPath('../..') 5712150Sgabor.dozsa@arm.com 5812150Sgabor.dozsa@arm.comfrom common import SysPaths 5912150Sgabor.dozsa@arm.comfrom common import MemConfig 6012150Sgabor.dozsa@arm.comfrom common.cores.arm import HPI 6112150Sgabor.dozsa@arm.com 6212150Sgabor.dozsa@arm.comimport devices 6312150Sgabor.dozsa@arm.com 6412150Sgabor.dozsa@arm.com 6512150Sgabor.dozsa@arm.comdefault_dist_version = '20170616' 6612150Sgabor.dozsa@arm.comdefault_kernel = 'vmlinux.vexpress_gem5_v1_64.' + default_dist_version 6712150Sgabor.dozsa@arm.comdefault_disk = 'linaro-minimal-aarch64.img' 6812150Sgabor.dozsa@arm.com 6912150Sgabor.dozsa@arm.com 7012150Sgabor.dozsa@arm.com# Pre-defined CPU configurations. Each tuple must be ordered as : (cpu_class, 7112150Sgabor.dozsa@arm.com# l1_icache_class, l1_dcache_class, walk_cache_class, l2_Cache_class). Any of 7212150Sgabor.dozsa@arm.com# the cache class may be 'None' if the particular cache is not present. 7312150Sgabor.dozsa@arm.comcpu_types = { 7412150Sgabor.dozsa@arm.com 7512150Sgabor.dozsa@arm.com "atomic" : ( AtomicSimpleCPU, None, None, None, None), 7612150Sgabor.dozsa@arm.com "minor" : (MinorCPU, 7712150Sgabor.dozsa@arm.com devices.L1I, devices.L1D, 7812150Sgabor.dozsa@arm.com devices.WalkCache, 7912150Sgabor.dozsa@arm.com devices.L2), 8012150Sgabor.dozsa@arm.com "hpi" : ( HPI.HPI, 8112150Sgabor.dozsa@arm.com HPI.HPI_ICache, HPI.HPI_DCache, 8212150Sgabor.dozsa@arm.com HPI.HPI_WalkCache, 8312150Sgabor.dozsa@arm.com HPI.HPI_L2) 8412150Sgabor.dozsa@arm.com} 8512150Sgabor.dozsa@arm.com 8612150Sgabor.dozsa@arm.comdef create_cow_image(name): 8712150Sgabor.dozsa@arm.com """Helper function to create a Copy-on-Write disk image""" 8812150Sgabor.dozsa@arm.com image = CowDiskImage() 8912150Sgabor.dozsa@arm.com image.child.image_file = SysPaths.disk(name) 9012150Sgabor.dozsa@arm.com 9112150Sgabor.dozsa@arm.com return image; 9212150Sgabor.dozsa@arm.com 9312150Sgabor.dozsa@arm.com 9412150Sgabor.dozsa@arm.comdef create(args): 9512150Sgabor.dozsa@arm.com ''' Create and configure the system object. ''' 9612150Sgabor.dozsa@arm.com 9712150Sgabor.dozsa@arm.com if args.script and not os.path.isfile(args.script): 9812564Sgabeblack@google.com print("Error: Bootscript %s does not exist" % args.script) 9912150Sgabor.dozsa@arm.com sys.exit(1) 10012150Sgabor.dozsa@arm.com 10112150Sgabor.dozsa@arm.com cpu_class = cpu_types[args.cpu][0] 10212150Sgabor.dozsa@arm.com mem_mode = cpu_class.memory_mode() 10312150Sgabor.dozsa@arm.com # Only simulate caches when using a timing CPU (e.g., the HPI model) 10412150Sgabor.dozsa@arm.com want_caches = True if mem_mode == "timing" else False 10512150Sgabor.dozsa@arm.com 10612150Sgabor.dozsa@arm.com system = devices.SimpleSystem(want_caches, 10712150Sgabor.dozsa@arm.com args.mem_size, 10812150Sgabor.dozsa@arm.com mem_mode=mem_mode, 10912150Sgabor.dozsa@arm.com kernel=SysPaths.binary(args.kernel), 11012153Sandreas.sandberg@arm.com readfile=args.script) 11112150Sgabor.dozsa@arm.com 11212150Sgabor.dozsa@arm.com MemConfig.config_mem(args, system) 11312150Sgabor.dozsa@arm.com 11412150Sgabor.dozsa@arm.com # Add the PCI devices we need for this system. The base system 11512150Sgabor.dozsa@arm.com # doesn't have any PCI devices by default since they are assumed 11612150Sgabor.dozsa@arm.com # to be added by the configurastion scripts needin them. 11712150Sgabor.dozsa@arm.com system.pci_devices = [ 11812150Sgabor.dozsa@arm.com # Create a VirtIO block device for the system's boot 11912150Sgabor.dozsa@arm.com # disk. Attach the disk image using gem5's Copy-on-Write 12012150Sgabor.dozsa@arm.com # functionality to avoid writing changes to the stored copy of 12112150Sgabor.dozsa@arm.com # the disk image. 12212150Sgabor.dozsa@arm.com PciVirtIO(vio=VirtIOBlock(image=create_cow_image(args.disk_image))), 12312150Sgabor.dozsa@arm.com ] 12412150Sgabor.dozsa@arm.com 12512150Sgabor.dozsa@arm.com # Attach the PCI devices to the system. The helper method in the 12612150Sgabor.dozsa@arm.com # system assigns a unique PCI bus ID to each of the devices and 12712150Sgabor.dozsa@arm.com # connects them to the IO bus. 12812150Sgabor.dozsa@arm.com for dev in system.pci_devices: 12912150Sgabor.dozsa@arm.com system.attach_pci(dev) 13012150Sgabor.dozsa@arm.com 13112150Sgabor.dozsa@arm.com # Wire up the system's memory system 13212150Sgabor.dozsa@arm.com system.connect() 13312150Sgabor.dozsa@arm.com 13412150Sgabor.dozsa@arm.com # Add CPU clusters to the system 13512150Sgabor.dozsa@arm.com system.cpu_cluster = [ 13612150Sgabor.dozsa@arm.com devices.CpuCluster(system, 13712150Sgabor.dozsa@arm.com args.num_cores, 13812150Sgabor.dozsa@arm.com args.cpu_freq, "1.0V", 13912150Sgabor.dozsa@arm.com *cpu_types[args.cpu]), 14012150Sgabor.dozsa@arm.com ] 14112150Sgabor.dozsa@arm.com 14212150Sgabor.dozsa@arm.com # Create a cache hierarchy for the cluster. We are assuming that 14312150Sgabor.dozsa@arm.com # clusters have core-private L1 caches and an L2 that's shared 14412150Sgabor.dozsa@arm.com # within the cluster. 14512150Sgabor.dozsa@arm.com for cluster in system.cpu_cluster: 14612150Sgabor.dozsa@arm.com system.addCaches(want_caches, last_cache_level=2) 14712150Sgabor.dozsa@arm.com 14812150Sgabor.dozsa@arm.com # Setup gem5's minimal Linux boot loader. 14912150Sgabor.dozsa@arm.com system.realview.setupBootLoader(system.membus, system, SysPaths.binary) 15012150Sgabor.dozsa@arm.com 15113609Sgiacomo.travaglini@arm.com if args.dtb: 15213609Sgiacomo.travaglini@arm.com system.dtb_filename = args.dtb 15313609Sgiacomo.travaglini@arm.com else: 15413609Sgiacomo.travaglini@arm.com # No DTB specified: autogenerate DTB 15513609Sgiacomo.travaglini@arm.com system.generateDtb(m5.options.outdir, 'system.dtb') 15613609Sgiacomo.travaglini@arm.com 15712150Sgabor.dozsa@arm.com # Linux boot command flags 15812150Sgabor.dozsa@arm.com kernel_cmd = [ 15912150Sgabor.dozsa@arm.com # Tell Linux to use the simulated serial port as a console 16012150Sgabor.dozsa@arm.com "console=ttyAMA0", 16112150Sgabor.dozsa@arm.com # Hard-code timi 16212150Sgabor.dozsa@arm.com "lpj=19988480", 16312150Sgabor.dozsa@arm.com # Disable address space randomisation to get a consistent 16412150Sgabor.dozsa@arm.com # memory layout. 16512150Sgabor.dozsa@arm.com "norandmaps", 16612150Sgabor.dozsa@arm.com # Tell Linux where to find the root disk image. 16712150Sgabor.dozsa@arm.com "root=/dev/vda1", 16812150Sgabor.dozsa@arm.com # Mount the root disk read-write by default. 16912150Sgabor.dozsa@arm.com "rw", 17012150Sgabor.dozsa@arm.com # Tell Linux about the amount of physical memory present. 17112150Sgabor.dozsa@arm.com "mem=%s" % args.mem_size, 17212150Sgabor.dozsa@arm.com ] 17312150Sgabor.dozsa@arm.com system.boot_osflags = " ".join(kernel_cmd) 17412150Sgabor.dozsa@arm.com 17512150Sgabor.dozsa@arm.com return system 17612150Sgabor.dozsa@arm.com 17712150Sgabor.dozsa@arm.com 17812150Sgabor.dozsa@arm.comdef run(args): 17912150Sgabor.dozsa@arm.com cptdir = m5.options.outdir 18012150Sgabor.dozsa@arm.com if args.checkpoint: 18112564Sgabeblack@google.com print("Checkpoint directory: %s" % cptdir) 18212150Sgabor.dozsa@arm.com 18312150Sgabor.dozsa@arm.com while True: 18412150Sgabor.dozsa@arm.com event = m5.simulate() 18512150Sgabor.dozsa@arm.com exit_msg = event.getCause() 18612150Sgabor.dozsa@arm.com if exit_msg == "checkpoint": 18712564Sgabeblack@google.com print("Dropping checkpoint at tick %d" % m5.curTick()) 18812150Sgabor.dozsa@arm.com cpt_dir = os.path.join(m5.options.outdir, "cpt.%d" % m5.curTick()) 18912150Sgabor.dozsa@arm.com m5.checkpoint(os.path.join(cpt_dir)) 19012564Sgabeblack@google.com print("Checkpoint done.") 19112150Sgabor.dozsa@arm.com else: 19212564Sgabeblack@google.com print(exit_msg, " @ ", m5.curTick()) 19312150Sgabor.dozsa@arm.com break 19412150Sgabor.dozsa@arm.com 19512150Sgabor.dozsa@arm.com sys.exit(event.getCode()) 19612150Sgabor.dozsa@arm.com 19712150Sgabor.dozsa@arm.com 19812150Sgabor.dozsa@arm.comdef main(): 19912150Sgabor.dozsa@arm.com parser = argparse.ArgumentParser(epilog=__doc__) 20012150Sgabor.dozsa@arm.com 20112150Sgabor.dozsa@arm.com parser.add_argument("--dtb", type=str, default=None, 20212150Sgabor.dozsa@arm.com help="DTB file to load") 20312150Sgabor.dozsa@arm.com parser.add_argument("--kernel", type=str, default=default_kernel, 20412150Sgabor.dozsa@arm.com help="Linux kernel") 20512150Sgabor.dozsa@arm.com parser.add_argument("--disk-image", type=str, 20612150Sgabor.dozsa@arm.com default=default_disk, 20712150Sgabor.dozsa@arm.com help="Disk to instantiate") 20812150Sgabor.dozsa@arm.com parser.add_argument("--script", type=str, default="", 20912150Sgabor.dozsa@arm.com help = "Linux bootscript") 21012150Sgabor.dozsa@arm.com parser.add_argument("--cpu", type=str, choices=cpu_types.keys(), 21112150Sgabor.dozsa@arm.com default="atomic", 21212150Sgabor.dozsa@arm.com help="CPU model to use") 21312150Sgabor.dozsa@arm.com parser.add_argument("--cpu-freq", type=str, default="4GHz") 21412150Sgabor.dozsa@arm.com parser.add_argument("--num-cores", type=int, default=1, 21512150Sgabor.dozsa@arm.com help="Number of CPU cores") 21612150Sgabor.dozsa@arm.com parser.add_argument("--mem-type", default="DDR3_1600_8x8", 21712150Sgabor.dozsa@arm.com choices=MemConfig.mem_names(), 21812150Sgabor.dozsa@arm.com help = "type of memory to use") 21912150Sgabor.dozsa@arm.com parser.add_argument("--mem-channels", type=int, default=1, 22012150Sgabor.dozsa@arm.com help = "number of memory channels") 22112150Sgabor.dozsa@arm.com parser.add_argument("--mem-ranks", type=int, default=None, 22212150Sgabor.dozsa@arm.com help = "number of memory ranks per channel") 22312150Sgabor.dozsa@arm.com parser.add_argument("--mem-size", action="store", type=str, 22412150Sgabor.dozsa@arm.com default="2GB", 22512150Sgabor.dozsa@arm.com help="Specify the physical memory size") 22612150Sgabor.dozsa@arm.com parser.add_argument("--checkpoint", action="store_true") 22712150Sgabor.dozsa@arm.com parser.add_argument("--restore", type=str, default=None) 22812150Sgabor.dozsa@arm.com 22912150Sgabor.dozsa@arm.com 23012150Sgabor.dozsa@arm.com args = parser.parse_args() 23112150Sgabor.dozsa@arm.com 23212150Sgabor.dozsa@arm.com root = Root(full_system=True) 23312150Sgabor.dozsa@arm.com root.system = create(args) 23412150Sgabor.dozsa@arm.com 23512150Sgabor.dozsa@arm.com if args.restore is not None: 23612150Sgabor.dozsa@arm.com m5.instantiate(args.restore) 23712150Sgabor.dozsa@arm.com else: 23812150Sgabor.dozsa@arm.com m5.instantiate() 23912150Sgabor.dozsa@arm.com 24012150Sgabor.dozsa@arm.com run(args) 24112150Sgabor.dozsa@arm.com 24212150Sgabor.dozsa@arm.com 24312150Sgabor.dozsa@arm.comif __name__ == "__m5_main__": 24412150Sgabor.dozsa@arm.com main() 245