fs_bigLITTLE.py revision 13608:e91969b61d3d
1# Copyright (c) 2016-2017 ARM Limited
2# All rights reserved.
3#
4# The license below extends only to copyright in the software and shall
5# not be construed as granting a license to any other intellectual
6# property including but not limited to intellectual property relating
7# to a hardware implementation of the functionality of the software
8# licensed hereunder.  You may use the software subject to the license
9# terms below provided that you ensure that this notice is replicated
10# unmodified and in its entirety in all distributions of the software,
11# modified or unmodified, in source code or in binary form.
12#
13# Redistribution and use in source and binary forms, with or without
14# modification, are permitted provided that the following conditions are
15# met: redistributions of source code must retain the above copyright
16# notice, this list of conditions and the following disclaimer;
17# redistributions in binary form must reproduce the above copyright
18# notice, this list of conditions and the following disclaimer in the
19# documentation and/or other materials provided with the distribution;
20# neither the name of the copyright holders nor the names of its
21# contributors may be used to endorse or promote products derived from
22# this software without specific prior written permission.
23#
24# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
25# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
26# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
27# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
28# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
29# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
30# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
31# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
32# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
33# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
34# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35#
36# Authors: Gabor Dozsa
37#          Andreas Sandberg
38
39# This is an example configuration script for full system simulation of
40# a generic ARM bigLITTLE system.
41
42
43from __future__ import print_function
44
45import argparse
46import os
47import sys
48import m5
49import m5.util
50from m5.objects import *
51
52m5.util.addToPath("../../")
53
54from common import SysPaths
55from common import CpuConfig
56from common.cores.arm import ex5_big, ex5_LITTLE
57
58import devices
59from devices import AtomicCluster, KvmCluster
60
61
62default_kernel = 'vmlinux4.3.aarch64'
63default_disk = 'aarch64-ubuntu-trusty-headless.img'
64default_rcs = 'bootscript.rcS'
65
66default_mem_size= "2GB"
67
68def _to_ticks(value):
69    """Helper function to convert a latency from string format to Ticks"""
70
71    return m5.ticks.fromSeconds(m5.util.convert.anyToLatency(value))
72
73def _using_pdes(root):
74    """Determine if the simulator is using multiple parallel event queues"""
75
76    for obj in root.descendants():
77        if not m5.proxy.isproxy(obj.eventq_index) and \
78               obj.eventq_index != root.eventq_index:
79            return True
80
81    return False
82
83
84class BigCluster(devices.CpuCluster):
85    def __init__(self, system, num_cpus, cpu_clock,
86                 cpu_voltage="1.0V"):
87        cpu_config = [ CpuConfig.get("O3_ARM_v7a_3"), devices.L1I, devices.L1D,
88                    devices.WalkCache, devices.L2 ]
89        super(BigCluster, self).__init__(system, num_cpus, cpu_clock,
90                                         cpu_voltage, *cpu_config)
91
92class LittleCluster(devices.CpuCluster):
93    def __init__(self, system, num_cpus, cpu_clock,
94                 cpu_voltage="1.0V"):
95        cpu_config = [ CpuConfig.get("MinorCPU"), devices.L1I, devices.L1D,
96                       devices.WalkCache, devices.L2 ]
97        super(LittleCluster, self).__init__(system, num_cpus, cpu_clock,
98                                         cpu_voltage, *cpu_config)
99
100class Ex5BigCluster(devices.CpuCluster):
101    def __init__(self, system, num_cpus, cpu_clock,
102                 cpu_voltage="1.0V"):
103        cpu_config = [ CpuConfig.get("ex5_big"), ex5_big.L1I, ex5_big.L1D,
104                    ex5_big.WalkCache, ex5_big.L2 ]
105        super(Ex5BigCluster, self).__init__(system, num_cpus, cpu_clock,
106                                         cpu_voltage, *cpu_config)
107
108class Ex5LittleCluster(devices.CpuCluster):
109    def __init__(self, system, num_cpus, cpu_clock,
110                 cpu_voltage="1.0V"):
111        cpu_config = [ CpuConfig.get("ex5_LITTLE"), ex5_LITTLE.L1I,
112                    ex5_LITTLE.L1D, ex5_LITTLE.WalkCache, ex5_LITTLE.L2 ]
113        super(Ex5LittleCluster, self).__init__(system, num_cpus, cpu_clock,
114                                         cpu_voltage, *cpu_config)
115
116def createSystem(caches, kernel, bootscript, disks=[]):
117    sys = devices.SimpleSystem(caches, default_mem_size,
118                               kernel=SysPaths.binary(kernel),
119                               readfile=bootscript)
120
121    sys.mem_ctrls = [ SimpleMemory(range=r, port=sys.membus.master)
122                      for r in sys.mem_ranges ]
123
124    sys.connect()
125
126    # Attach disk images
127    if disks:
128        def cow_disk(image_file):
129            image = CowDiskImage()
130            image.child.image_file = SysPaths.disk(image_file)
131            return image
132
133        sys.disk_images = [ cow_disk(f) for f in disks ]
134        sys.pci_vio_block = [ PciVirtIO(vio=VirtIOBlock(image=img))
135                              for img in sys.disk_images ]
136        for dev in sys.pci_vio_block:
137            sys.attach_pci(dev)
138
139    sys.realview.setupBootLoader(sys.membus, sys, SysPaths.binary)
140
141    return sys
142
143cpu_types = {
144    "atomic" : (AtomicCluster, AtomicCluster),
145    "timing" : (BigCluster, LittleCluster),
146    "exynos" : (Ex5BigCluster, Ex5LittleCluster),
147}
148
149# Only add the KVM CPU if it has been compiled into gem5
150if devices.have_kvm:
151    cpu_types["kvm"] = (KvmCluster, KvmCluster)
152
153
154def addOptions(parser):
155    parser.add_argument("--restore-from", type=str, default=None,
156                        help="Restore from checkpoint")
157    parser.add_argument("--dtb", type=str, default=None,
158                        help="DTB file to load")
159    parser.add_argument("--kernel", type=str, default=default_kernel,
160                        help="Linux kernel")
161    parser.add_argument("--disk", action="append", type=str, default=[],
162                        help="Disks to instantiate")
163    parser.add_argument("--bootscript", type=str, default=default_rcs,
164                        help="Linux bootscript")
165    parser.add_argument("--cpu-type", type=str, choices=cpu_types.keys(),
166                        default="timing",
167                        help="CPU simulation mode. Default: %(default)s")
168    parser.add_argument("--kernel-init", type=str, default="/sbin/init",
169                        help="Override init")
170    parser.add_argument("--big-cpus", type=int, default=1,
171                        help="Number of big CPUs to instantiate")
172    parser.add_argument("--little-cpus", type=int, default=1,
173                        help="Number of little CPUs to instantiate")
174    parser.add_argument("--caches", action="store_true", default=False,
175                        help="Instantiate caches")
176    parser.add_argument("--last-cache-level", type=int, default=2,
177                        help="Last level of caches (e.g. 3 for L3)")
178    parser.add_argument("--big-cpu-clock", type=str, default="2GHz",
179                        help="Big CPU clock frequency")
180    parser.add_argument("--little-cpu-clock", type=str, default="1GHz",
181                        help="Little CPU clock frequency")
182    parser.add_argument("--sim-quantum", type=str, default="1ms",
183                        help="Simulation quantum for parallel simulation. " \
184                        "Default: %(default)s")
185    parser.add_argument("-P", "--param", action="append", default=[],
186        help="Set a SimObject parameter relative to the root node. "
187             "An extended Python multi range slicing syntax can be used "
188             "for arrays. For example: "
189             "'system.cpu[0,1,3:8:2].max_insts_all_threads = 42' "
190             "sets max_insts_all_threads for cpus 0, 1, 3, 5 and 7 "
191             "Direct parameters of the root object are not accessible, "
192             "only parameters of its children.")
193    return parser
194
195def build(options):
196    m5.ticks.fixGlobalFrequency()
197
198    kernel_cmd = [
199        "earlyprintk=pl011,0x1c090000",
200        "console=ttyAMA0",
201        "lpj=19988480",
202        "norandmaps",
203        "loglevel=8",
204        "mem=%s" % default_mem_size,
205        "root=/dev/vda1",
206        "rw",
207        "init=%s" % options.kernel_init,
208        "vmalloc=768MB",
209    ]
210
211    root = Root(full_system=True)
212
213    disks = [default_disk] if len(options.disk) == 0 else options.disk
214    system = createSystem(options.caches,
215                          options.kernel,
216                          options.bootscript,
217                          disks=disks)
218
219    root.system = system
220    system.boot_osflags = " ".join(kernel_cmd)
221
222    if options.big_cpus + options.little_cpus == 0:
223        m5.util.panic("Empty CPU clusters")
224
225    big_model, little_model = cpu_types[options.cpu_type]
226
227    all_cpus = []
228    # big cluster
229    if options.big_cpus > 0:
230        system.bigCluster = big_model(system, options.big_cpus,
231                                      options.big_cpu_clock)
232        system.mem_mode = system.bigCluster.memoryMode()
233        all_cpus += system.bigCluster.cpus
234
235    # little cluster
236    if options.little_cpus > 0:
237        system.littleCluster = little_model(system, options.little_cpus,
238                                            options.little_cpu_clock)
239        system.mem_mode = system.littleCluster.memoryMode()
240        all_cpus += system.littleCluster.cpus
241
242    # Figure out the memory mode
243    if options.big_cpus > 0 and options.little_cpus > 0 and \
244       system.littleCluster.memoryMode() != system.littleCluster.memoryMode():
245        m5.util.panic("Memory mode missmatch among CPU clusters")
246
247
248    # create caches
249    system.addCaches(options.caches, options.last_cache_level)
250    if not options.caches:
251        if options.big_cpus > 0 and system.bigCluster.requireCaches():
252            m5.util.panic("Big CPU model requires caches")
253        if options.little_cpus > 0 and system.littleCluster.requireCaches():
254            m5.util.panic("Little CPU model requires caches")
255
256    # Create a KVM VM and do KVM-specific configuration
257    if issubclass(big_model, KvmCluster):
258        _build_kvm(system, all_cpus)
259
260    # Linux device tree
261    if options.dtb is not None:
262        system.dtb_filename = SysPaths.binary(options.dtb)
263    else:
264        system.generateDtb(m5.options.outdir, 'system.dtb')
265
266    return root
267
268def _build_kvm(system, cpus):
269    system.kvm_vm = KvmVM()
270
271    # Assign KVM CPUs to their own event queues / threads. This
272    # has to be done after creating caches and other child objects
273    # since these mustn't inherit the CPU event queue.
274    if len(cpus) > 1:
275        device_eq = 0
276        first_cpu_eq = 1
277        for idx, cpu in enumerate(cpus):
278            # Child objects usually inherit the parent's event
279            # queue. Override that and use the same event queue for
280            # all devices.
281            for obj in cpu.descendants():
282                obj.eventq_index = device_eq
283            cpu.eventq_index = first_cpu_eq + idx
284
285
286
287def instantiate(options, checkpoint_dir=None):
288    # Setup the simulation quantum if we are running in PDES-mode
289    # (e.g., when using KVM)
290    root = Root.getInstance()
291    if root and _using_pdes(root):
292        m5.util.inform("Running in PDES mode with a %s simulation quantum.",
293                       options.sim_quantum)
294        root.sim_quantum = _to_ticks(options.sim_quantum)
295
296    # Get and load from the chkpt or simpoint checkpoint
297    if options.restore_from:
298        if checkpoint_dir and not os.path.isabs(options.restore_from):
299            cpt = os.path.join(checkpoint_dir, options.restore_from)
300        else:
301            cpt = options.restore_from
302
303        m5.util.inform("Restoring from checkpoint %s", cpt)
304        m5.instantiate(cpt)
305    else:
306        m5.instantiate()
307
308
309def run(checkpoint_dir=m5.options.outdir):
310    # start simulation (and drop checkpoints when requested)
311    while True:
312        event = m5.simulate()
313        exit_msg = event.getCause()
314        if exit_msg == "checkpoint":
315            print("Dropping checkpoint at tick %d" % m5.curTick())
316            cpt_dir = os.path.join(checkpoint_dir, "cpt.%d" % m5.curTick())
317            m5.checkpoint(cpt_dir)
318            print("Checkpoint done.")
319        else:
320            print(exit_msg, " @ ", m5.curTick())
321            break
322
323    sys.exit(event.getCode())
324
325
326def main():
327    parser = argparse.ArgumentParser(
328        description="Generic ARM big.LITTLE configuration")
329    addOptions(parser)
330    options = parser.parse_args()
331    root = build(options)
332    root.apply_config(options.param)
333    instantiate(options)
334    run()
335
336
337if __name__ == "__m5_main__":
338    main()
339